INTEGRATED CIRCUITS DATA SHEET 74LVC126A Quad buffer/line driver with 5 Volt tolerant input/outputs; 3-state Product specification Supersedes data of 2002 Mar 8 2003 Feb 28 Philips Semiconductors Product specification Quad buffer/line driver with 5 Volt tolerant input/outputs; 3-state 74LVC126A FEATURES DESCRIPTION • 5 V tolerant inputs/outputs for interfacing with 5 V logic The 74LVC126A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. • Wide supply voltage range from 1.2 to 3.6 V • CMOS low power consumption Inputs can be driven from either 3.3 or 5 V devices. In 3-state operation, outputs can handle 5 V. • Direct interface with TTL levels • Inputs accept voltages up to 5.5 V The 74LVC126A consists of four non-inverting buffers/line drivers with 3-state outputs (nY) which are controlled by the output enable input (nOE). A LOW at nOE causes the outputs to assume a high-impedance OFF-state. • Complies with JEDEC standard no. 8-1A • ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V. • Specified from −40 to +85 °C and −40 to +125 °C. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf ≤ 2.5 ns. SYMBOL PARAMETER CONDITIONS tPHL/tPLH propagation delay nA to nY CI input capacitance CPD power dissipation capacitance per gate TYPICAL UNIT CL = 50 pF; VCC = 3.3 V 2.4 ns 4.0 pF VCC = 3.3 V; notes 1 and 2 12 pF Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; N = total load switching outputs; Σ(CL × VCC2 × fo) = sum of the outputs. 2. The condition is VI = GND to VCC. ORDERING INFORMATION PACKAGE TYPE NUMBER TEMPERATURE RANGE PINS PACKAGE MATERIAL CODE 74LVC126AD −40 to +125 °C 14 SO14 plastic SOT108-1 74LVC126ADB −40 to +125 °C 14 SSOP14 plastic SOT337-1 74LVC126APW −40 to +125 °C 14 TSSOP14 plastic SOT402-1 74LVC126ABQ −40 to +125 °C 14 DHVQFN14 plastic SOT762-1 2003 Feb 28 2 Philips Semiconductors Product specification Quad buffer/line driver with 5 Volt tolerant input/outputs; 3-state 74LVC126A FUNCTION TABLE See note 1. INPUT OUTPUT nOE nA nY H L L H H H L X Z SYMBOL DESCRIPTION Note 1. H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. PINNING PIN 2003 Feb 28 1 1OE data enable input (active HIGH) 2 1A data input 3 1Y data output 4 2OE data enable input (active HIGH) 5 2A data input 6 2Y data output 7 GND ground (0 V) 8 3Y data output 9 3A data input 10 3OE data enable input (active HIGH) 11 4Y data output 12 4A data input 13 4OE data enable input (active HIGH) 14 VCC supply voltage 3 Philips Semiconductors Product specification Quad buffer/line driver with 5 Volt tolerant input/outputs; 3-state 74LVC126A handbook, halfpage 1OE VCC 1 14 1OE 1 14 VCC 1A 2 13 4OE 1A 2 13 4OE 1Y 3 12 4A 1Y 3 12 4A 2OE 4 2OE 4 11 4Y 2A 5 10 3OE 2Y 6 9 2A 5 10 3OE GND 7 8 3Y 2Y 6 9 3A 11 4Y 126 3A GND(1) MNA233 Top view 7 8 GND 3Y MCE197 * The die substrate is attached to this pad using conductive die attach material. It can not be used as a supply pin or input. Fig.1 Pin configuration SO14 and (T)SSOP14. Fig.2 Pin configuration DHVQFN14. handbook, halfpage 2 1A 1 1OE 5 2A 4 2OE 9 3A 1Y 3 handbook, halfpage 2 1 2Y 1 3 EN1 5 6 6 10 3OE 12 4A 13 4OE 4 3Y 9 8 8 10 4Y 12 11 11 13 MNA236 MNA235 Fig.3 Logic symbol. 2003 Feb 28 Fig.4 Logic symbol (IEEE/IEC). 4 Philips Semiconductors Product specification Quad buffer/line driver with 5 Volt tolerant input/outputs; 3-state 74LVC126A handbook, halfpage nY nA nOE MNA234 Fig.5 Logic diagram. RECOMMENDED OPERATING CONDITIONS SYMBOL PARAMETER VCC supply voltage VI input voltage VO output voltage Tamb operating ambient temperature tr, tf input rise and fall times CONDITIONS for maximum speed performance for low voltage applications output HIGH or LOW state output 3-state MIN. 2.7 MAX. 3.6 UNIT V 1.2 3.6 V 0 5.5 V 0 VCC V 0 5.5 V −40 +125 °C VCC = 1.2 to 2.7 V 0 20 ns/V VCC = 2.7 to 3.6 V 0 10 ns/V LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V). SYMBOL PARAMETER VCC supply voltage CONDITIONS MIN. MAX. UNIT −0.5 +6.5 V IIK input diode current VI < 0 − −50 mA VI input voltage note 1 −0.5 +6.5 V IOK output diode current VO > VCC or VO < 0 − ±50 mA VO output voltage IO output source or sink current output HIGH or LOW state; note 1 −0.5 VCC + 0.5 V output 3-state; note 1 −0.5 +6.5 V VO = 0 to VCC − ±50 mA IGND, ICC VCC or GND current − ±100 mA Tstg storage temperature −65 +150 °C Ptot power dissipation per package − 500 mW Tamb = −40 to +125 °C; note 2 Notes 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. For SO14 packages: above 70 °C the value of Ptot derates linearly with 8 mW/K. For (T)SSOP14 packages: above 60 °C the value of Ptot derates linearly with 5.5 mW/K. For DHVQFN14 packages: above 60 °C the value of Ptot derates linearly with 4.5 mW/K. 2003 Feb 28 5 Philips Semiconductors Product specification Quad buffer/line driver with 5 Volt tolerant input/outputs; 3-state 74LVC126A DC CHARACTERISTICS At recommended operating conditions; voltages are referenced to GND (ground = 0 V). TEST CONDITIONS SYMBOL PARAMETER TYP.(1) MIN. OTHER MAX. UNIT VCC (V) Tamb = −40 to +85 °C HIGH-level input voltage 1.2 VCC − − V 2.7 to 3.6 2.0 − − V VIL LOW-level input voltage 1.2 − − GND V 2.7 to 3.6 − − 0.8 V VOH HIGH-level output voltage IO = −100 µA 2.7 to 3.6 VCC − 0.2 VCC − V IO = −12 mA 2.7 VCC − 0.5 − − V IO = −18 mA 3.0 VCC − 0.6 − − V IO = −24 mA 3.0 VCC − 0.8 − − V IO = 100 µA 2.7 to 3.6 − GND 0.2 V IO = 12 mA 2.7 − − 0.4 V IO = 24 mA 3.0 − − 0.55 V VIH VOL LOW-level output voltage VI = VIH or VIL VI = VIH or VIL ILI input leakage current VI = 5.5 V or GND 3.6 − ±0.1 ±5 µA IOZ 3-state output OFF-state current VI = VIH or VIL; VO = 5.5 V or GND; note 2 3.6 − ±0.1 ±5 µA Ioff power off leakage supply VI or VO = 5.5 V 0 − ±0.1 ±10 µA ICC quiescent supply current VI = VCC or GND; IO = 0 3.6 − 0.1 10 µA ∆ICC additional quiescent VI =VCC − 0.6 V; supply current per IO = 0 input pin 2.7 to 3.6 − 5 500 µA 2003 Feb 28 6 Philips Semiconductors Product specification Quad buffer/line driver with 5 Volt tolerant input/outputs; 3-state 74LVC126A TEST CONDITIONS SYMBOL PARAMETER TYP.(1) MIN. OTHER MAX. UNIT VCC (V) Tamb = −40 to +125 °C VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage HIGH-level output voltage LOW-level output voltage 1.2 VCC − − V 2.7 to 3.6 2.0 − − V 1.2 − − GND V 2.7 to 3.6 − − 0.8 V VI = VIH or VIL IO = −100 µA 2.7 to 3.6 VCC − 0.3 − − V IO = −12 mA 2.7 VCC − 0.65 − − V IO = −18 mA 3.0 VCC − 0.75 − − V IO = −24 mA 3.0 VCC − 1 − − V IO = 100 µA 2.7 to 3.6 − − 0.3 V IO = 12 mA 2.7 − − 0.6 V IO = 24 mA 3.0 − − 0.8 V VI = VIH or VIL ILI input leakage current VI = 5.5 V or GND 3.6 − − ±20 µA IOZ 3-state output OFF-state current VI = VIH or VIL; VO = 5.5 V or GND; note 2 3.6 − − ±20 µA Ioff power off leakage supply VI or VO = 5.5 V 0.0 − − ±20 µA ICC quiescent supply current VI = VCC or GND; IO = 0 3.6 − − 40 µA ∆ICC additional quiescent VI =VCC − 0.6 V; supply current per IO = 0 input pin 2.7 to 3.6 − − 5000 µA Notes 1. All typical values are measured at Tamb = 25 °C. 2. For I/O ports the parameter IOZ includes the input leakage current. 2003 Feb 28 7 Philips Semiconductors Product specification Quad buffer/line driver with 5 Volt tolerant input/outputs; 3-state 74LVC126A AC CHARACTERISTICS GND = 0 V; tr = tf ≤ 2.5 ns. TEST CONDITIONS SYMBOL PARAMETER MIN. WAVEFORMS TYP.(1) MAX. UNIT VCC (V) Tamb = −40 to +85 °C tPHL/tPLH tPZH/tPZL tPHZ/tPLZ tsk(0) propagation delay nA to nY 3-state output enable time nOE to nY 3-state output disable time nOE to nY skew − 11 2.7 1.5 2.7 5.2 ns 3.0 to 3.6 1.0 2.4(2) 4.7 ns − 15 − ns 2.7 1.5 3.1 6.3 ns 3.0 to 3.6 1.0 2.9(2) 5.7 ns − 8.0 − ns 2.7 1.5 3.8 6.7 ns 3.0 to 3.6 1.3 2.8(2) 6.0 ns 3.0 to 3.6 − − 1.0 ns − − − ns 1.5 − 6.5 ns see Figs 6 and 8 1.2 see Figs 7 and 8 1.2 see Figs 7 and 8 1.2 note 3 − ns Tamb = −40 to +125 °C tPHL/tPLH propagation delay nA to nY see Figs 6 and 8 1.2 2.7 1.0 − 6.0 ns − − − ns 2.7 1.5 − 8.0 ns 3.0 to 3.6 1.0 − 7.5 ns 3.0 to 3.6 tPZH/tPZL tPHZ/tPLZ tsk(0) 3-state output enable time nOE to nY 3-state output disable time nOE to nY skew see Figs 7 and 8 1.2 − − − ns 2.7 1.5 − 8.5 ns 3.0 to 3.6 1.3 − 7.5 ns 3.0 to 3.6 − − 1.5 ns see Figs 7 and 8 1.2 note 3 Notes 1. Typical values are measured at Tamb = 25 °C. 2. Typical values are measured at VCC = 3.3 V. 3. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design. 2003 Feb 28 8 Philips Semiconductors Product specification Quad buffer/line driver with 5 Volt tolerant input/outputs; 3-state 74LVC126A AC WAVEFORMS handbook, halfpage VI VM nA input GND tPHL tPLH VOH VM nY output VOL MNA237 VM = 1.5 V at VCC ≥ 2.7 V; VM = 0.5VCC at VCC < 2.7 V; VOL and VOH are typical output voltage drop that occur with the output load. Fig.6 The input nA to output nY propagation delays. VI handbook, full pagewidth VM nOE input GND tPLZ output LOW-to-OFF OFF-to-LOW tPZL VCC VM VX VOL tPHZ tPZH VOH VY output HIGH-to-OFF OFF-to-HIGH VM GND outputs enabled outputs disabled outputs enabled MNA684 VM = 1.5 V at VCC ≥ 2.7 V; VM = 0.5VCC at VCC < 2.7 V; VX = VOL + 0.3 V at VCC ≥ 2.7 V; VX = VOL + 0.1 V at VCC < 2.7 V; VY = VOH + 0.3 V at VCC ≥ 2.7 V; VY = VOH + 0.1 V at VCC < 2.7 V. VOL and VOH are typical output voltage drop that occur with the output load. Fig.7 3-state enable and disable times. 2003 Feb 28 9 Philips Semiconductors Product specification Quad buffer/line driver with 5 Volt tolerant input/outputs; 3-state 74LVC126A S1 handbook, full pagewidth VCC PULSE GENERATOR VI RL 500 Ω VO 2 × VCC open GND D.U.T. CL 50 pF RT RL 500 Ω MNA368 SWITCH POSITION TEST S1 tPLH/tPHL open tPLZ/tPZL 2 × VCC tPHZ/tPZH GND VCC VI <2.7 V VCC 2.7 to 3.6 V 2.7 V Definitions for test circuits: RL = Load resistor. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator. Fig.8 Load circuitry for switching times. 2003 Feb 28 10 Philips Semiconductors Product specification Quad buffer/line driver with 5 Volt tolerant input/outputs; 3-state 74LVC126A PACKAGE OUTLINES SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 D E A X c y HE v M A Z 8 14 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 7 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 8.75 8.55 4.0 3.8 1.27 6.2 5.8 1.05 1.0 0.4 0.7 0.6 0.25 0.25 0.1 0.7 0.3 0.01 0.019 0.0100 0.35 0.014 0.0075 0.34 0.16 0.15 0.010 0.057 inches 0.069 0.004 0.049 0.05 0.244 0.039 0.028 0.041 0.228 0.016 0.024 0.01 0.01 0.028 0.004 0.012 θ Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT108-1 076E06 MS-012 2003 Feb 28 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 11 o 8 0o Philips Semiconductors Product specification Quad buffer/line driver with 5 Volt tolerant input/outputs; 3-state 74LVC126A SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm D SOT337-1 E A X c y HE v M A Z 8 14 Q A2 A (A 3) A1 pin 1 index θ Lp L 7 1 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 2 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 6.4 6.0 5.4 5.2 0.65 7.9 7.6 1.25 1.03 0.63 0.9 0.7 0.2 0.13 0.1 1.4 0.9 8 0o Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT337-1 2003 Feb 28 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 MO-150 12 o Philips Semiconductors Product specification Quad buffer/line driver with 5 Volt tolerant input/outputs; 3-state 74LVC126A TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1 E D A X c y HE v M A Z 8 14 Q (A 3) A2 A A1 pin 1 index θ Lp L 1 7 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 1 0.75 0.50 0.4 0.3 0.2 0.13 0.1 0.72 0.38 8 0o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT402-1 2003 Feb 28 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-18 MO-153 13 o Philips Semiconductors Product specification Quad buffer/line driver with 5 Volt tolerant input/outputs; 3-state 74LVC126A DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT762-1 14 terminals; body 2.5 x 3 x 0.85 mm A B D A A1 E c detail X terminal 1 index area terminal 1 index area C e1 e 2 6 y y1 C v M C A B w M C b L 1 7 Eh e 14 8 13 9 Dh X 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A(1) max. A1 b c D (1) Dh E (1) Eh e e1 L v w y y1 mm 1 0.05 0.00 0.30 0.18 0.2 3.1 2.9 1.65 1.35 2.6 2.4 1.15 0.85 0.5 2 0.5 0.3 0.1 0.05 0.05 0.1 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC JEITA SOT762-1 --- MO-241 --- 2003 Feb 28 14 EUROPEAN PROJECTION ISSUE DATE 02-10-17 03-01-27 Philips Semiconductors Product specification Quad buffer/line driver with 5 Volt tolerant input/outputs; 3-state 74LVC126A If wave soldering is used the following conditions must be observed for optimal results: SOLDERING Introduction to soldering surface mount packages • Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “Data Handbook IC26; Integrated Circuit Packages” (document order number 9398 652 90011). • For packages with leads on two sides and a pitch (e): – larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; There is no soldering method that is ideal for all surface mount IC packages. Wave soldering can still be used for certain surface mount ICs, but it is not suitable for fine pitch SMDs. In these situations reflow soldering is recommended. – smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. • For packages with leads on four sides, the footprint must be placed at a 45° angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. Several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical reflow peak temperatures range from 215 to 250 °C. The top-surface temperature of the packages should preferably be kept: Typical dwell time is 4 seconds at 250 °C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. • below 220 °C for all the BGA packages and packages with a thickness 2.5mm and packages with a thickness <2.5 mm and a volume ≥350 mm3 so called thick/large packages Manual soldering Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. • below 235 °C for packages with a thickness <2.5 mm and a volume <350 mm3 so called small/thin packages. Wave soldering When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed. 2003 Feb 28 15 Philips Semiconductors Product specification Quad buffer/line driver with 5 Volt tolerant input/outputs; 3-state 74LVC126A Suitability of surface mount IC packages for wave and reflow soldering methods SOLDERING METHOD PACKAGE(1) WAVE BGA, LBGA, LFBGA, SQFP, TFBGA, VFBGA not suitable suitable(3) DHVQFN, HBCC, HBGA, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, HVQFN, HVSON, SMS not PLCC(4), SO, SOJ suitable LQFP, QFP, TQFP SSOP, TSSOP, VSO, VSSOP REFLOW(2) suitable suitable suitable not recommended(4)(5) suitable not recommended(6) suitable Notes 1. For more detailed information on the BGA packages refer to the “(LF)BGA Application Note” (AN01026); order a copy from your Philips Semiconductors sales office. 2. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”. 3. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side, the solder might be deposited on the heatsink surface. 4. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 5. Wave soldering is suitable for LQFP, TQFP and QFP packages with a pitch (e) larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 6. Wave soldering is suitable for SSOP, TSSOP, VSO and VSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. 2003 Feb 28 16 Philips Semiconductors Product specification Quad buffer/line driver with 5 Volt tolerant input/outputs; 3-state 74LVC126A DATA SHEET STATUS LEVEL DATA SHEET STATUS(1) PRODUCT STATUS(2)(3) Development DEFINITION I Objective data II Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. III Product data This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Production This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. 3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. DEFINITIONS DISCLAIMERS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Right to make changes Philips Semiconductors reserves the right to make changes in the products including circuits, standard cells, and/or software described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 2003 Feb 28 17 Philips Semiconductors Product specification Quad buffer/line driver with 5 Volt tolerant input/outputs; 3-state 74LVC126A NOTES 2003 Feb 28 18 Philips Semiconductors Product specification Quad buffer/line driver with 5 Volt tolerant input/outputs; 3-state 74LVC126A NOTES 2003 Feb 28 19 Philips Semiconductors – a worldwide company Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: [email protected]. SCA75 © Koninklijke Philips Electronics N.V. 2003 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 613508/05/pp20 Date of release: 2003 Feb 28 Document order number: 9397 750 10533