PHILIPS 74AVC16244DGG

INTEGRATED CIRCUITS
DATA SHEET
74AVC16244
16-bit buffer/line driver; 3-state
(3.6 V tolerant)
Product specification
Supersedes data of 1998 Dec 11
File under Integrated Circuits, IC24
1999 Nov 15
Philips Semiconductors
Product specification
16-bit buffer/line driver; 3-state
(3.6 V tolerant)
74AVC16244
FEATURES
DESCRIPTION
• Wide supply voltage range from 1.2 to 3.6 V
The 74AVC16244 is a 16-bit non-inverting buffer/line
driver with 3-state outputs. This device can be used as four
4-bit buffers, two 8-bit buffers or one 16-bit buffer.
The 3-state outputs are controlled by the output enable
inputs nOE. A HIGH level on input nOE causes the outputs
to assume a high-impedance OFF-state.
• Complies with JEDEC standard no. 8-1A/5/7
• CMOS low power consumption
• Input/output tolerant up to 3.6 V
• Dynamic Controlled Output (DCO) circuit dynamically
changes output impedance, resulting in noise reduction
without speed degradation
This product is designed to have an extremely fast
propagation delay and a minimum amount of power
consumption.
• Low inductance multiple power and ground pins for
minimum noise and ground bounce
To ensure the high-impedance output state during
power-up or power-down, input nOE should be tied to VCC
through a pull-up resistor (live insertion).
• Power off disables 74AVC16244 outputs, permitting live
insertion.
A DCO circuitry is implemented to support termination line
drive during transient (see Figs 1 and 2).
MNA506
MNA507
0
300
handbook, halfpage
handbook, halfpage
I OH
(mA)
I OL
(mA)
3.3 V
1.8 V
−100
200
2.5 V
2.5 V
−200
100
1.8 V
3.3 V
−300
0
0
1
2
3
VOH (V)
4
0
Fig.1 Output current as a function of output voltage.
1999 Nov 15
1
2
3
VOL (V)
4
Fig.2 Output current as a function of output voltage.
2
Philips Semiconductors
Product specification
16-bit buffer/line driver; 3-state
(3.6 V tolerant)
74AVC16244
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf ≤ 2.0 ns; CL = 30 pF.
SYMBOL
PARAMETER
tPHL/tPLH
propagation delay
nAn to nYn
CI
input capacitance
CPD
power dissipation
capacitance per buffer
CONDITIONS
TYP.
UNIT
VCC = 1.2 V
2.6
ns
VCC = 1.5 V
1.8
ns
VCC = 1.8 V
1.7
ns
VCC = 2.5 V
1.3
ns
VCC = 3.3 V
1.1
ns
5.0
pF
outputs enabled
34
pF
outputs disabled
1
pF
notes 1 and 2
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in Volts;
∑ (CL × VCC2 × fo) = sum of outputs.
2. The condition is VI = GND to VCC.
FUNCTION TABLE
See note 1.
INPUTS
nOE
OUTPUTS
nAn
L
L
L
L
H
H
H
X
Z
Note
1. H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
Z = high-impedance OFF-state.
1999 Nov 15
nYn
3
Philips Semiconductors
Product specification
16-bit buffer/line driver; 3-state
(3.6 V tolerant)
74AVC16244
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
TEMPERATURE RANGE
PINS
PACKAGE
MATERIAL
CODE
−40 to +85 °C
48
TSSOP
plastic
SOT362-1
74AVC16244DGG
PINNING
PIN
SYMBOL
DESCRIPTION
1
1OE
output enable input (active LOW)
2, 3, 5 and 6
1Y0 to 1Y3
data outputs
4, 10, 15, 21, 28, 34, 39 and 45
GND
ground (0 V)
7, 18, 31 and 42
VCC
positive supply voltage
8, 9, 11 and 12
2Y0 to 2Y3
data outputs
13, 14, 16 and 17
3Y0 to 3Y3
data outputs
19, 20, 22 and 23
4Y0 to 4Y3
data outputs
24
4OE
output enable input (active LOW)
25
3OE
output enable input (active LOW)
26, 27, 29 and 30
4A3 to 4A0
data inputs
32, 33, 35 and 36
3A3 to 3A0
data inputs
37, 38, 40 and 41
2A3 to 2A0
data inputs
43, 44, 46 and 47
1A3 to 1A0
data inputs
48
2OE
output enable input (active LOW)
1999 Nov 15
4
Philips Semiconductors
Product specification
16-bit buffer/line driver; 3-state
(3.6 V tolerant)
74AVC16244
handbook, halfpage
handbook, halfpage
1OE 1
48 2OE
1Y0
2
47 1A0
1Y1
3
46 1A1
GND
4
45 GND
1Y2
5
44 1A2
1Y3
6
43 1A3
VCC
7
42 VCC
2Y0
8
41 2A0
2Y1
9
40 2A1
nA0
nY0
nA1
nY1
nA2
nY2
nA3
nY3
nOE
MNA502
GND 10
39 GND
2Y2 11
38 2A2
37 2A3
2Y3 12
3Y0 13
Fig.4 Logic symbol.
16244
36 3A0
3Y1 14
35 3A1
GND 15
34 GND
handbook, halfpage
1
48
25
24
3Y2 16
33 3A2
3Y3 17
32 3A3
47
1EN
2EN
3EN
4EN
1
1
2
46
3
VCC 18
31 VCC
44
5
4Y0 19
30 4A0
43
6
4Y1 20
29 4A1
41
1 2
8
40
9
GND 21
28 GND
38
11
4Y2 22
27 4A2
37
12
4Y3 23
26 4A3
36
4OE 24
25 3OE
35
14
33
16
32
17
1 3
13
MNA501
30
1 4
19
29
20
27
22
26
23
MNA503
Fig.3 Pin configuration.
1999 Nov 15
Fig.5 IEEE/IEC logic symbol.
5
Philips Semiconductors
Product specification
16-bit buffer/line driver; 3-state
(3.6 V tolerant)
74AVC16244
RECOMMENDED OPERATING CONDITIONS
SYMBOL
VCC
PARAMETER
DC supply voltage
CONDITIONS
according JEDEC low-voltage
standards
low-voltage applications
MIN.
MAX.
UNIT
1.65
1.95
V
2.3
2.7
V
3.0
3.6
V
1.2
3.6
V
0
3.6
V
0
3.6
V
VI
DC input voltage
VO
DC output voltage
3-state
HIGH or LOW state
0
VCC
V
Tamb
operating ambient temperature
in free air
−40
+85
°C
tr,tf
input rise and fall times
VCC = 1.65 to 2.3 V
0
30
ns/V
VCC = 2.3 to 3.0 V
0
20
ns/V
VCC = 3.0 to 3.6 V
0
10
ns/V
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134); voltages are referenced to GND (ground = 0 V).
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VCC
DC supply voltage
−0.5
+4.6
V
IIK
DC input diode current
VI < 0 V
−
−50
mA
VI
DC input voltage
for inputs; note 1
−0.5
+4.6
V
IOK
DC output diode current
VO > VCC or VO < 0 V
−
±50
mA
VO
DC output voltage
HIGH or LOW state; note 1
−0.5
VCC + 0.5
V
3-state; note 1
−0.5
+4.6
V
VO = 0 V to VCC
−
±50
mA
IO
DC output source or sink current
ICC,IGND
DC VCC or GND current
−
±100
mA
Tstg
storage temperature
−65
+150
°C
PD
power dissipation per package
−
500
mW
temperature range from
−40 to +85 °C; note 2
Notes
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. Above 60 °C the value of PD derates linearly with 5.5 mW/K.
1999 Nov 15
6
Philips Semiconductors
Product specification
16-bit buffer/line driver; 3-state
(3.6 V tolerant)
74AVC16244
DC CHARACTERISTICS
Over recommended operating conditions; voltages are referenced to GND (ground = 0 V).
TEST CONDITIONS
SYMBOL
PARAMETER
40 to +85
VCC (V)
OTHER
VIH
VIL
VOH
VOL
Tamb (°C)
MAX.
VCC
−
−
V
1.65 to 1.95
0.65VCC
0.9
−
V
2.3 to 2.7
1.7
1.2
−
V
3.0 to 3.6
2.0
1.5
−
V
1.2
−
−
GND
V
1.65 to 1.95
−
0.9
0.35VCC V
2.3 to 2.7
−
1.2
0.7
V
3.0 to 3.6
−
1.5
0.8
V
IO = −100 µA
1.65 to 3.6
VCC − 0.20
VCC
−
V
IO = −4 mA
1.65
VCC − 0.45
VCC − 0.10
−
V
IO = −8 mA
2.3
VCC − 0.55
VCC − 0.28
−
V
IO = −12 mA
3.0
VCC − 0.70
VCC − 0.32
−
V
IO = 100 µA
1.65 to 3.6
−
GND
0.20
V
IO = 4 mA
1.65
−
0.10
0.45
V
IO = 8 mA
2.3
−
0.26
0.55
V
IO = 12 mA
3.0
−
0.36
0.70
V
LOW-level input
voltage
LOW-level output
voltage
TYP.(1)
MIN.
1.2
HIGH-level input
voltage
HIGH-level output
voltage
UNIT
VI = VIH or VIL
VI = VIH or VIL
II
input leakage
current per pin
VI = VCC or GND
1.65 to 3.6
−
0.1
2.5
µA
Ioff
power off leakage
current
VI or VO = 3.6 V
0
−
0.1
±10
µA
IIHZ/IILZ
input current for
common I/O pins
VI = VCC or GND
1.65 to 3.6
−
0.1
12.5
µA
IOZ
3-state output
OFF-state current
VI = VIH or VIL;
VO = VCC or GND
1.65 to 2.7
−
0.1
5
µA
3.0 to 3.6
−
0.1
10
µA
quiescent supply
current
VI = VCC or GND;
IO = 0
1.65 to 2.7
−
0.1
20
µA
3.0 to 3.6
−
0.2
40
µA
ICC
Note
1. All typical values are measured at Tamb = 25 °C.
1999 Nov 15
7
Philips Semiconductors
Product specification
16-bit buffer/line driver; 3-state
(3.6 V tolerant)
74AVC16244
AC CHARACTERISTICS
GND = 0 V; tr = tf ≤ 2.0 ns; CL = 30 pF.
TEST CONDITIONS
SYMBOL
propagation delay nAn to nYn
tPZH/tPZL
3-state output enable time
nOE to nYn
tPHZ/tPLZ
−40 to +85 °C
PARAMETER
WAVEFORMS
tPHL/tPLH
Tamb
see Figs 6 and 8
see Figs 7 and 8
3-state output disable time
nOE to nYn
see Figs 7 and 8
VCC (V)
MIN.
TYP.(1)
−
2.6
−
ns
1.8
−
ns
1.65 to 1.95 0.7
1.7
3.1
ns
2.3 to 2.7
0.6
1.3
1.9
ns
3.0 to 3.6
0.5
1.1
1.7
ns
1.2
−
5.2
−
ns
1.40 to 1.60 −
3.3
−
ns
1.65 to 1.95 1.3
2.7
5.5
ns
2.3 to 2.7
1.9
4.3
ns
1.2
0.9
3.0 to 3.6
0.7
1.7
3.5
ns
1.2
−
5.7
−
ns
1.40 to 1.60 −
4.3
−
ns
1.65 to 1.95 2.0
3.2
6.2
ns
2.3 to 2.7
1.0
1.9
4.0
ns
3.0 to 3.6
1.2
1.8
3.5
ns
1. All typical values are measured at Tamb = 25 °C and at VCC = 1.2 V, 1.5 V, 1.8 V, 2.5 V or 3.3 V.
AC WAVEFORMS
handbook, halfpage VI
VM
GND
t PHL
t PLH
VOH
nYn output
VM
VOL
VCC
VM
MNA504
VI
≤2.3 to 2.7 V
0.5VCC
VCC
3.0 to 3.6 V
0.5VCC
VCC
VOL and VOH are typical output voltage drop that occur with the output load.
Fig.6 The input (nAn) to output (nYn) propagation delay.
1999 Nov 15
8
MAX.
1.40 to 1.60 −
Note
nAn input
UNIT
Philips Semiconductors
Product specification
16-bit buffer/line driver; 3-state
(3.6 V tolerant)
74AVC16244
VI
handbook, full pagewidth
nOE input
VM
GND
t PLZ
t PZL
VCC
output
LOW-to-OFF
OFF-to-LOW
VM
VX
VOL
t PZH
t PHZ
VOH
VY
output
HIGH-to-OFF
OFF-to-HIGH
GND
VM
outputs
enabled
outputs
enabled
outputs
disabled
MNA478
VCC
VM
VX
VY
VI
≤2.3 to 2.7 V
0.5VCC
VOL + 0.15 V
VOH − 0.15 V VCC
3.0 to 3.6 V
0.5VCC
VOL + 0.3 V
VOH − 0.3 V
VCC
VOL and VOH are typical output voltage drop that occur with the output load.
Fig.7 The 3-state output enable and disable times.
S1
handbook, full pagewidth
VCC
PULSE
GENERATOR
VI
2 × VCC
open
GND
R load
VO
D.U.T.
CL
RT
R load
MNA505
TEST
S1
VCC
VI
Rload
VCC
1000 Ω
tPLH/tPHL
open
<2.3 V
tPLZ/tPZL
2 x VCC
2.3 to 2.7 V VCC
500 Ω
tPHZ/tPZH
GND
3.0 to 3.6 V VCC
500 Ω
Definitions for test circuit:
CL = load capacitance including jig and probe capacitance
(See Chapter “AC characteristics”);
RT = termination resistance should be equal to the output
impedance Zo of the pulse generator.
Fig.8 Test circuitry for switching times.
1999 Nov 15
9
Philips Semiconductors
Product specification
16-bit buffer/line driver; 3-state
(3.6 V tolerant)
74AVC16244
PACKAGE OUTLINE
TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1 mm
SOT362-1
E
D
A
X
c
HE
y
v M A
Z
48
25
Q
A2
(A 3)
A1
pin 1 index
A
θ
Lp
L
1
detail X
24
w M
bp
e
2.5
0
5 mm
scale
DIMENSIONS (mm are the original dimensions).
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (2)
e
HE
L
Lp
Q
v
w
y
Z
θ
mm
1.2
0.15
0.05
1.05
0.85
0.25
0.28
0.17
0.2
0.1
12.6
12.4
6.2
6.0
0.5
8.3
7.9
1
0.8
0.4
0.50
0.35
0.25
0.08
0.1
0.8
0.4
8
0o
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
SOT362-1
1999 Nov 15
REFERENCES
IEC
JEDEC
EIAJ
EUROPEAN
PROJECTION
ISSUE DATE
93-02-03
95-02-10
MO-153ED
10
o
Philips Semiconductors
Product specification
16-bit buffer/line driver; 3-state
(3.6 V tolerant)
74AVC16244
SOLDERING
If wave soldering is used the following conditions must be
observed for optimal results:
Introduction to soldering surface mount packages
• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering is not always suitable
for surface mount ICs, or for printed-circuit boards with
high population densities. In these situations reflow
soldering is often used.
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
Reflow soldering
The footprint must incorporate solder thieves at the
downstream end.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
• For packages with leads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 100 and 200 seconds depending on heating
method.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.
Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Wave soldering
Manual soldering
Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
To overcome these problems the double-wave soldering
method was specifically developed.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
1999 Nov 15
11
Philips Semiconductors
Product specification
16-bit buffer/line driver; 3-state
(3.6 V tolerant)
74AVC16244
Suitability of surface mount IC packages for wave and reflow soldering methods
SOLDERING METHOD
PACKAGE
REFLOW(1)
WAVE
BGA, LFBGA, SQFP, TFBGA
not suitable
suitable(2)
HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS
not
PLCC(3), SO, SOJ
suitable
LQFP, QFP, TQFP
SSOP, TSSOP, VSO
suitable
suitable
suitable
not
recommended(3)(4)
suitable
not
recommended(5)
suitable
Notes
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.
2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).
3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
DEFINITIONS
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification
This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1999 Nov 15
12
Philips Semiconductors
Product specification
16-bit buffer/line driver; 3-state
(3.6 V tolerant)
74AVC16244
NOTES
1999 Nov 15
13
Philips Semiconductors
Product specification
16-bit buffer/line driver; 3-state
(3.6 V tolerant)
74AVC16244
NOTES
1999 Nov 15
14
Philips Semiconductors
Product specification
16-bit buffer/line driver; 3-state
(3.6 V tolerant)
74AVC16244
NOTES
1999 Nov 15
15
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Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080
Ireland: Newstead, Clonskeagh, DUBLIN 14,
Tel. +353 1 7640 000, Fax. +353 1 7640 200
Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053,
TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007
Italy: PHILIPS SEMICONDUCTORS, Via Casati, 23 - 20052 MONZA (MI),
Tel. +39 039 203 6838, Fax +39 039 203 6800
Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku,
TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5057
Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,
Tel. +82 2 709 1412, Fax. +82 2 709 1415
Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,
Tel. +60 3 750 5214, Fax. +60 3 757 4880
Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,
Tel. +9-5 800 234 7381, Fax +9-5 800 943 0087
Middle East: see Italy
Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,
Tel. +31 40 27 82785, Fax. +31 40 27 88399
New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,
Tel. +64 9 849 4160, Fax. +64 9 849 7811
Norway: Box 1, Manglerud 0612, OSLO,
Tel. +47 22 74 8000, Fax. +47 22 74 8341
Pakistan: see Singapore
Philippines: Philips Semiconductors Philippines Inc.,
106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474
Poland: Al.Jerozolimskie 195 B, 02-222 WARSAW,
Tel. +48 22 5710 000, Fax. +48 22 5710 001
Portugal: see Spain
Romania: see Italy
Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW,
Tel. +7 095 755 6918, Fax. +7 095 755 6919
Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762,
Tel. +65 350 2538, Fax. +65 251 6500
Slovakia: see Austria
Slovenia: see Italy
South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale,
2092 JOHANNESBURG, P.O. Box 58088 Newville 2114,
Tel. +27 11 471 5401, Fax. +27 11 471 5398
South America: Al. Vicente Pinzon, 173, 6th floor,
04547-130 SÃO PAULO, SP, Brazil,
Tel. +55 11 821 2333, Fax. +55 11 821 2382
Spain: Balmes 22, 08007 BARCELONA,
Tel. +34 93 301 6312, Fax. +34 93 301 4107
Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,
Tel. +46 8 5985 2000, Fax. +46 8 5985 2745
Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,
Tel. +41 1 488 2741 Fax. +41 1 488 3263
Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1,
TAIPEI, Taiwan Tel. +886 2 2134 2886, Fax. +886 2 2134 2874
Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,
Tel. +66 2 745 4090, Fax. +66 2 398 0793
Turkey: Yukari Dudullu, Org. San. Blg., 2.Cad. Nr. 28 81260 Umraniye,
ISTANBUL, Tel. +90 216 522 1500, Fax. +90 216 522 1813
Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461
United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. +44 208 730 5000, Fax. +44 208 754 8421
United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. +1 800 234 7381, Fax. +1 800 943 0087
Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,
Tel. +381 11 62 5344, Fax.+381 11 63 5777
For all other countries apply to: Philips Semiconductors,
International Marketing & Sales Communications, Building BE-p, P.O. Box 218,
5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
Internet: http://www.semiconductors.philips.com
SCA 68
© Philips Electronics N.V. 1999
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
245004/02/pp16
Date of release: 1999
Nov 15
Document order number:
9397 750 06479