AN202487 Differences Among FM0+, FM3, and FM4 32-Bit Microcontrollers Author: Marc Willam Associated Part Family: All FM0+, FM3, and FM4 Parts AN202487 highlights the peripheral differences in Cypress’s FM family MCUs. It provides dedicated sections for each peripheral and contains lists, tables, and descriptions of peripheral feature and register differences. Contents 1 2 Introduction ...............................................................2 Features ...................................................................3 2.1 FM0+ Device Type Differences .......................3 2.2 FM3 Device Type Differences..........................4 2.3 FM4 Device Type Differences..........................5 3 System .....................................................................6 3.1 Device Type Mode Pin Settings .......................6 3.2 Bus Systems Availability ..................................6 3.3 Flash Accelerator Availability ...........................6 3.4 Memory Architecture ........................................7 4 Analog-to-Digital Converter (ADC) ...........................8 5 Base Timer (BT) and I/O Selection (BTIOSEL) ........9 6 Controller Area Network (CAN) ................................9 7 Clock (CLK) ............................................................ 10 8 CR Trimming (HS-CR)............................................ 11 9 Cyclic Redundancy Check (CRC) ........................... 11 10 Clock Supervisor (CSV) .......................................... 11 11 Consumer Electronics Control (CEC) ..................... 11 12 Digital-to-Analog Converter (DAC) ......................... 11 13 Debug Interface ...................................................... 12 14 Direct Memory Access (DMA) ................................ 12 15 Descriptor System Data Transfer Controller ........... 13 16 Dual Timer (DT) ...................................................... 13 17 External Interrupts (EXINT) .................................... 13 18 External Bus Interface (EXTIF) ............................... 13 19 Flash Memory (FLASH) .......................................... 14 20 General-Purpose I/O (GPIO) Ports ......................... 14 www.cypress.com 21 Graphic Display Controller (GDC) .......................... 14 22 High-Speed Quad SPI (HSSPI) .............................. 14 23 HyperBus Interface (HYPERBUSI) ......................... 14 24 Inter-IC Sound Prescaler ........................................ 14 2 25 Inter-IC Sound (I S) ................................................ 14 26 Interrupts (IRQ) ...................................................... 15 27 Liquid Crystal Display (LCD) .................................. 16 28 Low-Power Modes (LPM) ....................................... 17 29 Low-Voltage Detection (LVD) ................................. 17 30 Multifunction Serial (MFS) Interface ....................... 18 31 Multifunction Timer (MFT) ...................................... 19 32 Programmable CRC (PRGCRC) ............................ 21 33 Programmable Pulse Generator and IGBT (PPG) .. 21 34 Quadrature Position and Revolution Counter ......... 22 35 Reset (RESET)....................................................... 22 36 Real-Time Clock (RTC) .......................................... 22 37 SD Card Interface (SD) .......................................... 23 38 Smart Card Interface .............................................. 23 39 Unique ID (UID) ...................................................... 23 40 Universal Serial Bus (USB) .................................... 23 41 Watch Counter (WC) .............................................. 24 42 Software and Hardware Watchdog Counter ........... 24 43 VBAT Domain (VBAT) ............................................ 24 44 Summary ................................................................ 24 Document History............................................................ 25 Worldwide Sales and Design Support ............................. 26 Document No. 002-02487 Rev. ** 1 Differences Among FM0+, FM3, and FM4 32-Bit Microcontrollers 1 Introduction This application note is primarily intended for software engineers who do not use preconfigured high-level software libraries, but want to program an FMx MCU at the register and bit level to get highly optimized code. The FM0+, FM3, and FM4 MCUs share peripherals; however, the way that each peripheral is implemented varies slightly among those families. This application note offers a high-level overview of which features are available in the different families and device types. For a complete overview of FM MCU device types, refer to the peripheral manual’s appendix. This application note does not list the availability of all peripherals for specific devices. Only in necessary cases is the availability mentioned. Always refer to the device’s datasheet for the feature set. For very complex differences, for example, for the multifunction timer (MFT), refer to the peripheral manual, as noted in the text. Table 1 shows the symbols used in the tables in this document. Table 1. Table Symbols Symbol www.cypress.com Meaning Description Not included Feature not available √ Included Feature available – Don’t care Setting arbitrary A/B/… Implementation type Device type dependent on peripheral version 0, 1, … Numbered item Number of feature of peripheral Document No. 002-02487 Rev.** 2 Differences Among FM0+, FM3, and FM4 32-Bit Microcontrollers 2 Features 2.1 FM0+ Device Type Differences Table 2. FM0+ Device Type Differences Device Type Feature 1 Maximum Clock Speed (MHz) 40 PLL Settings 401 Refer to FM0+ Family Peripheral Manual. Interrupt Table Type 1 1-A/1-B 2-A/2-B HS-CR Frequency Trimming BT0-3 √ √ HS-CR Frequency Trimming Bits 10 10 HS-CR Clock Divider Bits 3 3 HS-CR Temperature Trimming 5 7 Indication of Low Power and Power-On Reset √ √ A B Unique ID √ √ DMA Channels 4 0 Low-Voltage Detection Type 1 √ DSTC Support MTB (Micro Trace Buffer) 1 RTC Clock Control/ Count Block Type √ √ A B √ DTTI Analog Noise Canceler PPG-IGBT √ √ Quad Counter Position Rotation Count Register √ √ MFS I2S Controller √ USB Support √ Smart Card Interface √ Dedicated USB PLL √ VBAT Domain √ LCD Controller 1 www.cypress.com 2 1 1 A B Refer to FM0+ Family Peripheral Manual for details. Document No. 002-02487 Rev.** 3 Differences Among FM0+, FM3, and FM4 32-Bit Microcontrollers 2.2 FM3 Device Type Differences Table 3 lists the FM3 groups and their abbreviations. Table 4 gives an overview of the differences of resources in the FM3 device types. Table 3. FM3 Groups and Abbreviations FM3 Group Abbreviation High Performance HP Basic B Low Power LP Ultra Low Leakage UL Table 4. FM3 Device Type Differences Device Type Feature 0 1 2 3 4 5 6 7 8 FM3 Group (see Table 4) HP B HP UL HP B LP UL LP Maximum Clock Speed (MHz) 80 40 144 20 144 PLL Settings Refer to the FM3 Family Peripheral Manual. 40 40 20 √ Dual-Operation Flash √ √ √ √ √ √ √ Work Flash √ ECC Flash Flash Accelerator (Main Flash) Interrupt Table Type 2 HS-CR Frequency Trimming ICU3 A A A C A/B A/B √ √ √ √ √ √ A/B C 11 12 B B B B 40 72 72 40 60 √ √ A/B A/B √ A/B A/B √ √ HS-CR Frequency Trimming BT0 10 √ 9 A/B √ √ √ √ √ √ HS-CR Frequency Trimming Bits 10 8 8 10 8 8 10 10 10 10 10 10 10 HS-CR Clock Divider Bits 2 2 2 3 2 2 2 3 2 2 2 2 2 √ √ √ √ √ C C C C C √ √ √ √ √ HS-CR Temperature Trimming Indication of Low Power and Power-On Reset √ Low-Voltage Detection Type2 A A A B √ A A C B √ Unique ID √ ETM (Embedded Trace) √ √ √ √ 1 √ 1 √ √ √ DMA Redirect to USB Ch. 1 2 A A A A A A A A A A A A B 2 B B B A A A B B B B B B B Base Timer I/O Selection Type2 A A B A A A A A A A A A A √ √ Watch Counter Prescaler Type RTC Clock Control Block Type √ PPG-IGBT Quadrature Decode Position Rotation Count Register ADC Type2 A A A √ √ √ √ √ √ √ √ √ √ √ B A A B B B B B B B 1 Depends on package size. 2 Refer to the FM3 Family Peripheral Manual for details. www.cypress.com Document No. 002-02487 Rev.** 4 Differences Among FM0+, FM3, and FM4 32-Bit Microcontrollers 2.3 FM4 Device Type Differences Table 5 gives an overview of the differences of resources in the FM4 device types. Table 5. Resources in Different FM4 Device Types Device Type Feature 1 2 3 4 5 6 Maximum Clock Speed (MHz) 160 160 200 160 180 160 PLL Settings Refer to the FM4 Family Peripheral Manual. √ Dual-Operation Flash Work Flash √ √ ECC Flash √ √ √ √ √ √ Flash Accelerator (Main Flash) √ √ √ √ √ √ √ √ √ √ Clock Gear Function Interrupt Table Type 2 √ A A A B A A A A B B B A Unique ID √ √ √ √ √ √ ETM (Embedded Trace) √ √ √ √ √ √ Low-Voltage Detection Type 2 √ HTM (AHB Trace Macro Cell) RTC Clock Control Block Type 2 RTC Clock Counter Block Type 2 A A B B C A A A B B C A √ √ √ √ √ √ √ √ Analog Noise Canceller Base Timer I/O Selection I/O Mode 9 External Bus Interface: SRAM, NOR, NAND Flash, SDRAM √ √ √ Graphic Display Engine √ HyperBus Interface √ √ SD Card Interface √ √ √ Smart Card Interface High-Speed Quad SPI 2 I S Controller CAN FD VBAT Domain Type 2 A A √ √ √ √ √ √ B B A 1 Depends on package size. 2 Refer to the FM4 Family Peripheral Manual for details. www.cypress.com Document No. 002-02487 Rev.** 5 Differences Among FM0+, FM3, and FM4 32-Bit Microcontrollers 3 System 3.1 Device Type Mode Pin Settings FM devices can be set to different system modes with the mode pins. Table 6 shows the mode pin settings. Table 6. Device Type Mode Pin Settings Mode Pins Operation Mode MD1* MD0 0 0 User Mode (Flash Startup) 0 1 Programming Mode 1 0 FM3 device type 0: not allowed FM3 device types other than 0, and FM4: User Mode (Flash Startup) 1 1 Not allowed * Not available for FM0+ type 1. 3.2 Bus Systems Availability FM devices have several bus systems on-chip. Table 7 lists the availability of these buses. Table 7. Bus System 3.3 FM Series AHB APB0 APB1 APB2 DMAC DSTC FM0+ √ √ Type 1 Type 2 FM3 √ √ √ √ √ FM4 √ √ √ √ √ Ethernet/ SD Card AXI √ Type 4 √ Flash Accelerator Availability For speeding up the execution time, several FM devices provide a flash accelerator. Table 8 shows the availability. Table 8. Flash Accelerator Availability Device Flash Accelerator FM0+ FM3 device types 2 and 4 √ FM3 device types other than 2 and 4 √ FM4 Note that for all FM0+, for MCU frequencies greater than 20 MHz, one wait cycle must be inserted. www.cypress.com Document No. 002-02487 Rev.** 6 Differences Among FM0+, FM3, and FM4 32-Bit Microcontrollers 3.4 Memory Architecture 3.4.1 F l a s h M e m o r y T yp e s FM devices have different flash memories such as single, dual-operation, and additional work flash. Table 9 lists the differences. Table 9. Flash Memory Types 3.4.2 Device Main Flash Work Flash or Dual-Operation Flash FM0+ √ Dual-operation flash: Type 2 FM3 √ Work flash: Type 4, 5 Dual-operation flash: Type 6, 8, 9, 12 FM4 √ Work flash: Type 1, 2 Dual-operation flash: Type 3 R AM A r e a s Table 10 shows the RAM areas for each of the FM devices. Table 10. RAM Areas 3.4.3 Device SRAM FM0+ 1 RAM area FM3 2 RAM areas FM4 3 RAM areas Bit Band Alias Areas Atomic access to RAM and peripheral bits are done by the bit band alias region. As Table 11 shows, these areas are equal for all FM devices. Table 11. Bit Band Alias Areas Device SRAM Bit Band Alias Area Address Peripheral Bit Band Alias Area Address 0x22000000 0x42000000 FM0+ FM3 FM4 3.4.4 Peripheral I/O Area The start address of the peripheral I/O area is 0x40000000 for all FM family devices. The addresses of the peripherals themselves differ among the FM family devices. www.cypress.com Document No. 002-02487 Rev.** 7 Differences Among FM0+, FM3, and FM4 32-Bit Microcontrollers 3.4.5 Peripheral Bus Distribution The FM0+, FM3, and FM4 devices may have up to three peripheral bus systems (APBn), The distribution of the peripherals among these buses differs. Refer to the peripheral manuals for details. FM0+ and FM4 devices provide one peripheral bus that can be clocked by the base clock (HCLK) with a 1:1 divider setting even at high frequencies (> 80 MHz). This means that the speed of the connected peripherals, such as the MFT and the ADC, is doubled. For a detailed description, refer to the corresponding datasheet. For FM3 devices with a base clock lower than 72 MHz, 1:1 clocking may also be allowed, but no real speed increment is generated. Refer to the corresponding datasheet for the possibility. Table 12 shows an example of AC characteristics. Table 12. Example of AC Characteristics from Datasheet Internal operating clock cycle time 4 tCYCC - - 6.25 - Ns Base clock (HCLK/FCLK) tCYCP0 - - 12.5 - Ns APB0 bus clock tCYCP1 - - 6.25 - Ns APB1 bus clock tCYCP2 - - 12.5 - Ns APB2 bus clock Analog-to-Digital Converter (ADC) Conversion Times Table 13 gives the minimum conversion times for the ADC. Table 13. ADC Conversion Times FM Series Minimum Conversion Time FM0+ 2.0 µs @ 5 V FM3* 0.8 µs @ 5 V FM4 0.5 µs @ 5 V *For FM3 ADC types, refer to Table 4. Range Comparison The range comparison (inside, outside range) within a continuous detection time is supported only by FM0+ and FM4 devices. Connection to MFT Refer to the Multifunction Serial (MFS) Interface section for details on different connections to the timer in the FM0+, FM3, and FM4 devices. www.cypress.com Document No. 002-02487 Rev.** 8 Differences Among FM0+, FM3, and FM4 32-Bit Microcontrollers 5 Base Timer (BT) and I/O Selection (BTIOSEL) Base Timer I/O Selection (FM3) FM3 device type 2 – I/O Select Function (B) – cannot use the TIOA9 input pin of BT channel 8 and 9 in Timer Full Mode (I/O mode 1) to trigger the timer. The I/O Select Function (A) of all other FM3 device types does not have this restriction. Base Timer I/O Selection (FM0+/FM4) FM0+ and FM4 devices use the same I/O Select Function (A) as FM3 without the restriction of I/O Select Function (B). FM4 device types 5 and 6 provide I/O Mode 9. Base Timer The functionality of the base timer is the same in all FM0+, FM3, and FM4 devices. 6 Controller Area Network (CAN) All FM3 and FM4 devices which support a CAN interface use the same Bosch C_CAN. FM0+ does not support CAN. CAN Input Clock (FM4) The input clock for device types 1 and 2 is 16 MHz maximum. For other types, the maximum frequency is 40 MHz CAN with Flexible Data Rate (CAN FD) (Non-ISO) CAN FD is available only on FM4 devices. Refer to the datasheet for availability. It is based on the M_CAN macro. www.cypress.com Document No. 002-02487 Rev.** 9 Differences Among FM0+, FM3, and FM4 32-Bit Microcontrollers 7 Clock (CLK) Peripheral Clocks (FM0+) FM0+ devices have only two peripheral clocks (PCLK0 and PCLK1). FM3 and FM4 devices have three peripheral clocks (PCLK0, PCLK1, and PCLK2). High-Speed CR Frequency Division The settings given in Table 14, Table 15, and Table 16 can be made, depending on FM device type. Refer to the peripheral manual for details. Table 14. FM0+ CR Division Bits FM0+ Device Type CR Division 1, 2 3 bits with dedicated dividers Table 15. FM3 CR Division Bits FM3 Device Type CR Division 3, 7 3 bits with dedicated dividers Other than 3, 7 2 bits with dedicated dividers Table 16. FM4 CR Division Bits FM4 Device Type CR Division 1 to 6 3 bits with dedicated dividers Clock Gating (FM0+/FM4) FM0+ and FM4 devices provide clock and reset gating of peripherals. Note that some registers may not exist depending on package size and peripheral features. Clock Gear Control (FM4) FM4 device types 3 to 6 support the Clock Gear Control function. Therefore, the additional register PLLG_CTL is available. Peripheral Clock (FM4) One peripheral bus can be clocked at the HCLK speed. Refer to the MFT chapter 31 for details. Sub Clock (FM0+/FM4) The sub clock oscillator in FM4 devices is located in the VBAT domain. FM0+ device type 2 also provides the VBAT domain sub clock. www.cypress.com Document No. 002-02487 Rev.** 10 Differences Among FM0+, FM3, and FM4 32-Bit Microcontrollers 8 CR Trimming (HS-CR) FM3 HS-CR Frequency Trimming The usable timer for trimming the High-Speed-CR clock depends on the FM3 device type, as specified in Table 17. Table 17. FM3 HS_CR Frequency Trimming FM3 Device Type MFT – ICU Ch. 3 Base Timer Ch. 0 √ 0 to 5, 7 √ 6, 8 √ 9 to 12 √ FM3 HS-CR Frequency Trimming Bits Table 18 lists the number of trimming bits. Table 18. FM3 HS-CR Frequency Trimming Bits FM3 Device Type Trimming Register Bits 0, 3, 6 to 12 10 1, 2, 4, 5 8 FM3 HS-CR Temperature Trimming Only FM3 device types 8 to 12 support HS-CR temperature trimming with 5 bits. HS-CR Frequency Trimming (FM0+/FM4) FM0+ and FM4 devices provide HS-CR frequency trimming. Both families provide 10-bit trimming. HS-CR Temperature Trimming (FM0+/FM4) FM0+ and FM4 devices provide HS-CR temperature trimming. Both families provide 5-bit trimming. 9 Cyclic Redundancy Check (CRC) All FM device families support the same CRC peripheral. 10 Clock Supervisor (CSV) All FM device families support the same CSV peripheral. 11 Consumer Electronics Control (CEC) Not all FM family devices support CEC. Those devices that support CEC have identical CEC peripherals. 12 Digital-to-Analog Converter (DAC) Resolution Table 19 shows the DAC resolutions. Refer to the peripheral manuals for DAC availability. Table 19. DAC Resolution FM Family www.cypress.com Document No. 002-02487 Rev.** Resolution FM0+ 10 bits FM3 10 bits FM4 10 bits/12 bits selectable 11 Differences Among FM0+, FM3, and FM4 32-Bit Microcontrollers 13 Debug Interface JTAG Access Table 20 shows the differences in the debug capability among the FM families. Note that some restrictions may apply depending on package size. Refer to the device datasheet for details. Table 20. JTAG Access FM Family JTAG FM0+ SWD Trace √ √ FM3 √ √ √ FM4 √ √ √ Trace Clock (FM3/FM4) In FM3 and FM4 devices, which support the extended trace module (ETM), the settings given in Table 21 and Table 22 are possible. FM0+ devices provide only the Micro Trace Buffer (MTB). Table 21. FM3 Trace Clock Dividers FM3 Device Type TPIU Clock Divider Settings 0, 1 1/1 and 1/2 Other than 0, 1 1/1, 1/2, 1/3, …, 1/8 Table 22. FM4 Trace Clock Dividers FM4 Device Type TPIU Clock Divider Settings All 1/1, 1/2, 1/3, …, 1/8 Trace Pins (FM4) Types 3 and 5 allow you to use up to 16 trace data pins. AHB Trace Macro Cell (FM4) FM4 type 3 devices provide an AMDA AHB Trace Macro Cell (HTM). 14 Direct Memory Access (DMA) All FM3 and FM4 MCUs provide 8-channel DMA. FM0+ device type 1 provides 4-channel DMA. Priority (FM3) For FM3 device type 0, the DMA may block the CPU in burst transfer mode. For other FM3 device types, the bus priority uses the round-robin method. Additional Selector (FM3) FM3 type 2 products have an additional selector (DQESEL register) to switch certain vectors of dedicated peripherals to USB Channel 2 endpoints. Descriptor System Data Transfer Controller (DSTC) (F M0+/FM4) In FM4 devices, in addition to the DMA selection, peripherals that have an interrupt capability can be switched to DMA or DSTC. FM0+ type 2 provides DSTC as well. www.cypress.com Document No. 002-02487 Rev.** 12 Differences Among FM0+, FM3, and FM4 32-Bit Microcontrollers 15 Descriptor System Data Transfer Controller The Descriptor System Data Transfer Controller (DSTC) peripheral is supported by all FM4 devices. FM0+ device type 1 does not support DSTC. See the Direct Memory Access (DMA) section for details. Because of the different interrupts of FM4 device type 4, the interrupt connection to the DSTC also differs. Refer to the peripheral manual “Interrupts” chapter for details. 16 Dual Timer (DT) There are no differences in the dual timer in all FM0+, FM3, and FM4 devices. 17 External Interrupts (EXINT) FM0+/ FM3 The external interrupt channels 0 to 7 share one interrupt vector. The external interrupt channels 8 and greater share one interrupt vector. FM4 The external interrupt channels 0 to 15 each have their own interrupt vector. The external interrupt channels 16 to 19, 20 to 23, 24 to 27, and 28 to 31 each share one interrupt vector. The functionality of the external interrupts is the same for all FM devices. External Interrupt Vector Level Register 2 (ELVR2) In addition to the detection of low and high levels, falling and rising edges, FM4 device types 5 and 6 allow the detection of both edges with the ELVR2. 18 External Bus Interface (EXTIF) Package Devices with a pin count of less than 100 do not support an external bus interface. FM0+ Devices FM0+ devices do not support an external bus interface. SDRAM Support Only FM4 devices support an SDRAM interface. NAND Flash Support (FM3) Refer to the device’s datasheet for NAND flash support. It depends on the package and its size. FM3 Device Type 0 FM3 device type 0 does not support the following: Separate and multiplex mode Signal timing and polarity based on ALE, CS, and so on Clock output RDY functionality www.cypress.com Document No. 002-02487 Rev.** 13 Differences Among FM0+, FM3, and FM4 32-Bit Microcontrollers 19 Flash Memory (FLASH) Memory Organization Memory organization (single flash, dual-operation flash, work flash) differs in every family. Refer to the corresponding flash programming manual for details. Table 9 gives an overview. 20 General-Purpose I/O (GPIO) Ports Fast I/O (FM0+/FM4) With additional FPOERn registers, FM0+ and FM4 devices can switch GPIO output from the peripheral bus to the core bus, allowing faster output signals to be generated. The GPIO input signals can be read by either the peripheral bus or the core bus for faster access in FM0+ devices. In FM3 devices, the GPIOs are connected to the peripheral bus only. Note that some registers may not exist, depending on package size and peripheral features. Handling of Serial Chip Select (SCS) Bit (FM4) The handling of the SCSn bits of EPFR16 and EPFR23 differs among device types. Refer to the Multifunction Serial (MFS) Interface section. 21 Graphic Display Controller (GDC) FM4 device type 4 supports the GDC. 22 High-Speed Quad SPI (HSSPI) FM4 device types 3 and 4 support HSSPI. In type 4, the HSSPI is connected to the AXI bus instead of the AHB bus, allowing slightly higher throughout. 23 HyperBus Interface (HYPERBUSI) FM4 device type 4 supports the HyperBus interface. 24 Inter-IC Sound Prescaler 2 FM4 device type 4 has a different I S prescaler than other FM4 device types. Refer to the hardware manual for details. 25 Inter-IC Sound (I2S) 2 2 Document No. 002-02487 Rev.** 14 FM0+ type 2 and FM4 type 5 devices support only I S master mode (MFS-I2S). All other devices, which have I S, support master and slave mode. Refer to the peripheral manual for details. www.cypress.com Differences Among FM0+, FM3, and FM4 32-Bit Microcontrollers 26 Interrupts (IRQ) Interrupt Vector Tables Many FM0+ and FM3 interrupt vectors are shared with different peripherals. FM4 interrupt vectors are mainly distributed to individual peripherals. Refer to the tables in the Features section. Interrupt Monitoring (Batch Read Registers) The interrupt monitoring registers retrieve the interrupt cause of a specific peripheral that has a shared interrupt vector with others. Although FM4 devices have individual vectors, the monitoring registers can be used to retrieve the cause by reading the dedicated monitoring register instead of reading the interrupt flags of the peripheral registers. The contents of the Batch Read Registers differ among FM0+, FM3, and FM4 devices. Interrupt Source Selection (FM0+: IRQ Redirect) FM0+ devices have eight selectable interrupt vectors, which can be connected to the interrupts of peripherals, as described in Table 23. Table 23. FM0+ Interrupt Redirect Sources Peripheral (Interrupt Type 1-B) Peripheral (Interrupt Type 2-B) EXTINT 0 – 11 EXTINT 0 – 11 BT 0 – 7 BT 0 – 7 MFS Rx 0 – 3 MFS Rx 0 – 3 MFT0/1/2 MFT0 DMA0 – 4 MFS Rx 8 – 15 MFS Tx 8 – 15 Note that these selectable interrupts are available only when using IRQCMODE = 1. The advantage of these interrupts is that a specific flag bit of an interrupt monitoring register can be selected even if the corresponding interrupt cause of this bit shares its vector with others. Interrupt Source Selection (FM4: IRQ Redirect) FM4 devices have eight selectable interrupt vectors, which can be connected to the interrupts of peripherals, as given in Table 24. Table 24. FM4 Interrupt Redirect Sources The advantage of these interrupts is that a specific flag bit of an interrupt monitoring register can be selected even if the corresponding interrupt cause of this bit shares its vector with others. Peripheral EXTINT 0 – 7 QPRC0/1 MFT0/1/2 DTIF PPG0/2/4/8/10/12/16/18/20 BT0 – 7 DT www.cypress.com Document No. 002-02487 Rev.** 15 Differences Among FM0+, FM3, and FM4 32-Bit Microcontrollers FM0+ Interrupt Vectors FM0+ device series have two alternative interrupt vector tables depending on device type. The functionality of interrupts (A) and (B) is selected with the IRQCMODE setting. Table 25 lists the differences between device types. Table 25. FM0+ Interrupt Types Device Type Interrupt Relocation 1 Available 2 IRQCMODE Setting References 0: No relocation Interrupts (1-A) 1: Relocation Interrupts (1-B) 0: No relocation Interrupts (2-A) 1: Relocation Interrupts (2-B) Available FM3 Interrupt Vectors There are three possible configurations of the interrupt vector table, depending on the FM3 device type. Refer to the peripheral manual for interrupts (A), (B), and (C). Table 26 lists the differences by device type. Table 26. FM3 Interrupt Types Device Type Interrupt Relocation IRQCMODE Setting References 0 to 2 Not available – Interrupts (A) 3, 7 Not available – Interrupts (C) 4 to 6, 8 to 12 0: No relocation Interrupts (A) 1: Relocation Interrupts (B) Available FM3 Device Type 2 FM3 device type 2 products have an additional DQESEL register, which allows replacing several interrupts with the endpoint interrupts of the second USB (USB1) peripheral. Refer to the peripheral manual for details. FM4 Interrupt Vectors There are three possible configurations of the interrupt vector table depending on the FM4 device type. Refer to the peripheral manual for interrupts (A) and (B). Table 27 lists the differences by device type. Table 27. FM4 Interrupt Types Device Type 27 Interrupt Relocation IRQCMODE Setting References 1 to 3, 5, 6 Not available Not available Interrupts (A) 4 Not available Not available Interrupts (B) Liquid Crystal Display (LCD) The LCD peripheral is identical for all FM3 devices. The LCD controller of FM0+ type 1 and type 2 differs. Refer to the peripheral manual for details. FM4 does not provide an LCD peripheral. www.cypress.com Document No. 002-02487 Rev.** 16 Differences Among FM0+, FM3, and FM4 32-Bit Microcontrollers 28 Low-Power Modes (LPM) FM0+ Modes FM0+ devices provide Sleep, Timer, RTC, and Stop modes. Devices other than type 1 also provide Deep Standby RTC and Deep Standby Stop modes. FM3 Modes Depending on the FM3 device type, the low power consumption modes listed in Table 28 are available. Table 28. FM3 Low-Power Modes Mode Category Mode Type 0, 1, 2, 4 Type 3, 7 Type 5, 6, 8, 9, 12 Type 10, 11 SLEEP √ √ √ √ TIMER √ √ √ √ √ √ √ √ √ √ Standby RTC √ STOP DS-RTC √ DS-RTC (with RAM retention) √ Deep Standby √ DS-STOP DS-STOP (with RAM retention) √ √ FM3 device types 6 and 8 to 12 support a sub oscillator voltage control register. FM3 device types 6 and 7 to 12 support a sub clock control register. All other FM3 device types do not support these registers. FM4 Modes FM4 devices provide Sleep, Timer, RTC, Stop, Deep Standby RTC, and Deep Standby Stop modes. The real-time clock and backup registers are part of the VBAT domain (except type 5). FM4 type 3 devices provide an additional bit for HDMI-CEC/remote control for sub clock connection. 29 Low-Voltage Detection (LVD) Voltage Range The voltage range differs among device types. Depending on the current consumption groups and voltage range, the thresholds of generating an interrupt and reset are different. Refer to the peripheral manual of the device type in use for details. For FM4 type 1 and 2, the handling of the Deep Standby Return Enable Register (WIER) differs from that of the other types. Refer to the peripheral manual for details. Reset Detection Bit FM4 devices provide this bit. FM3 device types 3 and 7 provide an additional LVDH bit, which indicates a low-voltage detection reset besides the power-on reset bit. FM0+ devices do not provide this bit. www.cypress.com Document No. 002-02487 Rev.** 17 Differences Among FM0+, FM3, and FM4 32-Bit Microcontrollers 30 Multifunction Serial (MFS) Interface Feature Differences Table 29 lists the main differences among the FM families. Table 29. MFS Features and Differences Feature Automatic Chip Select Signal (SCS1) FM0+ Up to 44 √ √ Up to 1284 SDA/SCL Read and Write in I2C Mode2 8 64 Type >5 √ √ √ 9 Bits 16 Bits I2C Noise Filter3 Maximum Data Width per Single Transfer FM4 Up to 44 Serial Timer TX- and RX-FIFO Depth FM3 16 Bits 1 SCS pin is not available for every MFS and depends on package size. Refer to the corresponding datasheet for availability. 2 This functionality is intended to read the bus state and to force the bus to certain values for I2C bus error corrections. 3 Register structure differs between FM3 and FM4. 4 Refer to the corresponding datasheet. Chip Select Pin Independent Operation (FM4) Device types 1 and 2 differ in functionality. Refer to the corresponding peripheral manual. Chip Select Pin Round-Robin Operation (FM4) Device types 1 and 2 do not support this functionality. Serial Chip Select Format/Timing and Transfer Byte Register (FM4) Depending on the number of available chip select pins, the number of SCSFRn, SCSTRn, and TBYTEn registers differs. In general, FM4 device types 1 and 2 provide only one chip select signal. Extended Serial Control Register (ESCR) (FM0+/FM4) Device types 1 and 2 do not provide the Serial Chip Select Format Enable Bit (CSFE). This bit is provided in all FM0+ devices. Serial Chip Select Control/Status Register (SCSCR) (FM0+/FM4) Device types 1 and 2 do not provide the SST1, SST0, SED0/1, SCD0/1, CSEN1/2/3 bits. These bits are provided in all FM0+ devices. www.cypress.com Document No. 002-02487 Rev.** 18 Differences Among FM0+, FM3, and FM4 32-Bit Microcontrollers 31 Multifunction Timer (MFT) Due to the complexity of the MFT, this section gives an overview of the MFT revisions. It does not explain the differences in the features in detail. It is strongly recommended that you refer to the corresponding peripheral manual for the exact details of the differences. FM0+ and FM4 devices use almost the same MFT macro, but different from that of FM3. It is possible to set the FM0+/FM4 MFT in FM3 compatibility mode. However, because some register names and functionalities are different, note that this compatibility mode is functional only and not one-to-one software compatible. The main difference in the two kinds of MFT is the ADC Compare Unit (ADCMP). For FM0+/FM4 devices, it provides a much more complex connection and more trigger possibilities for the ADC units. It needs dedicated configuration settings. 31.1 Feature Differences Table 30 lists the differences among the FM families. Table 30. MFT Features and Differences Feature FM0+ FM4 √ Free Running Timer Control Register B (TCSB) √ √ Free Running Timer Counter Mode Operation with Offset (TCSD) Type 2 Types 3–6 Free Running Timer Simultaneous Start Control Register (TCAL) √ √ Free Running Timer Control Register C (TCSC) √ Output Compare Unit Control Register A (OCSA): Buffer function of OCCP(n) register Output Compare Unit Control Register B (OCSB): FM3 compatibility mode √ √ Output Compare Unit Control Register D (OCSD): Buffer control of OCCP(n) register √ √ Free Running Timer mask counter linked with OCU buffer transfer and OCU comparison condition expansion (OSCD) Type 2 Types 3–6 Output Compare Unit Control Register E (OCSE): Several FRT state conditions compared to OCCP(n) √ √ Wave Form Generator Control Register A (WFSA) Wave Form Generator Timer Value Register (WFTA/WFTB) See WFG Control Register A (WFSA) √ Wave Form Generator RT Dead Time Timer and Filter Mode Operation, PPG Dead Timer and Filter Mode Operation Expansion (WFSA.TMD) √ Types 2–6 √ Wave Form Generator Timer Value Register (WFTM) Wave Form Generator Pulse Counter Value Register (WFTF) √ DTTIX (Dead Time Trigger Input)Digital Noise Filter Cancel Width Expansion Analog DTIF Function √ Types 3–6 Type 2 Types 3–6 √ √ ADC Compare Unit Buffer Transfer Linked with FRT Mask Counter Type 2 Types 3–6 ADC Compare Unit Start Linked with FRT Mask Counter Type 2 Types 3–6 ADC Compare Unit: FM3 compatibility mode www.cypress.com FM3 Document No. 002-02487 Rev.** 19 Differences Among FM0+, FM3, and FM4 32-Bit Microcontrollers For FM4 device types 3 to 5, the OCU/ADCMP/FRT selection range is expanded. For FM4 type 6, one MFT unit is independent. Refer to the peripheral manual for details. 3 1 . 1 . 1 W F G C o n t r o l R e g i s t e r A ( W F S A) DCK Bits FM3: Count clock cycles can be set to PCLK, 1/2, 1/4, 1/8, …, 1/64. FM0+, FM4: Count clock cycles can be set to PCLK, 1/2, 1/4, 1/8, …, 1/128. TMD Bits The modes listed in Table 31 are available to the FM families. Table 31. MFT: WFG Mode Bits WFG Operation Modes FM0+/FM4 FM3 Through √ √ RT-PPG √ √ Timer-PPG √ √ RT-Dead Timer √ √ RT-Dead Timer Filter √ PPG-Dead Timer √ PPG-Dead Timer Filter √ √ 31.1.2 MFT Noise Canceller Control Register (NZCL) Analog Noise Canceller Clock-less noise suppression is available to FM0+ type 2 and FM4 type ≥3 devices. DTIEA/DTIEB Bit (FM0+ and FM4) This bit is available to FM0+ and FM4 devices. It allows additional asynchronous (clock-less) DTTI functionality with an additional analog filter (FM4 type ≥3 devices). NWS Bits In FM3 devices, the noise-canceling width can be set from 4, 8, 16, …, to 32 PCLK cycles. In FM0+ type 2 and FM4 type 3 devices, the range is from 4, 8, 16, … to 256 PCLK cycles. Other FM0+ and FM4 devices provide a maximum of 128 PCLK cycles only. SDTI This bit has the same functionality in all FM family devices. Remaining Bits The remaining bits – DIMA, WIM10, WIM32, and WIM54 – are available only in FM0+ and FM4 devices. Refer to the peripheral manual for detailed functionality. The DTIEB, DHOLD, and DIMB bits are available only in FM0+ type 2 and FM4 type ≥3 devices. 31.1.3 WFG Interrupt Control Register (WFIR) DTIFA, DTICA, DTIFB, DTICB, DTIF, DTIC FM3 devices provide only the DTIC and DTIF bits in the WFIR. DTIFA and DTICA bits are available in all FM0+ and FM4 devices. DTIFB and DTICB bits are available only in FM0+ type 2 and FM4 type ≥3 devices, but with almost the same functionality. Refer to the peripheral manual for details. www.cypress.com Document No. 002-02487 Rev.** 20 Differences Among FM0+, FM3, and FM4 32-Bit Microcontrollers 31.1.4 ADCMP Connecting FRT Select Register (ACFS) This register is available only in FM0+ and FM4 devices. It connects several FRT channels to the ADCMP unit, which is missing in the ACSA register, which sets the FM3 compatibility mode. Refer to the peripheral manual for details. 31.1.5 ADCMP Control Register A (ACSA) In FM3 devices, the control bits connect the FRT channels to a channel of the ADCMP unit. In FM0+ and FM4 devices, the control bits enable or disable the FM3 compatibility mode. 31.1.6 ADCMP Control Register B (ACSB) This register is available only in FM3 devices. It enables and disables the ACCPn and ACCPDNn buffer functions. 31.1.7 ADCMP Control Register C and D (ACSC, ACSD) These registers are available only in FM0+ and FM4 devices. ACSC enables and disables the buffering of the ACMP register and transfers it according to the FRT connection. ACSD allows setting the ADCMP unit in offset mode. The ACSC:APBM bit is available in FM0+ type 2 and FM4 type ≥3 devices. Refer to the peripheral manual for details. 3 1 . 1 . 8 A D C M P M a s k C o m p a r e V a l u e S t o r a g e R e g i s t e r ( AC M C ) This register is available in FM0+ type 2 and FM4 type ≥3 devices. 31.1.9 OCU Control Register D (OCSD) For FM4 device types ≥3 and FM0+ device type 2, the OCSD register has additional bits to set different buffer transfer timings. This register is not available in other device types and not in FM3 in general. 32 Programmable CRC (PRGCRC) Programmable CRC is available in FM4 devices types 3 and 4. There are no differences in the peripheral register set and functionality. Other FM devices do not support programmable CRC. 33 Programmable Pulse Generator and IGBT (PPG) PPG The PPGs of FM0+, FM3, and FM4 are identical. IGBT FM0+ devices support IGBT functionality. FM3 device types 7, 8, 9, 11, and 12 support IGBT functionality. FM4 devices do not support IGBT functionality. www.cypress.com Document No. 002-02487 Rev.** 21 Differences Among FM0+, FM3, and FM4 32-Bit Microcontrollers 34 Quadrature Position and Revolution Counter The Quadrature Position and Revolution Counter (QPRC) has the following difference among the FM devices: QPRC Quadrature Counter Position Rotation Count Register (QPRCRR) This 32-bit register for reading the count and revolution in a single access is available in all FM0+ and FM4 devices that support the QPRC. For FM3 devices, this register is available only in device types greater than 2. QPRC Input Filter FM0+ and FM4 devices provide an input filtering of the QPRC pins (AIN, BIN, and ZIN). This filtering is selectable by the additional registers NFCTLA, NFCTLB, and NFCTLZ. QPRC Extension Control Register (QECR) FM4+ device types 1, 2, and 6 provide an additional PEC bit, which controls both edge counting. 35 Reset (RESET) LVD Reset Factor (FM3) There are differences in the reset factor registers among the FM3 device types. FM3 types 3 and 7 provide an additional LVDH bit, which indicates a low-voltage detection reset. Power-On Reset Factor (FM3) FM3 device types 3 and 7 provide an additional deep-standby transition reset factor indication besides power-on reset and low-voltage reset. Reset Factors (FM0+/FM4) FM0+ and FM4 devices do not provide low-voltage and deep-standby transition reset factors. 36 Real-Time Clock (RTC) 36.1 RTC Voltage Domain (FM0+/FM4) In FM4 devices and FM0+ device type 2, the RTC is located in the VBAT domain and thus can be battery buffered. Setting and reading out the RTC are handled differently in other FM families. Refer to the FM0+ and FM4 peripheral manuals for details on how to handle value transition to and from the VBAT domain. 36.2 RTC Control Block Registers 36.2.1 RTC Control Register (WTCR) The control register is split into two 32-bit registers (WTCR1 and WTCR2) in FM3 and FM0+ devices. In FM4 devices, it is split into four 8-bit registers (WTCR10, WTCR11, WTCR12, and WTCR13) and two 8-bit registers (WTCR20 and WTCR21). WTCR10 TRANS Bit (FM4) WTCR10 (comparable to lower byte of FM0+/FM3 WTCR1) has an additional TRANS bit, which indicates the completion of transfer of new RTC values to and from the VBAT domain. WTCR20 (FM4) The WTCR20 of FM4 devices has several additional bits for controlling and transferring data from and to the VBAT domain. Refer to the FM4 Family Peripheral Manual for details. 3 6 . 2 . 2 R T C C o u n t e r C yc l e S e t t i n g R e g i s t e r , C l o c k S e l e c t i o n R e g i s t e r ( W T B R / W T C L K S ) Because in FM4 and related FM0+ devices, the RTC can be clocked only by the sub clock oscillator, these registers are missing. www.cypress.com Document No. 002-02487 Rev.** 22 Differences Among FM0+, FM3, and FM4 32-Bit Microcontrollers 36.2.3 RTC Time Setting Register (WTTR) For FM0+ and FM3 devices, this register is 32 bits wide. For FM4 devices, it is split into three 8-bit registers (WTTR0, WTTR1, and WTTR2). The functionality is the same for all FM families. 36.3 RTC Clock Control Block (FM3) FM3 device types 3, 4, and 5 use Control Block (A); the other types use Control Block (B). With Control Block (B), the RTCCO output pin is connected to the RTC Clock Control Block. With Control Block (A), RTCCO is connected to the RTC Count Block. Control Block (B) supports an RTC reset signal to the RTC Clock Control Block. The RTC Count Block provides internal signal CO to the Control Block, which outputs it to the RTCCO pin as mentioned previously. Control Block (B) also supports the Frequency Correction Cycle Setting Register (WTCALPRD), which sets the period of the frequency correction. 36.4 RTC Clock Control Block (FM0+/FM4) FM0+ devices use the same RTC Clock Block (B) as FM3 devices. For FM4 devices, refer to Table 5. 36.4.1 RTC Frequenc y Correction Value Setting Register (WTCAL) WTCAL is a 16-bit-wide register in FM0+ and FM3 devices. It is split into two 8-bit registers in FM4 devices (WTCAL0 and WTCAL1). WTCAL has the same functionality in every FM family device. 36.5 RTC Backup Registers Only FM devices that have a VBAT domain provide battery-buffered backup registers. 37 SD Card Interface (SD) The SD card interface is available only in FM4 devices types 1, 3, and 4. The interfaces are identical. 38 Smart Card Interface The smart card interface is available in FM4 devices. 39 Unique ID (UID) The unique ID is available in all FM0+ and FM4 devices. For FM3 devices, refer to Table 4. 40 Universal Serial Bus (USB) USB is available in FM3 and FM4 products. Refer to the datasheet for the availability of a particular device. FM0+ device type 2 supports USB. USB IN Byte Count FM3 type 0 devices do not support an odd number of bytes using IN endpoint transfer. USB Clock Depending on the number of USB interfaces, the USB clock registers differ among FM families (registers and bits for the second USB interface missing). FM3 device type 0 does not provide the UPLLM register for the USB PLL clock. Refer to the peripheral manual for the different PLL settings of FMx devices. www.cypress.com Document No. 002-02487 Rev.** 23 Differences Among FM0+, FM3, and FM4 32-Bit Microcontrollers 41 Watch Counter (WC) The watch counter is supported by all FM families. Prescaler (FM3) FM3 device type 12 uses a prescaler setting (more dividers, LS-CR clockable) different from other device types. Refer to the peripheral manual for details. Prescaler (FM0+/FM4) FM0+ and FM4 devices use the same prescaler. 42 Software and Hardware Watchdog Counter The Watchdog Counter (WDG) has the following differences among the FM families: 42.1 WDG Register Differences Software Watchdog Timer Control Register (WdogCont rol) FM3 devices do not provide SPM (Window function) and TWD (Window period) bits. Software Watchdog Timer Window Watchdog Mode Control Register (WdogSPMC) This register is not provided in FM3 devices. 43 VBAT Domain (VBAT) The VBAT voltage domain is available only in FM4 devices (except type 5) and FM0+ type 2 devices. It contains the sub clock oscillator, the RTC, and the backup registers. Refer to Table 5. Resources in Different FM4 Device Types . 44 Summary This application note showed the differences among FM0+, FM3, and FM4 MCUs. After reading this application note, you should have a clear overview of the system-level considerations when using an MCU of the FM family for your next project. About the Author Name: Marc Willam Title: Applications Engineer Background: Marc Willam’s areas of expertise include logic design, applications, customer support, and software development. www.cypress.com Document No. 002-02487 Rev.** 24 Differences Among FM0+, FM3, and FM4 32-Bit Microcontrollers Document History Document Title: AN202487 - Differences Among FM0+, FM3, and FM4 32-Bit Microcontrollers Document Number: 002-02487 Revision ** ECN 5048991 www.cypress.com Orig. of Change Submission Date MAWI 12/14/2015 Description of Change New application note Document No. 002-02487 Rev.** 25 Differences Among FM0+, FM3, and FM4 32-Bit Microcontrollers Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. 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Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement. www.cypress.com Document No. 002-02487 Rev.** 26