Document No.001-97372 Rev. *A ECN #4798763 Cypress Semiconductor Product Qualification Report QTP# 144504 VERSION*A June 2015 36 Meg Standard Synchronous and NoBL Family LL65P-25ODR Technology, UMC Fab 12A CY7C1440KV25 CY7C1440KV33 CY7C1440KVE33 CY7C1441KV25 CY7C1441KV33 CY7C1441KVE33 CY7C1442KV33 CY7C1443KV33 CY7C1444KV33 CY7C1445KV33 CY7C1460KV25 CY7C1460KV33 CY7C1460KVE25 CY7C1460KVE33 CY7C1461KV33 CY7C1462KV25 CY7C1462KV33 CY7C1462KVE25 CY7C1462KVE33 CY7C1463KV33 36-Mbit (1M x 36) Pipelined Sync SRAM 36-Mbit (1M x 36) Pipelined Sync SRAM (with ECC) 36-Mbit (1M x 36) Flow-through SRAM 36-Mbit (1M x 36) Flow-through SRAM (with ECC) 36-Mbit (2M x 18) Pipelined Sync SRAM 36-Mbit (2M x 18) Flow-through SRAM 36-Mbit (1M x 36) Pipelined DCD Sync SRAM 36-Mbit (2M x 18) Pipelined DCD Sync SRAM 36-Mbit (1M x 36) Pipelined SRAM with NoBL (TM) Architecture 36-Mbit (1M x 36) Pipelined SRAM with NoBL (TM) Architecture (with ECC) 36-Mbit (1M x 36) Flow-through SRAM with NoBL (TM) Architecture 36-Mbit (2M x 18) Pipelined SRAM with NoBL (TM) Architecture 36-Mbit (2M x 18) Pipelined SRAM with NoBL (TM) Architecture (with ECC) 36-Mbit (2M x 18) Flow-through SRAM with NoBL (TM) Architecture FOR ANY QUESTIONS ON THIS REPORT, PLEASE CONTACT [email protected] or via a CYLINK CRM CASE Prepared By: Josephine Pineda (JYF) Reliability Engineer Reviewed By: Zhaomin Ji (ZIJ) Reliability Manager Approved By: Don Darling (DCDA) Reliability Director Company Confidential A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision. Page 1 of 13 Document No.001-97372 Rev. *A ECN # 4798763 QUALIFICATION HISTORY QTP Number Description of Qualification Purpose Date Comp 091706 Qualification of 65nm (LL65) Technology at UMC Fab 12A and New Device CY7C1553K Base Die Product Family Aug 2009 144504 Qualification of 36 Meg Standard Synchronous and NoBL Family , LL65P-25ODR Technology at UMC Fab 12A April 2015 Company Confidential A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision. Page 2 of 13 Document No.001-97372 Rev. *A ECN # 4798763 PRODUCT DESCRIPTION (for qualification) Qualify 36 Meg Standard Synchronous and NoBL Family , LL65P-25ODR Qualification Purpose: Technology at UMC Fab 12A Device Description: CY7C1440KV25/ CY7C1440KV33/ CY7C1440KVE33/ CY7C1441KV25/CY7C1441KV33/ CY7C1441KVE33/ CY7C1442KV33/ CY7C1443KV33/CY7C1444KV33/ CY7C1445KV33/ CY7C1460KV25/ CY7C1460KV33/ CY7C1460KVE25/ CY7C1460KVE33/ CY7C1461KV33/ CY7C1462KV25/CY7C1462KV33/ CY7C1462KVE25/ CY7C1462KVE33/ CY7C1463KV33 LL65 36 Meg Sync/NoBL SRAM Cypress Division: Cypress Semiconductor Corporation –Memory Product Division Marketing Part #: TECHNOLOGY/FAB PROCESS DESCRIPTION – LL65P-18R Number of Metal Layers: 5+RDL Metal Metal 1: Cu 0.18um Composition: Metal 2: Cu 0.22um Metal 3: Cu 0.22um Metal 4: Cu 0.36um Metal 5: Cu 1.25um Metal 6 (RDL): Al 1.2um Passivation Type and Materials: 0.4um Oxide / 0.5um Nitride Number of Transistors in Device ~600M Number of Logic Gates in Device ~300M Generic Process Technology/Design Rule (µ-drawn): 65nm Gate Oxide Material/Thickness (MOS): 19.5A Name/Location of Die Fab (prime) Facility: UMC Fab 12 Die Fab Line ID/Wafer Process ID: LLL65P-25ODR PACKAGE AVAILABILITY PACKAGE WIRE MATERIAL ASSEMBLY FACILITY SITE QTP NUMBER 165 FBGA CuPd CML-RA QTP# 144603 100L TQFP CuPd CML-RA QTP# 150503 Note: Package Qualification details upon request Company Confidential A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision. Page 3 of 13 Document No.001-97372 Rev. *A ECN # 4798763 MAJOR PACKAGE INFORMATION USED IN THIS QUALIFICATION Package Designation: Package Outline, Type, or Name: Mold Compound Name/Manufacturer: Mold Compound Flammability Rating: BB165/BW165 165-Fine Ball Grid Array (15x17x1.4mm) GR9810/Henkel UL-94 V0 Oxygen Rating Index: 54% (typical) / 28 (min. value) Substrate Material: BT Resin Lead Finish, Composition / Thickness: SAC405 Die Backside Preparation Method/Metallization: Backgrind Die Separation Method: Saw Die Attach Supplier: Henkel Die Attach Material: ATB125-US1 Die Attach Film Bond Diagram Designation: 001-95407/ 001-69504 Wire Bond Method: Thermosonic Wire Material/Size: CuPd, 0.8 mil Thermal Resistance Theta JA °C/W: 14.24°C/W Package Cross Section Yes/No: No Assembly Process Flow: 11-21099 Name/Location of Assembly (prime) facility: CML-RA MSL Level 3 Reflow Profile 260C ELECTRICAL TEST / FINISH DESCRIPTION Test Location: CML-RA Note: Please contact a Cypress Representative for other packages availability Company Confidential A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision. Page 4 of 13 Document No.001-97372 Rev. *A ECN # 4798763 MAJOR PACKAGE INFORMATION USED IN THIS QUALIFICATION Package Designation: Package Outline, Type, or Name: Mold Compound Name/Manufacturer: Mold Compound Flammability Rating: AZ100 100L-Thin Quad Flat Package (14x20x1.4mm) G700SY/Sumitomo UL-94 V0 Oxygen Rating Index: 54% (typical) / 28 (min. value) Leadframe Material: Copper Lead Finish, Composition / Thickness: NiPdAu Die Backside Preparation Method/Metallization: Backgrind Die Separation Method: Saw Die Attach Supplier: Henkel Die Attach Material: QMI 509 Bond Diagram Designation: 001-69322/001-95403 Wire Bond Method: Thermosonic Wire Material/Size: CuPd, 0.8 mil Thermal Resistance Theta JA °C/W: 35.36°C/W Package Cross Section Yes/No: No Assembly Process Flow: 11-21099 Name/Location of Assembly (prime) facility: CML-RA MSL Level 3 Reflow Profile 260C ELECTRICAL TEST / FINISH DESCRIPTION Test Location: CML-RA Company Confidential A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision. Page 5 of 13 Document No.001-97372 Rev. *A ECN # 4798763 RELIABILITY TESTS PERFORMED PER SPECIFICATION REQUIREMENT Stress/Test Acoustic Microscopy Age Bond Strength Test Condition (Temp/Bias) J-STD-020 Precondition: JESD22 Moisture Sensitivity Level (192 Hrs., 30C, 60% RH, 260C Reflow) 200C, 4HRS MIL-STD-883, Method 883-2011 Dynamic Latch-up JESD78 Electrostatic Discharge Charge Device Model (ESD-CDM) Electrostatic Discharge Human Body Model (ESD-HBM) Electrostatic Discharge Machine Model (ESD-MM) 500V/750V/1,000V/1,250V/1,500V/2,0000V JESD22-C101 1,100V/2,200V/3,300V/4,000V/5,000V/6,000V JESD22-A114 High Accelerated Saturation Test (HAST) High Temperature Operating Life Early Failure Rate High Temperature Operating Life Latent Failure Rate High Temperature Steady State Life High Temperature Storage Low Temperature Operating Life Pressure Cooker Pre/Post LFR AC/DC Char Soft Error (Alpha Particle) Static Latch-up Temperature Cycle Temperature Humidity Bias Test (THB) 200V, JESD22-A115 JEDEC STD 22-A110: 130°C, 85%RH, 2.25V Precondition: JESD22 Moisture Sensitivity Level (192 Hrs., 30C, 60% RH, 260C Reflow) Dynamic Operating Condition, Boost Regulated at Core 1.45V, External 2.05V, 125°C Dynamic Operating Condition, 2.5V, 150°C JESD22-A108 Dynamic Operating Condition, Boost Regulated at Core 1.45V, External 2.05V, 125°C /150°C Dynamic Operating Condition, 2.5V, 150°C JESD22-A108 Static Operating Condition, Vcc Max= 2.25V, 150°C JESD22-A108 JESD22-A103:150°C No bias Dynamic Operating Condition, Vcc = 2.25V, -30°C JESD22-A108 JESD22-A102: 121C, 100%RH, 15 PSIG Precondition: JESD22 Moisture Sensitivity Level (192 Hrs., 30C, 60% RH, 260C Reflow) AC/DC Critical Parameter Char at LFR 0hr,80hrs, 500hrs & 1000hrs JESD89 85°C , 140mA/85°C , 200mA 125°C , 140mA/125°C , 240mA JESD78 MIL-STD-883, Method 1010, Condition C, -65°C to 150°C Precondition: JESD22 Moisture Sensitivity Level (192 Hrs., 30C, 60% RH, 260C Reflow) JESD22-A101: 85°C/ 85% RH , 2.25V Precondition: JESD22 Moisture Sensitivity Level (192 Hrs., 30C, 60% RH, 260C Reflow) Company Confidential A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision. Page 6 of 13 Result P/F P P P P P P P P P P P P P P P P P P Document No.001-97372 Rev. *A ECN # 4798763 RELIABILITY FAILURE RATE SUMMARY Stress/Test Device Tested/ Device Hours # Fails Activation Energy Thermal AF3 Failure Rate High Temperature Operating Life Early Failure Rate1 1,499 Devices 0 N/A N/A 0 PPM High Temperature Operating Life,2 Long Term Failure Rate (150°C) 147,000 DHRs 0 0.7 170 High Temperature Operating Life2 Long Term Failure Rate (125°C) 356,000 DHRs 0 0.7 55 21 FIT 1 Assuming an ambient temperature of 55°C and a junction temperature rise of 15°C. Chi-squared 60% estimations used to calculate the failure rate.. 3 Thermal Acceleration Factor is calculated from the Arrhenius equation 2 E 1 1 AF = exp A - k T 2 T1 where: EA =The Activation Energy of the defect mechanism. k = Boltzmann's constant = 8.62x10-5 eV/Kelvin. T1 is the junction temperature of the device under stress and T2 is the junction temperature of the device at use conditions. 1 Early Failure Rate was computed from QTP# 144504 data. 2 Long Term Failure Rate was computed from QTP# 091706 and QTP# 144504 Data. Company Confidential A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision. Page 7 of 13 Document No.001-97372 Rev. *A ECN # 4798763 Reliability Test Data QTP #:091706 Device Fab Lot # Assy Lot # Ass Loc Duration Samp Rej Failure Mechanism STRESS: ACOUSTIC, MSL3 CY7C1514KV18 (7C1553K) 8842022 610851583 TAIWN-G COMP 15 0 CY7C1514KV18 (7C1553K) 8844020 610854240 TAIWN-G COMP 15 0 CY7C1514KV18 (7C1553K) 8844022 610906896 TAIWN-G COMP 15 0 STRESS: AGE BOND STRENGTH CY7C1514KV18 (7C1553K) 8842022 610851583 TAIWN-G COMP 5 0 CY7C1514KV18 (7C1553K) 8844020 610854240 TAIWN-G COMP 5 0 CY7C1514KV18 (7C1553K) 8844022 610906896 TAIWN-G COMP 5 0 610417278 CML-R COMP 3 0 STRESS: DYNAMIC LATCH-UP CY7C1470V33 (7C1470A) 4321389 STRESS: ESD-CHARGE DEVICE MODEL, 500V CY7C1514KV18 (7C1553K) 8842022 610852338 TAIWN-G COMP 9 0 CY7C1514KV18 (7C1553K) 8844020 610854240 TAIWN-G COMP 9 0 CY7C1514KV18 (7C1553K) 8844022 610906896 TAIWN-G COMP 9 0 STRESS: ESD-HUMAN BODY CIRCUIT PER JEDEC EIA/JESD22-A114, 2,200V CY7C1514KV18 (7C1553K) 8842022 610852338 TAIWN-G COMP 8 0 CY7C1514KV18 (7C1553K) 8844020 610854240 TAIWN-G COMP 8 0 CY7C1514KV18 (7C1553K) 8844022 610906896 TAIWN-G COMP 8 0 CY7C1514KV18 (7C1553K) 8844021 610908348 TAIWN-G COMP 8 0 610852338 TAIWN-G COMP 5 0 STRESS: ESD-MACHINE MODEL, 200V CY7C1514KV18 (7C1553K) 8842022 STRESS: HI-ACCEL SATURATION TEST, 130C, 85%RH, 2.25V, PRE COND 192 HR 30C/60%RH, MSL3 CY7C1514KV18 (7C1553K) 8844020 610854240 TAIWN-G 128 78 0 CY7C1514KV18 (7C1553K) 8844022 610906896 TAIWN-G 128 77 0 STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-EARLY FAILURE RATE, 125C, BOOST REGULATED AT CORE 1.45V, EXTERNAL 2.05V CY7C15631KV18 (7C1553K) 8908001 610920385 TAIWN-G 96 2367 0 CY7C15631KV18 (7C1553K) 8912000 610920386 TAIWN-G 96 2217 0 CY7C15631KV18 (7C1553K) 8910015 610920548 TAIWN-G 96 1321 0 Company Confidential A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision. Page 8 of 13 Document No.001-97372 Rev. *A ECN # 4798763 Reliability Test Data QTP #:091706 Device Fab Lot # Assy Lot # Ass Loc Duration Samp Rej Failure Mechanism STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-LATENT FAILURE RATE, 150C, BOOST REGULATED AT CORE 1.45V, EXTERNAL 2.05V CY7C1514KV18 (7C1553K) 8844021 610908348 TAIWN-G 500 178 0 STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-LATENT FAILURE RATE, 125C, BOOST REGULATED AT CORE 1.45V, EXTERNAL 2.05V CY7C1514KV18 (7C1553K) 8844020 610854240 TAIWN-G 1000 178 0 CY7C1514KV18 (7C1553K) 8844022 610906896 TAIWN-G 1000 178 0 TAIWN-G 336 77 0 TAIWN-G 1000 70 0 STRESS: HIGH TEMP STEADY STATE LIFE TEST, 150C, 2.25V, Vcc Max CY7C1514KV18 (7C1553K) 8844020 610854240 STRESS: HIGH TEMPERATURE STORAGE, PLASTIC, 150C CY7C1514KV18 (7C1553K) 8844020 610851583 STRESS: LOW TEMP DYNAMIC OPERATING LIFE-LATENT FAILURE RATE, -30C, 2.25V Vcc CY7C1514KV18 (7C1553K) 8842022 610852338 TAIWN-G 500 45 0 STRESS: PRESSURE COOKER TEST, 121C, 100%RH, 15 Psig, PRE COND 192 HR 30C/60%RH, MSL3 CY7C1514KV18 (7C1553K) 8842022 610851583 TAIWN-G 168 76 0 CY7C1514KV18 (7C1553K) 8844020 610854240 TAIWN-G 168 78 0 CY7C1514KV18 (7C1553K) 8844022 610906896 TAIWN-G 168 77 0 STRESS: Pre-/ Post HIGH TEMP DYNAMIC OPERATING LIFE-LATENT FAILURE RATE CHAR CY7C1514KV18 (7C1553K) 8844020 610854240 TAIWN-G COMP 10 0 STRESS: STATIC LATCH-UP TESTING, 125C, 3.42V, +/-240mA CY7C1514KV18 (7C1553K) 8844020 610854680 TAIWN-G COMP 9 0 CY7C1514KV18 (7C1553K) 8844022 610906896 TAIWN-G COMP 9 0 CY7C1514KV18 (7C1553K) 8844021 610908348 TAIWN-G COMP 9 0 CY7C15631KV18 (7C1553K) 8911000 610922436 TAIWN-G COMP 9 0 STRESS: TEMPERATURE CYCLE COND. C -65C TO 150C, PRE COND 192 HRS 30C/60%RH, MSL3 CY7C1514KV18 (7C1553K) 8842022 610851583 TAIWN-G 1000 77 0 CY7C1514KV18 (7C1553K) 8844020 610854240 TAIWN-G 1000 78 0 CY7C1514KV18 (7C1553K) 8844022 610906896 TAIWN-G 1000 77 0 STRESS: TEMPERATURE HUMIDITY TEST, 85C, 85%RH, 2.25V, PRE COND 192 HR 30C/60%RH, MSL3 CY7C1514KV18 (7C1553K) 8842022 610851583 TAIWN-G 1000 77 0 Company Confidential A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision. Page 9 of 13 Document No.001-97372 Rev. *A ECN # 4798763 Reliability Test Data QTP #:091706 Device Fab Lot # Assy Lot # Ass Loc Duration Samp Rej Failure Mechanism STRESS: SER – ALPHA PARTICLE, 3-TEPM, 3-VOLTAGE, @ 85C, Vcc Nom CY7C1514KV18 (7C1553K) 8842022 610851583 TAIWN-G COMP 3 610851583 TAIWN-G COMP 1WF 0 STRESS: X-SECTION/STEM XY AUDIT CY7C1514KV18 (7C1553K) 8842022 Company Confidential A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision. Page 10 of 13 Document No.001-97372 Rev. *A ECN # 4798763 Reliability Test Data QTP #:144504 Device Fab Lot # Assy Lot # Ass Loc Duration Samp Rej 611446421 CML-RA COMP 15 0 CY7C1460KVE25 (7CP14602K) 9441004 611446421 CML-RA 500 9 0 CY7C1460KVE25 (7CP14602K) 9441004 611446421 CML-RA 750 3 0 CY7C1460KVE25 (7CP14602K) 9441004 611446421 CML-RA 1000 3 0 CY7C1460KVE25 (7CP14602K) 9441004 611446421 CML-RA 1250 3 0 CY7C1460KVE25 (7CP14602K) 9441004 611446421 CML-RA 1500 3 0 CY7C1460KVE25 (7CP14602K) 9441004 611446421 CML-RA 1750 3 0 CY7C1460KVE25 (7CP14602K) 9441004 611446421 CML-RA 2000 3 0 Failure Mechanism STRESS: ACOUSTIC, MSL3 CY7C1460KVE25 (7CP14602K) 9441004 STRESS: ESD-CHARGE DEVICE MODEL STRESS: ESD-HUMAN BODY CIRCUIT PER JEDEC EIA/JESD22-A114 CY7C1460KVE25 (7CP14602K) 9441004 611446421 CML-RA 1100 3 0 CY7C1460KVE25 (7CP14602K) 9441004 611446421 CML-RA 2200 8 0 CY7C1460KVE25 (7CP14602K) 9441004 611446421 CML-RA 3300 3 0 CY7C1460KVE25 (7CP14602K) 9441004 611446421 CML-RA 4000 3 0 CY7C1460KVE25 (7CP14602K) 9441004 611446421 CML-RA 5000 3 0 CY7C1460KVE25 (7CP14602K) 9441004 611446421 CML-RA 6000 3 0 611446421 CML-RA COMP 5 0 1499 0 STRESS: ESD-MACHINE MODEL, 200V CY7C1460KVE25 (7CP14602K) 9441004 STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-EARLY FAILURE RATE , 150C, 2.5V CY7C1460KVE25 (7CP14602K) 9441004 611446421 CML-RA 48 STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-EARLY FAILURE RATE –REG-ON, 150C, 2.5V CY7C1460KVE25 (7CP14602K) 9441004 611446421 CML-RA 48 45 0 STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-LATENT FAILURE RATE, 150C, 2.5V CY7C1460KVE25 (7CP14602K) 9441004 611446421 CML-RA 80 116 0 CY7C1460KVE25 (7CP14602K) 9441004 611446421 CML-RA 500 116 0 Company Confidential A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision. Page 11 of 13 Document No.001-97372 Rev. *A ECN # 4798763 Reliability Test Data QTP #:144504 Device Fab Lot # Assy Lot # Ass Loc Duration Samp Rej Failure Mechanism STRESS: PRE/POST LFR CRITICAL PARAMETERS CY7C1460KVE25 (7CP14602K) 9441004 611446421 CML-RA 0 10+2 0 CY7C1460KVE25 (7CP14602K) 9441004 611446421 CML-RA 80 10+2 0 CY7C1460KVE25 (7CP14602K) 9441004 611446421 CML-RA 500 10+2 0 STRESS: PRESSURE COOKER TEST, 121C, 100%RH, 15 Psig, PRE COND 192 HR 30C/60%RH, MSL3 CY7C1460KVE25 (7CP14602K) 9441004 611446421 CML-RA 168 80 0 CY7C1460KVE25 (7CP14602K) 9441004 611446421 CML-RA 288 80 0 CML-RA COMP 6 0 COMP 3 0 COMP 3 0 STRESS: STATIC LATCH-UP TESTING, 85C, 5.4V, +/-140mA CY7C1460KVE25 (7CP14602K) 9441004 611446421 STRESS: STATIC LATCH-UP TESTING, 85C, 5.94V, +/-200mA CY7C1460KVE25 (7CP14602K) 9441004 611446421 CML-RA STRESS: STATIC LATCH-UP TESTING, 125C, 5.4V, +/-140mA CY7C1460KVE25 (7CP14602K) 9441004 611446421 CML-RA STRESS: TEMPERATURE CYCLE COND. C -65C TO 150C, PRE COND 192 HRS 30C/60%RH, MSL3 CY7C1460KVE25 (7CP14602K) 9441004 611446421 CML-RA 500 79 0 CY7C1460KVE25 (7CP14602K) 9441004 611446421 CML-RA 1000 79 0 Company Confidential A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision. Page 12 of 13 Document No.001-97372 Rev. *A ECN #4798763 Document History Page Document Title: QTP# 144504: 36 MEG SYNCHRONOUS NOBL FAMILY,LL65P-25ODR TECHNOLOGY, UMC FAB 12A 001-97372 Document Number: Rev. ECN Orig. of No. Change ** 4744116 JYF Description of Change *A Changed QTP title from “36 Meg Synchronous NoBL Family LL65P25ODR Technology, UMC Fab 12A” to “36 Meg Standard Synchronous and NoBL Family LL65P-25ODR Technology, UMC Fab 12A” in QTP title page (page 1); Aligned qualification purpose in pages 2 & 3. 4798763 JYF Initial spec release. Distribution: WEB Posting: None Company Confidential A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision. Page 13 of 13