PD - 9.1525 IRF9Z34NS/L HEXFET® Power MOSFET Advanced Process Technology Surface Mount (IRF9Z34NS) l Low-profile through-hole (IRF9Z34NL) l 175°C Operating Temperature l Fast Switching l P-Channel l Fully Avalanche Rated Description l D l VDSS = -55V RDS(on) = 0.10Ω G Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The D2Pak is a surface mount power package capable of accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible onresistance in any existing surface mount package. The D2 Pak is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0W in a typical surface mount application. The through-hole version (IRF9Z34NL) is available for lowprofile applications. ID = -19A S D 2 Pak T O -2 6 2 Absolute Maximum Ratings Parameter ID @ TC = 25°C ID @ TC = 100°C IDM PD @TA = 25°C PD @TC = 25°C VGS EAS IAR EAR dv/dt TJ TSTG Continuous Drain Current, V GS @ -10V Continuous Drain Current, V GS @ -10V Pulsed Drain Current Power Dissipation Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Max. Units -19 -14 -68 3.8 68 0.45 ± 20 180 -10 6.8 -5.0 -55 to + 175 A W W W/°C V mJ A mJ V/ns °C 300 (1.6mm from case ) Thermal Resistance Parameter RθJC RθJA Junction-to-Case Junction-to-Ambient ( PCB Mounted,steady-state)** Typ. Max. Units ––– ––– 2.2 40 °C/W 8/25/97 IRF9Z34NS/L Electrical Characteristics @ TJ = 25°C (unless otherwise specified) RDS(on) VGS(th) gfs Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Qg Qgs Qgd td(on) tr t d(off) tf Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Min. -55 ––– ––– -2.0 4.2 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– Typ. ––– -0.05 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– 13 55 30 41 IDSS Drain-to-Source Leakage Current LS Internal Source Inductance ––– 7.5 Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance ––– ––– ––– 620 280 140 V(BR)DSS ∆V(BR)DSS/∆TJ I GSS Max. Units Conditions ––– V VGS = 0V, ID = -250µA ––– V/°C Reference to 25°C, ID = -1mA 0.10 Ω VGS = -10V, I D = -10A -4.0 V VDS = VGS , ID = -250µA ––– S V DS = -25V, I D = -10A -25 VDS = -55V, VGS = 0V µA -250 VDS = -44V, VGS = 0V, TJ = 150°C 100 V GS = 20V nA -100 VGS = -20V 35 I D = -10A 7.9 nC VDS = -44V 16 VGS = -10V, See Fig. 6 and 13 ––– VDD = -28V ––– I D = -10A ns ––– R G = 13Ω ––– RD = 2.6Ω, See Fig. 10 Between lead, nH ––– and center of die contact ––– VGS = 0V ––– pF VDS = -25V ––– ƒ = 1.0MHz, See Fig. 5 Source-Drain Ratings and Characteristics IS ISM V SD t rr Q rr t on Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time Min. Typ. Max. Units Conditions D MOSFET symbol ––– ––– -19 showing the A G integral reverse ––– ––– -68 p-n junction diode. S ––– ––– -1.6 V TJ = 25°C, IS = -10A, VGS = 0V ––– 54 82 ns TJ = 25°C, IF = -10A ––– 110 160 nC di/dt = -100A/µs Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) Notes: Repetitive rating; pulse width limited by Pulse width ≤ 300µs; duty cycle ≤ 2%. max. junction temperature. ( See fig. 11 ) Starting TJ = 25°C, L = 3.6mH Uses IRF9Z34N data and test conditions RG = 25Ω, I AS = -10A. (See Figure 12) I SD ≤ -10A, di/dt ≤ -290A/µs, VDD ≤ V(BR)DSS , TJ ≤ 175°C ** When mounted on 1" square PCB (FR-4 or G-10 Material ). For recommended footprint and soldering techniques refer to application note #AN-994. IRF9Z34NS/L 100 100 VGS - 15V - 10V - 8.0V - 7.0V - 6.0V - 5.5V - 5.0V BOTT OM - 4. 5V -ID , D ra in -to -S o u rc e C u rre n t (A ) -ID , D ra in -to -S o u rc e C u rre n t (A ) 10 -4 .5V 2 0µ s PU LS E W ID TH TTcJ = = 25°C 2 5°C A 1 0.1 1 10 10 -4 .5V 100 0.1 R D S (o n ) , D ra in -to -S o u rc e O n R e si sta n ce (N o rm a li ze d ) -I D , D rain -to- S our ce C urr ent ( A ) 2.0 T J = 2 5 °C T J = 1 7 5 °C 10 V DS = -2 5 V 2 0 µ s P U L S E W ID T H 6 7 8 9 -VG S , Ga te-to-S o urce V oltage (V ) Fig 3. Typical Transfer Characteristics 10 A 100 Fig 2. Typical Output Characteristics 100 5 1 -VD S , Drain-to-Source V oltage (V ) Fig 1. Typical Output Characteristics 1 20 µ s PU LSE W ID TH TTCJ = 175°C 1 75°C 1 -VD S , Drain-to-Source Voltage (V) 4 VGS - 15V - 10V - 8.0V - 7.0V - 6.0V - 5.5V - 5.0V BOTT OM - 4. 5V TOP TOP 10 A I D = -17 A 1.5 1.0 0.5 VG S = -10 V 0.0 -60 -40 -20 0 20 40 60 80 A 100 120 140 160 180 T J , Junction T emperature (°C) Fig 4. Normalized On-Resistance Vs. Temperature IRF9Z34NS/L V GS C is s C rs s C os s C , C a p a c ita n c e (p F ) 1000 = = = = 20 0V , f = 1MH z C gs + C g d , Cds SH OR TED Cgd C ds + C gd -V G S , G a te -to -S o u rc e V o lta g e (V ) 1200 C i ss 800 C os s 600 400 C rs s 200 0 10 V DS = -44 V V DS = -28 V 16 12 8 4 FO R TEST C IR C U IT SEE F IGU R E 1 3 0 A 1 I D = -10 A 100 0 -VD S , Drain-to-Source V oltage (V) 20 30 A 40 Q G , Total Gate Charge (nC) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 100 1000 OPE R ATIO N IN TH IS A RE A LIMITE D BY R D S(o n) -I D , D ra in C u rre n t (A ) -IS D , R e ve rse D ra in C u rre n t (A ) 10 10 T J = 1 75 °C T J = 25 °C 1 100 1 0µs 100µ s 10 1m s T CC ==225°C 5°C T VG S = 0 V 0.1 0.2 0.4 0.6 0.8 1.0 1.2 1.4 -VS D , S ource-to-Drain V oltage (V ) Fig 7. Typical Source-Drain Diode Forward Voltage A 1.6 T J = 1 75°C Sin gle Pu lse 1 1 10m s A 10 -VD S , Drain-to-Source V oltage (V ) Fig 8. Maximum Safe Operating Area 100 IRF9Z34NS/L 20 RD VDS VGS 15 I D , Drain Current (A) D.U.T. RG + VDD -10V Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % 10 Fig 10a. Switching Time Test Circuit 5 td(on) tr t d(off) tf VGS 10% 0 25 50 75 100 125 T C , Case Temperature 150 175 ( ° C) 90% VDS Fig 9. Maximum Drain Current Vs. Case Temperature Fig 10b. Switching Time Waveforms Thermal Response (Z thJC ) 10 1 D = 0.50 0.20 0.10 0.05 0.1 0.01 0.00001 0.02 0.01 PDM SINGLE PULSE (THERMAL RESPONSE) t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.0001 0.001 0.01 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case 0.1 IRF9Z34NS/L D .U .T RG IA S -2 0V tp VDD A D R IV E R 0.0 1Ω 15V Fig 12a. Unclamped Inductive Test Circuit E A S , S in g le P u ls e A va la n c h e E n e rg y (m J) 500 L VDS TOP BO TTOM 400 300 200 100 0 A 25 I AS ID -4 .2A -7.2 A -10 A 50 75 100 125 150 Starting TJ , Junction T emperature (°C) Fig 12c. Maximum Avalanche Energy Vs. Drain Current tp V(BR)DSS Fig 12b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. 50KΩ QG 12V .2µF .3µF -10V QGS QGD D.U.T. +VDS VGS VG -3mA Charge Fig 13a. Basic Gate Charge Waveform IG ID Current Sampling Resistors Fig 13b. Gate Charge Test Circuit 175 IRF9Z34NS/L Peak Diode Recovery dv/dt Test Circuit + D.U.T* Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer + - - + • dv/dt controlled by RG • I SD controlled by Duty Factor "D" • D.U.T. - Device Under Test RG VGS * + - VDD Reverse Polarity of D.U.T for P-Channel Driver Gate Drive P.W. Period D= P.W. Period [VGS=10V ] *** D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode [ VDD] Forward Drop Inductor Curent Ripple ≤ 5% *** VGS = 5.0V for Logic Level and 3V Drive Devices Fig 14. For P-Channel HEXFETS [ ISD] IRF9Z34NS/L D2Pak Package Outline 10.54 ( .415) 10.29 ( .405) 1.40 (.055) MAX. -A- 1.32 (.052) 1.22 (.048) 2 1.78 (.070) 1.27 (.050) 1 10.16 (.400) RE F . -B - 4.69 (.185) 4.20 (.165) 6.47 (.255) 6.18 (.243) 3 15.49 (.610) 14.73 (.580) 2.79 (.110) 2.29 (.090) 2.61 (.103) 2.32 (.091) 5.28 (.208) 4.78 (.188) 3X 1.40 (.055) 1.14 (.045) 5.08 ( .200) 0.55 (.022) 0.46 (.018) 0.93 (.037) 3X 0.69 (.027) 0.25 (.010) M 8.89 (.350) RE F. 1.39 (.055) 1.14 (.045) B A M MINIMUM RECO MM ENDED F OO TP RINT 11.43 (.450) NO TE S: 1 DIM ENS IO NS AF T ER S OLDE R DIP . 2 DIM ENS IO NING & TO LERA NCING PE R ANS I Y 14.5M, 1982. 3 CO NT RO LLING DIME NSIO N : INCH. 4 HE AT SINK & LEAD DIMEN SION S DO NO T INCLUDE BURRS. LE AD ASS IG NM ENT S 1 - G AT E 2 - DRA IN 3 - S OU RC E 8.89 (.350) 17.78 (.700) 3.81 (.150) 2.08 (.082) 2X Part Marking Information D2Pak IN TER NATION AL REC TIFIER L OGO AS SEMBLY LOT CODE A PART NU MBER F53 0S 9246 9B 1M DATE CODE (YYW W ) YY = YEAR W W = W EE K 2.54 (.100) 2X IRF9Z34NS/L Package Outline TO-262 Outline Part Marking Information TO-262 IRF9Z34NS/L Tape & Reel Information D2Pak TR R 1 .6 0 (.0 6 3 ) 1 .5 0 (.0 5 9 ) 4 .1 0 (.1 6 1) 3 .9 0 (.1 5 3) F E E D D IR E C TIO N 1 .8 5 (.0 7 3 ) 1 .6 5 (.0 6 5 ) 1 .6 0 (.0 6 3) 1 .5 0 (.0 5 9) 11 .6 0 (. 45 7 ) 11 .4 0 (. 44 9 ) 0 .3 68 (.0 14 5 ) 0 .3 42 (.0 13 5 ) 15 .4 2 (.60 9 ) 15 .2 2 (.60 1 ) 2 4 .30 (.9 5 7) 2 3 .90 (.9 4 1) TR L 1 0. 90 (.4 29 ) 1 0. 70 (.4 21 ) 1. 75 (.0 69 ) 1. 25 (.0 49 ) 4 .7 2 (.1 3 6) 4 .5 2 (.1 7 8) 1 6. 10 (.6 34 ) 1 5. 90 (.6 26 ) FE E D D IR E C TIO N 1 3.5 0 (. 532 ) 1 2.8 0 (. 504 ) 2 7.4 0 (1 .079 ) 2 3.9 0 (.9 41) 4 33 0.0 0 (14. 17 3) M AX . N O T ES : 1. C O M F O R M S T O EIA -418 . 2. C O N T R O LLIN G D IM EN SIO N : M ILLIM E T ER . 3. D IM E N S IO N M EA S U R E D @ H U B . 4. IN C LU D E S F L AN G E D IS T O R T IO N @ O U T E R ED G E. 6 0.0 0 (2 .36 2) M IN . 26 .40 (1. 03 9) 24 .40 (.9 61 ) 3 3 0.4 0 (1 .19 7) MA X . 4 WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331 EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020 IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897 IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590 IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111 IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086 IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371 http://www.irf.com/ Data and specifications subject to change without notice. 8/97