HEF40098B Hex inverting buffer; 3-state Rev. 9 — 18 March 2016 Product data sheet 1. General description The HEF40098B is a hex inverting buffer with 3-state outputs. The 3-state outputs are controlled by two active LOW enable inputs (1OE and 2OE). A HIGH on 1OE causes four of the six active LOW buffer elements (1Y0 to 1Y3) to assume a high-impedance or OFF-state regardless of the other input conditions and a HIGH on 2OE causes the outputs of the remaining two buffer elements (2Y0 and 2Y1) to assume a high-impedance or OFF-state regardless of the other input conditions. It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS (usually ground). Unused inputs must be connected to VDD, VSS, or another input. 2. Features and benefits Fully static operation 5 V, 10 V, and 15 V parametric ratings Standardized symmetrical output characteristics Specified from 40 C to +85 C Complies with JEDEC standard JESD 13-B 3. Ordering information Table 1. Ordering information All types operate from 40 C to +85 C Type number HEF40098BT Package Name Description Version SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 HEF40098B NXP Semiconductors Hex inverting buffer; 3-state 4. Functional diagram $ < $ < $ < $ < 2( < $ < $ < $ < $ < $ < $ < $ < 2( 2( DDH Fig 1. $ Functional diagram Fig 2. 2( DDH Logic diagram 5. Pinning information 5.1 Pinning +()% 2( 9'' $ 2( < $ $ < < $ $ < < $ 966 < DDH Fig 3. Pin configuration HEF40098B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 9 — 18 March 2016 © NXP Semiconductors N.V. 2016. All rights reserved. 2 of 12 HEF40098B NXP Semiconductors Hex inverting buffer; 3-state 5.2 Pin description Table 2. Pin description Symbol Pin Description 1OE 1 output enable input (active LOW) 1A0, 1A1, 1A2, 1A3 2, 4, 6, 10 buffer input 1Y0, 1Y1, 1Y2, 1Y3 3, 5, 7, 9 buffer output (active LOW) VSS 8 supply voltage 2Y0, 2Y1 13, 11 buffer output (active LOW) 2A0, 2A1 14, 12 buffer input 2OE 15 output enable input (active LOW) VDD 16 supply voltage 6. Functional description Table 3. Function table[1] Inputs Output nAn nOE nYn H L L L L H X H Z [1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VDD supply voltage IIK input clamping current VI input voltage IOK output clamping current II/O input/output current Conditions VI < 0.5 V or VI > VDD + 0.5 V VO < 0.5 V or VO > VDD + 0.5 V Min Max Unit 0.5 +18 V mA - 10 0.5 VDD + 0.5 - 10 mA - 10 mA V IDD supply current - 50 mA Tstg storage temperature 65 +150 C Tamb ambient temperature 40 +85 C Ptot total power dissipation - 500 mW - 100 mW Tamb = 40 to +85 C SO16 package P [1] power dissipation [1] For SO16 package: Ptot derates linearly with 8 mW/K above 70 C. HEF40098B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 9 — 18 March 2016 © NXP Semiconductors N.V. 2016. All rights reserved. 3 of 12 HEF40098B NXP Semiconductors Hex inverting buffer; 3-state 8. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter VDD VI Conditions Min Typ Max Unit supply voltage 3 - 15 V input voltage 0 - VDD V Tamb ambient temperature in free air 40 - +85 C t/V input transition rise and fall rate VDD = 5 V - - 3.75 ns/V VDD = 10 V - - 0.5 ns/V VDD = 15 V - - 0.08 ns/V 9. Static characteristics Table 6. Static characteristics VSS = 0 V; VI = VSS or VDD; unless otherwise specified. Symbol Parameter VIH VIL VOH VOL IOH IOL HIGH-level input voltage Conditions VDD IO < 1 A Tamb = 40 C Tamb = 25 C Tamb = 85 C Unit Min Max Min Max Min Max 5V 3.5 - 3.5 - 3.5 - V 10 V 7.0 - 7.0 - 7.0 - V 15 V 11.0 - 11.0 - 11.0 - V 5V - 1.5 - 1.5 - 1.5 V 10 V - 3.0 - 3.0 - 3.0 V 15 V - 4.0 - 4.0 - 4.0 V 5V 4.95 - 4.95 - 4.95 - V 10 V 9.95 - 9.95 - 9.95 - V 15 V 14.95 - 14.95 - 14.95 - V 5V - 0.05 - 0.05 - 0.05 V 10 V - 0.05 - 0.05 - 0.05 V 15 V - 0.05 - 0.05 - 0.05 V HIGH-level output current VO = 2.5 V 5V - 3.8 - 3.2 - 2.5 mA VO = 4.6 V 5V - 1.2 - 1.0 - 0.8 mA VO = 9.5 V 10 V - 3.8 - 3.2 - 2.5 mA VO = 13.5 V 15 V - 12.0 - 10.0 - 8.0 mA VO = 0.4 V; 4.75 V 3.5 - 2.9 - 2.3 - mA VO = 0.5 V; 10 V 12.0 - 10.0 - 8.0 - mA LOW-level input voltage IO < 1 A HIGH-level output voltage IO < 1 A LOW-level output voltage LOW-level output current IO < 1 A VO = 1.5 V; 15 V 24.0 - 20.0 - 16.0 - mA II input leakage current VI = 0 V or 15 V 15 V - 0.3 - 0.3 - 1.0 A IDD supply current IO = 0 A 5V - 4 - 4 - 30 A 10 V - 8 - 8 - 60 A 15 V - 16 - 16 - 120 A 15 V - 1.6 - 1.6 - 12.0 A - - - 7.5 - - pF IOZ OFF-state output current CI input capacitance HEF40098B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 9 — 18 March 2016 © NXP Semiconductors N.V. 2016. All rights reserved. 4 of 12 HEF40098B NXP Semiconductors Hex inverting buffer; 3-state 10. Dynamic characteristics Table 7. Dynamic characteristics VSS = 0 V; Tamb = 25 C; for test circuit see Figure 6; unless otherwise specified. Symbol Parameter Conditions VDD Extrapolation formula[1] tPHL HIGH to LOW propagation delay nAn to nYn; see Figure 4 5V tPLH tTHL nAn to nYn; see Figure 4 HIGH to LOW output transition time see Figure 4 LOW to HIGH output transition time tTLH HiGH to OFF-state propagation delay tPHZ tPLZ tPZH see Figure 4 nOE, to nYn; see Figure 5 LOW to OFF-state propagation delay nOE, to nYn; see Figure 5 OFF-state to HIGH propagation delay nOE, to nYn; see Figure 5 OFF-state to LOW propagation delay tPZL [1] LOW to HIGH propagation delay nOE, to nYn; see Figure 5 Min Typ Max Unit 70 ns + (0.20 ns/pF)CL - 80 160 ns 10 V 31 ns + (0.08 ns/pF)CL - 35 70 ns 15 V 22 ns + (0.06 ns/pF)CL - 25 50 ns 5V 50 ns + (0.30 ns/pF)CL - 65 130 ns 10 V 24 ns + (0.13 ns/pF)CL - 30 60 ns 15 V 23 ns + (0.05 ns/pF)CL - 25 50 ns 5V 15 ns + (0.30 ns/pF)CL - 30 60 ns 10 V 10 ns + (0.11 ns/pF)CL - 15 30 ns 15 V 7 ns + (0.07 ns/pF)CL - 10 20 ns 5V 10 ns + (0.50 ns/pF)CL - 35 70 ns 10 V 8 ns + (0.24 ns/pF)CL - 20 40 ns 15 V 6 ns + (0.18 ns/pF)CL - 15 30 ns 5V - 45 85 ns 10 V - 35 65 ns 15 V - 30 60 ns 5V - 65 135 ns 10 V - 40 80 ns 15 V - 35 70 ns 5V - 70 140 ns 10 V - 35 75 ns 15 V - 30 65 ns 5V - 90 185 ns 10 V - 40 85 ns 15 V - 35 70 ns The typical value of the propagation delay and transition times are calculated from the extrapolation formula as shown (CL in pF). Table 8. Dynamic power dissipation PD PD can be calculated (in W) from the formulas shown. VSS = 0 V; tr = tf 20 ns; Tamb = 25 C. Symbol PD Parameter dynamic power dissipation VDD Typical formula for PD (W) where: 5V PD = 5000 fi + (fo CL) VDD 10 V PD = 22800 fi + (fo CL) VDD2 fo = output frequency in MHz, 15 V PD = 81000 fi + (fo CL) VDD CL = output load capacitance in pF, 2 fi = input frequency in MHz, 2 VDD = supply voltage in V, (CL fo) = sum of the outputs. HEF40098B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 9 — 18 March 2016 © NXP Semiconductors N.V. 2016. All rights reserved. 5 of 12 HEF40098B NXP Semiconductors Hex inverting buffer; 3-state 11. AC waveforms 9, LQSXW 90 9 W3+/ 92+ W3/+ 90 RXWSXW 92/ W7+/ W7/+ DDL Measurement points are given in Table 9, VOL and VOH are typical output voltage levels that occur with the output load. Fig 4. Input (nAn) to output (nYn) propagation delays 9'' 2(LQSXW 966 W3/= RXWSXW /2:WR2)) 2))WR/2: W3=/ 9'' 9< 9; 966 W3+= 9'' W3=+ 9< RXWSXW +,*+WR2)) 2))WR+,*+ 9; 966 RXWSXWVRQ RXWSXWVRII RXWSXWVRQ DDJ Measurement points are given in Table 9, VOL and VOH are typical output voltage levels that occur with the output load. Fig 5. 3-state enable and disable times Table 9. Measurement points Supply voltage Input Output VDD VM VM VX VY 5 V to 15 V 0.5VDD 0.5VDD 0.1VDD 0.9VDD HEF40098B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 9 — 18 March 2016 © NXP Semiconductors N.V. 2016. All rights reserved. 6 of 12 HEF40098B NXP Semiconductors Hex inverting buffer; 3-state W: 9, QHJDWLYH SXOVH 90 90 9 WI WU WU WI 9, SRVLWLYH SXOVH 90 90 9 W: DDM a. Input waveform 9(;7 9'' * 9, 5/ 92 '87 57 &/ DDM b. Test circuit Test and measurement data is given in Table 10. Definitions test circuit: DUT = Device Under Test. RL = Load resistance; CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to output impedance Zo of the pulse generator. VEXT = External voltage for measuring switching times. Fig 6. Test circuit for measuring switching times Table 10. Test data Supply voltage Input VDD VI tr, tf CL RL tPLH, tPHL tPLZ, tPZL tPHZ, tPZH 5 V to 15 V VDD 20 ns 50 pF 1 k open VDD GND HEF40098B Product data sheet Load VEXT All information provided in this document is subject to legal disclaimers. Rev. 9 — 18 March 2016 © NXP Semiconductors N.V. 2016. All rights reserved. 7 of 12 HEF40098B NXP Semiconductors Hex inverting buffer; 3-state 12. Package outline 62SODVWLFVPDOORXWOLQHSDFNDJHOHDGVERG\ZLGWKPP 627 ' ( $ ; F \ +( Y 0 $ = 4 $ $ $ $ SLQLQGH[ ș /S / H Z 0 ES GHWDLO; PP VFDOH ',0(16,216LQFKGLPHQVLRQVDUHGHULYHGIURPWKHRULJLQDOPPGLPHQVLRQV 81,7 $ PD[ $ $ $ ES F ' ( H +( / /S 4 Y Z \ = PP LQFKHV ș R R 1RWH 3ODVWLFRUPHWDOSURWUXVLRQVRIPPLQFKPD[LPXPSHUVLGHDUHQRWLQFOXGHG Fig 7. 5()(5(1&(6 287/,1( 9(56,21 ,(& -('(& 627 ( 06 -(,7$ (8523($1 352-(&7,21 ,668('$7( Package outline SOT109-1 (SO16) HEF40098B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 9 — 18 March 2016 © NXP Semiconductors N.V. 2016. All rights reserved. 8 of 12 HEF40098B NXP Semiconductors Hex inverting buffer; 3-state 13. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes HEF40098B v.9 20160318 Product data sheet - HEF40098B v.8 Modifications: HEF40098B v.8 Modifications: • Type number HEF40098BP (SOT38-4) removed. 20111121 • • • Product data sheet - HEF40098B v.7 Legal pages updated. Changes in “General description” and “Features and benefits”. Section “Applications” removed. HEF40098B v.7 20110914 Product data sheet - HEF40098B v.6 HEF40098B v.6 20090624 Product data sheet - HEF40098B v.5 HEF40098B v.5 20081031 Product data sheet - HEF40098B v.4 HEF40098B v.4 20080731 Product data sheet - HEF40098B_CNV v.3 HEF40098B_CNV v.3 19950101 Product specification - HEF40098B_CNV v.2 HEF40098B_CNV v.2 19950101 Product specification - - HEF40098B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 9 — 18 March 2016 © NXP Semiconductors N.V. 2016. All rights reserved. 9 of 12 HEF40098B NXP Semiconductors Hex inverting buffer; 3-state 14. Legal information 14.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 14.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 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This document supersedes and replaces all information supplied prior to the publication hereof. HEF40098B Product data sheet Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. All information provided in this document is subject to legal disclaimers. Rev. 9 — 18 March 2016 © NXP Semiconductors N.V. 2016. All rights reserved. 10 of 12 HEF40098B NXP Semiconductors Hex inverting buffer; 3-state Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 14.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 15. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] HEF40098B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 9 — 18 March 2016 © NXP Semiconductors N.V. 2016. All rights reserved. 11 of 12 HEF40098B NXP Semiconductors Hex inverting buffer; 3-state 16. Contents 1 2 3 4 5 5.1 5.2 6 7 8 9 10 11 12 13 14 14.1 14.2 14.3 14.4 15 16 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 3 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3 Recommended operating conditions. . . . . . . . 4 Static characteristics. . . . . . . . . . . . . . . . . . . . . 4 Dynamic characteristics . . . . . . . . . . . . . . . . . . 5 AC waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . 9 Legal information. . . . . . . . . . . . . . . . . . . . . . . 10 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 10 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Contact information. . . . . . . . . . . . . . . . . . . . . 11 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP Semiconductors N.V. 2016. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 18 March 2016 Document identifier: HEF40098B