Access Digital Subscriber Line Access Multiplexer (DSLAM) Overview The digital subscriber line access multiplexer (DSLAM) is a network element defined to support high-bandwidth access to the public network. With the ability to support data and voice services over existing subscriber lines, the DSLAM can assist local phone service providers and ISPs in minimizing cost while maximizing efficiency of their networks. Multiplexing technology, based on time division multiplexing (TDM), or switch-based schemes like frame relay, IP, or ATM, reduces the number of physical connections to the backbone. > Serves as a VPN gateway PowerQUICCTM Integrated Communications Processor with SAR ATM Cell Processor PHY Queue Mgmt./ Fabric Interface Trunking Card Queue Mgmt./ Fabric Interface PHY DSL Line Cards > Subscriber side of xDSL solution considered a security gateway SUBSCRIBERS Routing Fabric CO Switch or Data Carrier > Separates voice from data, routing them onto separate networks > Internet access, remote work station LAN/WAN access, frame relay, and native ATM all supported with DSLAM DIGITAL SUBSCRIBER LINE ACCESS MULTIPLEXER BLOCK DIAGRAM PowerQUICCTM PowerQUICC ª Integrated Integrated Communications Communications Processor with SAR Processor with SAR Key Benefits > Supports transmission voice and data over existing twisted-pair copper infrastructure using DSL transceivers Freescale Ordering Information Part Number Product Name Product Highlights Additional Information MPC850 PowerQUICC Integrated Communications Processor > 80MHz maximum speed www.freescale.com/netcomm > 2K-bytes cache-L1 instructional > 1K-byte cache-L1 data > 8-entry translation look aside buffers MPC857T PowerQUICC Integrated Communications Processor > 80MHz maximum speed www.freescale.com/netcomm > 4K-bytes cache-L1 Instructional > 4K-bytes cache-L1 data > 59 parallel bits MPC860 PowerQUICC Integrated Communications Processor > 80MHz maximum speed www.freescale.com/netcomm > 4K-bytes cache-L1 instructional (DE, DT, EN, SR, and T) > 16K-byte cache-L1 instructional (DP and P) > 4K-byte cache-L1 data (DE, DT, EN, SR, and T) > 8K-byte cache-L1 data (DP and P) > 32-entry translation look aside buffers MPC862 PowerQUICC Integrated Communications Processor Design Challenges The combination of interfaces and services present a difficult challenge to DSLAM implementation, especially in light of time-to-market constraints. In the asynchronous traffic mode (ATM)-based DSLAM, the interface between the DSLAM and the network will be an official carrier (OC) level-12 (OC-12), OC-3, or DS3, compliant with the ATM Forum's UNI specification. The DSLAM should support statistical multiplexing, traffic management (TM), cell buffering, cell queuing, priority schemes, and fairness algorithms in accordance with the ATM Forum's TM specification. Traditional approaches require separate hardware and general purpose CPUs for each interface type and protocol, resulting in many individual designs, along with limited reuse of software. In addition, designers face termination of VPN (IPSec) tunnels. Freescale Semiconductor Solution Freescale Semiconductor's PowerQUICC™ Integrated Communications Processors feature a unique dual-processor architecture, a core CPU compliant with the PowerPC instruction-set architecture that handles system tasks with a variety of on-board peripherals, and a standard bus SG2117-2 > Enhanced ATM functionality www.freescale.com/netcomm > New features available in “enhanced SAR” (ESAR) mode interface. Additionally, they feature a specially designed RISC communications processor with integrated support for multiple protocols to manage serial communications channels. All members of Freescale Semiconductor’s leading PowerQUICC II family of integrated communications processors are easily upgraded through download microcode packages. These innovative microcode packages provide the ideal mix of control and data plane functionality, enabling our customers to reduce time-to-market by focusing on value-added product elements. This architecture significantly enhances system performance, security and efficiency, saving energy consumption, up to full rate OC-3 VPN (IPSec) support through the use of a MPC185 Security Processor. The MPC185 Security Processor is easily integrated into PowerQUICC II systems via the 60x bus. The MPC185 achieves high performance through 60x bus mastering and immediate access to system memory. By avoiding data transfers across bridges and secondary buses, the MPC185 provides PowerQUICC II system designers with the ultimate security chip set for midrange VPN and DSLAM applications. > The Figure shown on page 1 illustrates the trunking card connecting the DSLAM to the central office ATM switch for data services and to the Public Switched Telephone Network (PSTN) for voice services. The PowerQUICC Integrated Communications Processor handles call setup, tear-down, and card management functions. If the control path requires a low-bit-rate segmentation and reassembly (SAR) function to support CO-to-DSLAM signaling or intra-DSLAM communications, several PowerQUICC family members integrate this important function to offer cost-effective, and highly integrated solutions. > The DSL line card provides the subscriber interface to the DSLAM. Its anatomy is very similar to the trunking card, providing many of the same features, so the PowerQUICC II family is also an ideal solution. For applications requiring less than full rate, full duplex OC-3 performance, PowerQUICC with multi-service platform (MSP) microcode allows most ATM switching functionality inside the device, significantly lowering design cost. Development Tools Tool Type Product Name Vendor Description Hardware MPC8XXFADSMB Freescale Semiconductor For MPC8xx Family Application Development System Motherboard Development MPC8260ADS-P Freescale Semiconductor MPC8260 Application Development System PowerQUICC Integrated Communications Processors > MPC850 family, including the MPC850SR > MPC857T with enhanced ATM support > MPC860 family, including the MPC860SAR > MPC862 with enhanced ATM support > MPC8255, MPC8260, MPC8264, MPC8265 and MPC8266 PowerQUICC II next-generation family Related Documentation Document Numbere Description SG1007 Network and Communications Processors Product Selector Guide SG1011 Software and Development Tools Product Selector Guide SG2117-3 > PowerQUICC and PowerQUICC II microcodes packages provide enhanced forwarding plane features MPC180/184/185 Security Processors. Notes Learn More: Contact the Technical Information Center at +1-800-521-6247 or +1-480-768-2130. For more information about Freescale products, please visit www.freescale.com. Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004. All rights reserved. SG2117 REV 1 12/2004 December2004