Audio ICs RDS / RBDS decoder BU1923 / BU1923F The BU1923 and BU1923F are RDS / RBDS decoders that employ a digital PLL and have a built-in anti-aliasing filter and an eight-stage BPF (switched-capacitor filter). Linear CMOS circuitry is used for low power consumption. Applications RDS / RBDS compatible FM receivers for American and European markets, car stereos, high-fidelity stereo systems and components, and FM pagers. Features 1) Low current. 2) Two-stage anti-aliasing filter (LPF). 3) 57kHz band-pass filter. Absolute maximum ratings (Ta = 25C) Recommended operating conditions (Ta = 25C) 828 4) DSB demodulation (digital PLL). 5) Quality indication output for demodulated data. Audio ICs BU1923 / BU1923F Block diagram 829 Audio ICs Pin descriptions Input / output circuits 830 BU1923 / BU1923F Audio ICs BU1923 / BU1923F Electrical characteristics (unless otherwise noted, Ta = 25C, VDD1 = VDD2 = 5.0V, VSS1 = VSS2 = 0.0V) 831 Audio ICs BU1923 / BU1923F Output data timing The clock (RCLK) frequency is 1187.5Hz. Depending on the state of the internal PLL clock, the data (RDATA) is replaced in synchronous with either the rising or falling edge of the clock. To read the data, you may choose ei- QUAL pin operation: Indicates the quality of the demodulated data. (1) Good data: HI (2) Poor data: LO Electrical characteristic curve 832 ther the rising or falling edge of the clock as the reference. The data is valid for 416.7µs. after the reference clock edge. Audio ICs BU1923 / BU1923F External dimensions (Units: mm) 833