Audio ICs PLL frequency synthesizer for tuners BU2624AF The BU2624AF is a PLL frequency synthesizer IC designed for use in car stereos, high-fidelity audio systems, and CD radio cassettes. Featuring low current dissipation, low superfluous radiation, two frequency measurement counter systems, and two phase comparison outputs, this chip is ideal for high-performance multi-band systems. Applications Car stereos, high-fidelity audio systems, radio cassettes, receivers, and other frequency generating devices Features 1) Built-in high-speed prescaler can divide 130MHzVCO. 2) Low current dissipation (during operation: 6.0mA, PLL OFF: 300µA Typ.) 3) Seven standard frequencies: 50kHz, 25kHz, 12.5kHz, 10kHz, 9kHz, 5kHz, and 1kHz. 4) Two counters for intermediate frequency detection 5) 6) 7) 8) 9) 10) Unlock detection circuit Five output ports (open drain) SD input port Two charge pump outputs Serial data input (CE, CK, DA) Control of phase comparison output Absolute maximum ratings (Ta = 25C) Recommended operating conditions (Ta = 25C) 161 Audio ICs Block diagram 162 BU2624AF Audio ICs BU2624AF Pin descriptions 163 Audio ICs Electrical characteristics (unless otherwise noted, Ta = 25C, VDD = 5.0V) 164 BU2624AF Audio ICs BU2624AF Circuit operation Input data format Output data format CE output is set to LO. 165 Audio ICs BU2624AF Explanation of the data (1) Division data: For D0 through D15 (When S = 1, use D4 through D15.) (2) (3) (4) CT: Frequency measurement beginning data 1: Begins measurement. 0: Resets internal counter, IF1 and IF2 go to pul down. Output port control data: P0, P1, P2, P3, P4 PL PH: Control of charge pump output PH = 0, PL = 0 PLL operation PH = 0, PL = 1 PD1 PD2 LO level PH = 1, PL = 0 PD1 PD2 HI level PH = 1, PL = 1 PD1 PD2 LO level (6) S: switch between FMIN and AMIN 0: FMIN 1: AMIN (7) PS: If this bit is set to ON while AMIN is selected, swallow counter division is possible. (8) IFS: Selection between IF1 and IF2 during IF count 0: IF1 1: IF2 (9) GT: Frequency measurement time and unlock detection ON / OFF (10) TS: Test data (0) is input 166 (5) R0, R1, R2, standard frequency data Audio ICs BU2624AF Frequency counter (1) Structure (2) How the frequency counter operates When control data CT equals 1, the 20-bit counter and the amp go into operation. When CT equals 0, amp input goes to pulldown and the counter is reset. Measuring time (gate pulse) is selected (8 ms / 16 ms) on the basis of control data GT. When control data CT equals 0, the counter is reset. (3) Explanation of output data D0: LSB D19: MSB Unlock detection When control data GT equals 1, or CT equals 1, the unlock detection circuit goes into operation for 8ms. When CT equals 1, the unlock detection circuits stops operating before the frequency counter gate pulse is emitted. When CT equals 0, or GT equals 0, the unlock detection circuit is reset. 167 Audio ICs Frequency counter and unlock detection (1) When CT = 1: Frequency count and unlock detection are carried out. (2) When CT = 0 and GT = 1: Only unlock detection is carried out. Explanation of CD terminal When frequency measurement or unlock detection is finished, the CD terminal goes to LO to indicate that the count and unlock detection have finished. It also synchronizes with CK to output counter data. When the next data is input, it goes to HI. 168 BU2624AF Audio ICs BU2624AF External dimensions (Units: mm) 169