IRF IRFY130CM

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Provisional Data Sheet No. PD 9.1286C
IRFY130CM
HEXFET® POWER MOSFET
N-CHANNEL
Product Summary
100 Volt, 0.18Ω HEXFET
HEXFET technology is the key to International Rectifier’s
advanced line of power MOSFET transistors. The efficient geometry design achieves very low on-state resistance combined with high transconductance.
HEXFET transistors also feature all of the well-established advantages of MOSFETs, such as voltage control, very fast switching, ease of paralleling and electrical parameter temperature stability. They are well-suited
for applications such as switching power supplies, motor controls, inverters, choppers, audio amplifiers, high
energy pulse circuits, and virtually any application where
high reliability is required.
Part Number
BVDSS
RDS(on)
ID
IRFY130CM
100V
0.18Ω
14.4A
Features
n
n
n
n
n
Hermetically sealed
Electrically isolated
Simple drive requirements
Ease of paralleling
Ceramic eyelets
The HEXFET transistor’s totally isolated package eliminates the need for additional isolating material between
the device and the heatsink. This improves thermal efficiency and reduces drain capacitance.
Absolute Maximum Ratings
Parameter
I D @ VGS=10V, TC = 25°C
I D @ VGS=10V, TC = 100°C
I DM
PD @ TC = 25°C
VGS
EAS
I AR
EAR
dv/dt
TJ
Tstg
IRFY130CM
Continuous Drain Current
14.4
Continuous Drain Current
9.1
Pulsed Drain Current 
57.6
Max. Power Dissipation
75
Linear Derating Factor
0.6
Gate-to-SourceVoltage
±20
Single Pulse Avalance Energy ‚
69
Avalance Current 
14.4
Repetitive Avalanche Energy 
7.5
Peak Diode Recover y dv/dt ƒ
5.5
Operating Junction
-55 to 150
Storage Temperature Range
Lead Temperature
300 (0.063 in (1.6mm) from case for 10 sec)
Weight
4.3(typical)
*ID current limited by pin diameter
To Order
Units
A
W
W/K…
V
mJ
A
mJ
V/ns
°C
g
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IRFY130CM Device
Electrical Characteristics @ Tj = 25°C (Unless Otherwise Specified)
Parameter
Min
BVDSS
Drain-to-Source Breakdown Voltage
100
—
—
∆BVDSS/∆TJ
—
0.1
—
V/°C Reference to 25°C, ID = 1.0mA
VGS(th)
gfs
IDSS
Temperature Coefficient of Breakdown
Voltage
Static Drain-to-Source
On-State Resistance
Gate ThresholdVoltage
Forward Transconductance
Zero Gate Voltage Drain Current
—
—
2.0
3.0
—
—
—
—
—
—
—
—
0.18
0.21
4.0
—
25
250
IGSS
IGSS
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
LD
Gate-to-Source Leakage Forward
Gate-to-Source Leakage Reverse
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain (‘Miller’) Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Internal Drain Inductance
—
—
12.8
1.0
3.8
—
—
—
—
—
—
—
—
—
—
—
—
—
—
8.7
100
-100
28.5
6.3
16.6
30
75
40
45
—
VGS = 10V, ID = 9.1A „
VGS = 10V, ID = 14.4A „
V
VDS = VGS, ID = 250µA
S ( ) VDS ≥ 15V, IDS = 9.1A „
VDS = 0.8 x max. rating,VGS = 0V
µA
VDS = 0.8 x max. rating
VGS = 0V, TJ = 25°C
VGS = 20V
nA
VGS = -20V
VGS = 10V, ID = 14.4A
nC
VDS = Max. Rating x 0.5
see figures 6 and 13
VDD = 50V, ID=14.4A, RG=7.5Ω
VGS = 10V
ns
LS
Internal Source Inductance
—
8.7
—
nH
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
—
—
—
650
240
44
—
—
—
pF
V
Test Conditions
VGS = 0V, I D = 1.0mA
Ω
Ω
RDS(on)
Typ Max Units
see figure 10
Measured from the drain
lead, 6mm (0.25 in.) from
package to center of die.
Modified MOSFET symbol
showing the internal
inductances.
Measured from the
source lead, 6mm (0.25
in.) from package to
source bonding pad.
VGS = 0v, VDS = 25V
f = 1.0MHz. (Figure 5)
Source-Drain Diode Ratings and Characteristics
Parameter
Min Typ Max Units
IS
I SM
Continuous Source Current (Body Diode)
Pulse Source Current (Body Diode) 
—
—
—
—
14.4
57.6
A
VSD
trr
QRR
ton
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
—
—
—
—
—
—
1.5
300
3.0
V
ns
µC
Test Conditions
Modified MOSFET symbol showing the
integral reverse p-n junction rectifier.
Tj = 25°C, I S = 14.4A, VGS = 0V „
Tj = 25°C, IF = 14.4A, di/dt ≤ 100 A/µs
VDD ≤ 50 V „
Intrinsic turn-on time is negligible. Turn-on speed is substantially controlled by LS + LD.
Thermal Resistance
Parameter
RthJC Junction-to-Case
RthJA Junction-to-Ambient
RthCS Case-to-Sink
Min Typ Max Units
—
—
—
—
—
0.21
To Order
1.67
80 K/W…
—
Test Conditions
Typical socket mount
Mounting surface flat, smooth
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IRFY130CM Device
Fig. 1 — Typical Output Characteristics
TC = 25°C
Fig. 2 —Typical Output Characteristics
TC = 150°C
Fig. 3 — Typical Transfer Characteristics
Fig. 4 — Normalized On-Resistance Vs. Temperature
Fig. 5 — Typical Capacitance Vs. Drain-to-Source
Voltage
Fig. 6 — Typical Gate Charge Vs. Gate-to-Source
Voltage
To Order
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IRFY130CM Device
3 0C
1000
I D , D ra in C urre nt (A )
O P E R AT IO N I N T H IS A R E A L IM I T E D
B Y R D S(on)
100
100µs
10
1ms
T C = 2 5° C
T J = 1 50 ° C
Sin g le P u ls e
1
1
10ms
A
10
100
1000
V D S , D ra in -to -S o u rc e V o lta g e (V )
Fig. 7 — Typical Source-to-Drain Diode Forward
Voltage
Fig. 8 — Maximum Safe Operating Area
ID , D rai n C u rren t (A m ps )
15
12
9
6
3
A
0
25
50
75
100
125
150
TC , C as e Te m p era tu re (°C )
Fig. 9 — Maximum Drain Current Vs. Case Temperature
Fig. 10a — Switching Time Test Circuit
Fig. 10b — Switching Time Waveforms
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IRFY130CM Device
T h e rm a l R e s p o n se (Z
thJ C
)
10
1
D = 0.5 0
0 .20
0 .10
0.05
0.1
0.02
0 .01
SIN G LE PU L SE
(TH E R M AL R ESPO N S E)
A
0.01
0.00001
0.0001
0.001
0.01
0.1
1
t 1 , R e c ta n g u la r P u ls e D u r a tio n ( se c)
Fig. 11 — Maximum Effective Transient Thermal Impedance, Junction-to-Case Vs. Pulse Duration
V (B R)DSS
D R IVE R
L
VD S
D .U .T
RG
+
- VD D
IA S
tp
A
0 .0 1 Ω
tp
I AS
Fig. 12a — Unclamped Inductive Test Circuit
Fig. 12b — Unclamped Inductive Waveforms
E AS , S ing le P u ls e A v al an c h e E n e rgy (m J )
30C
80
60
40
20
0
ID = 2 5 A
V D D = 2 5V
25
50
A
75
100
125
150
175
S tarting T J , J u nc tio n Te m p eratu re (°C )
Fig. 12c — Max. Avalanche Energy vs. Current
To Order
Fig. 13a — Gate Charge Test Circuit
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Notes:
IRFY130CM Device
 Repetitive Rating; Pulse width limited by maximum junction temperature (see figure 11).
‚ @ VDD = 50V, Starting TJ = 25°C,
EAS = [0.5 * L * ( ) * [BVDSS/(BVDSS-VDD)]
Peak IL = 14.4A, VGS = 10V, 25 ≤ RG ≤ 200Ω (figure 12)
ƒ I SD ≤ 14.4A, di/dt ≤ 140A/µs, VDD ≤ BVDSS, TJ ≤ 150°C
„ Pulse width ≤ 300 µs; Duty Cycle ≤ 2%
… K/W = °C/W
W/K = W/°C
Fig. 13b — Basic Gate Charge Waveform
Case Outline and Dimensions — TO-257AA
Pin 1 - Drain
Pin 2 - Source
Pin 3 - Gate
3
1
2
TO-257AA
NON-STANDARD PIN CONFIGURATION
Pin 1 - Gate
Pin 2 - Drain
Pin 3 - Source
Order Part Type IRFY130C
NOTES:
1. Dimensioning and tolerancing per ANSI Y14.5M-1982
2. Controlling dimension: Inch
3. Dimensions are shown in millimeters (Inches)
4. Outline conforms to JEDEC outline TO-257AA
CAUTION
BERYLLIAWARNING PER MIL-PRF-19500
Packages containing beryllia shall not be ground, sandblasted,
machined or have other operations performed on them which
will produce beryllia or beryllium dust. Furthermore, beryllium
oxide packages shall not be placed in acids that will produce
fumes containing beryllium.
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Data and specifications subject to change without notice.
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