Previous Datasheet
Index
Next Data Sheet
PD -9.1226
IRFD320
HEXFET® Power MOSFET
Dynamic dv/dt Rating
Repetitive Avalanche Rated
For Automatic Insertion
End Stackable
Fast Switching
Ease of paralleling
Simple Drive Requirements
VDSS = 400V
RDS(on) = 1.8Ω
ID = 0.49A
Description
Third Generation HEXFETs from International Rectifier provide the designer
with the best combination of fast switching, ruggedized device design, low onresistance and cost-effectiveness.
The 4-pin DIP package is a low-cost machine-insertable case style which can be
stacked in multiple combinations on standard 0.1 inch pin centers. The dual drain
serves as a thermal link to the mounting surface for power dissipation levels up to
1 watt.
HD-1
Absolute Maximum Ratings
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
TSTG
Parameter
Max.
Continuous Drain Current, VGS @ 10 V
Continuous Drain Current, VGS @ 10 V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
0.49
0.31
3.9
1.0
0.0083
±20
48
0.49
0.10
4.0
-55 to + 150
Units
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
300 (1.6mm from case)
Thermal Resistance
Parameter
RθJA
Junction-to-Ambient
To Order
Min.
Typ.
Max.
Units
—
—
120
°C/W
Revision 0
Previous Datasheet
Index
Next Data Sheet
IRFD320
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
RDS(on)
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
VGS(th)
gfs
IDSS
Gate Threshold Voltage
Forward Transconductance
Drain-to-Source Leakage Current
IGSS
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
LD
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Internal Drain Inductance
LS
Internal Source Inductance
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
V(BR)DSS
∆V(BR)DSS/∆TJ
Min. Typ. Max. Units Conditions
400
—
—
V
VGS = 0V, ID = 250µA
— 0.51 —
V/°C Reference to 25°C, ID = 1mA
—
—
1.8
VGS = 10.0V, ID = 0.21A
Ω
—
—
VGS = V, ID = A
2.0
—
4.0
V
VDS = VGS, ID = 250µA
1.7
—
—
S
VDS = 50V, ID = 1.2A
—
—
25
VDS = 400V, VGS = 0V
µA
—
— 250
VDS = 320V, VGS = 0V, TJ = 125°C
—
— 100
VGS = 20V
nA
—
— -100
VGS = -20V
—
—
20
ID = 2.0A
—
—
3.3
nC VDS = 320V
—
—
11
VGS = 10V, See Fig. 6 and 13
—
10
—
VDD = 200V
—
14
—
ID = 3.3A
ns
—
30
—
RG = 18Ω
—
13
—
RD = 56Ω, See Fig. 10
—
4.0
—
Between lead,
6mm (0.25in.)
nH
—
6.0
—
from package
and center of
die contact
— 410
—
VGS = 0V
— 120
—
pF
VDS = 25V
—
47
—
ƒ = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
IS
ISM
VSD
trr
Qrr
ton
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Min. Typ. Max. Units Conditions
MOSFET symbol
—
— 0.49
showing the
A
integral reverse
—
—
3.9
p-n junction diode.
—
—
1.6
V
TJ = 25°C, IS = 0.49A, VGS = 0V
— 270 600
ns
TJ = 25°C, IF = 3.3A
—
1.4 3.0
µC di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
ISD ≤ 2.0A, di/dt ≤ 40A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 150°C
VDD = 50V, starting TJ = 25°C, L = 21mH
RG = 25Ω, IAS = 2.0A. (See Figure 12)
Pulse width ≤ 300µs; duty cycle ≤ 2%.
To Order
Previous Datasheet
Index
Next Data Sheet
ID, Drain Current (Amps)
ID, Drain Current (Amps)
IRFD320
Fig 2. Typical Output Characteristics,
TC = 150oC
ID, Drain Current (Amps)
RDS(on), Drain-to-Source On Resistance
(Normalized)
Fig 1. Typical Output Characteristics,
TC = 25oC
Fig 3. Typical Transfer Characteristics
To Order
Fig 4. Normalized On-Resistance
Vs. Temperature
Previous Datasheet
Index
Next Data Sheet
Capacitance (pF)
VGS, Gate-to-Source Voltage (volts)
IRFD320
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
ID, Drain Current (Amps)
ISD, Reverse Drain Current (Amps)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
Fig 8. Maximum Safe Operating Area
To Order
Previous Datasheet
Index
Next Data Sheet
ID, Drain Current (Amps)
IRFD320
Fig 10a. Switching Time Test Circuit
Fig 9. Maximum Drain Current Vs.
Case Temperature
Fig 10b. Switching Time Waveforms
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
To Order
Previous Datasheet
Index
Next Data Sheet
IRFD320
Fig 12a. Unclamped Inductive Test Circuit
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
To Order
Previous Datasheet
Index
Next Data Sheet
IRFD320
dv/dt Test Circuit
Peak Diode RecoveryTest Circuit
To Order
Previous Datasheet
Index
Next Data Sheet
IRFD320
Package Outline
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: (44) 0883 713215
IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 3L1, Tel: (905) 475 1897 IR GERMANY:
Saalburgstrasse 157, 61350 Bad Homburg Tel: 6172 37066 IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: (39)
1145 10111 IR FAR EAST: K&H Bldg., 2F, 3-30-4 Nishi-Ikeburo 3-Chome, Toshima-Ki, Tokyo 171 Tel: (03)3983 0641
IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, 0316 Tel: 65 221 8371
Data and specifications subject to change without notice.
To Order