INTEGRATED CIRCUITS 74LVC652 Octal transceiver/register with dual enable (3-State) Product specification Supercedes data of 1993 Dec 01 IC24 Data Handbook 1998 Jul 29 Philips Semiconductors Product specification Octal transceiver/register with dual enable (3-State) 74LVC652 The 74LVC652 consist of 8 non-inverting bus transceiver circuits with 3-State outputs, D-type flip-flops and control circuitry arranged for multiplexed transmission of data directly from the internal registers. Data on the ‘A’ or ‘B’ or both buses, will be stored in the internal registers, at the appropriate clock inputs (CPAB or CPBA) regardless of the select inputs (SAB and SBA) or output enable (OEAB and OEBA) control inputs. Depending on the select inputs SAB and SBA data can directly go from input to output (real time mode) or data can be controlled by the clock (storage mode), this is when the OEn inputs this operating mode permits. The output enable inputs OEAB and OEBA determine the operation mode of the transceiver. *FEATURES • Wide supply voltage range of 1.2V to 3.6V • In accordance with JEDEC standard no. 8-1A • CMOS low power consumption • Direct interface with TTL levels • 5 Volt tolerant inputs/outputs, for interfacing with 5 Volt logic DESCRIPTION The 74LVC652 is a high performance, low-power, low-voltage Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. When OEAB is LOW, no data transmission from An to Bn is possible and when OEBA is HIGH, there is no data transmission from Bn to An possible. When SAB and SBA are in the real time transfer mode, it is also possible to store data without using the internal D-type flip-flops by simultaneously enabling OEAB and OEBA. In this configuration each output reinforces its input. Inputs can be driven from either 3.3V or 5.0V devices. In 3-State operation, outputs can handle 5V. This feature allows the use of these devices as translators in a mixed 3.3V/5V environment. QUICK REFERENCE DATA GND = 0V; Tamb = 25°C; tr = tf 2.5 ns SYMBOL PARAMETER CONDITIONS TYPICAL CL = 50pF VCC = 3.3V UNIT tPHL/tPLH Propagation delay An to Bn; Bn to An fmax Maximum clock frequency 150 MHz CI Input capacitance 5.0 pF CPD Power dissipation capacitance per latch 45 pF 5.0 Notes 1, 2 ns NOTES: 1. CPD is used to determine the dynamic power dissipation (PD in µW) PD = CPD VCC2 x fi Σ (CL VCC2 fo) where: fi = input frequency in MHz; CL = output load capacitance in pF; fo = output frequency in MHz; VCC = supply voltage in V; Σ (CL VCC2 fo) = sum of the outputs. 2. The condition is VI = GND to VCC. ORDERING AND PACKAGE INFORMATION TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA PKG. DWG. # 24-Pin Plastic SO –40°C to +85°C 74LVC652 D 74LVC652 D SOT137-1 24-Pin Plastic SSOP Type II –40°C to +85°C 74LVC652 DB 74LVC652 DB SOT340-1 24-Pin Plastic TSSOP Type I –40°C to +85°C 74LVC652 PW 4LVC652PW DH SOT355-1 PACKAGES 1998 Jul 29 2 853-2104 19803 Philips Semiconductors Product specification Octal transceiver/register with dual enable (3-State) PIN CONFIGURATION 74LVC652 PIN DESCRIPTION PIN NUMBER SYMBOL FUNCTION 1 CPAB ‘A’ to ‘B’ clock input (LOW-to-HIGH, edge-triggered) 2 SAB Select ‘A’ to ‘B’ source input 3 OEAB Output enable B to A input (active LOW) 4, 5, 6, 7, 8, 9, 10, 11 A0 to A7 ‘A’ data inputs/outputs 12 GND Ground (0V) B0 to B7 ‘B’ data inputs/outputs CP AB 1 24 V CC S AB 2 23 CP BA OE AB 3 22 S BA A0 4 21 OE BA A1 5 20 B0 A2 6 19 B1 A3 7 18 B2 20, 19, 18, 17, 16, 15, 14, 13 A4 8 17 B3 21 OEBA Output enable A to B input A5 9 16 B4 22 SBA Select ‘B’ to ‘A’ source input A 6 10 15 B5 23 CPBA 11 14 B6 ‘B’ to ‘A’ clock input (LOW-to-HIGH, edge-triggered) 12 13 B7 24 VCC Positive supply voltage A7 GND SV00767 FUNCTION TABLE INPUTS DATA I/O * FUNCTION OEAB OEBA CPAB CPBA SAB SBA A0 to A7 B0 to B7 L L H H H or L ↑ H or L ↑ X X X X input input isolation store A and B data X H H H ↑ ↑ H or L ↑ X L X X input input un * output store A, hold B, store A in both registers L L X L H or L ↑ ↑ ↑ X X X L un * output input input hold A, store B, store B in both registers L L L L X X X H or L X X L H output input H H H H X H or L X X L H X X input output real-time A data to B bus stored A data to B bus H L H or L H or L H H output output stored A data to B bus and stored B data to A bus * un H L X ↑ The data output functions may be enabled or disabled by various signals at the OEAB and OEBA inputs. Data input functions are always enabled, i.e., data at the bus inputs will be stored on every LOW-to-HIGH transition on the clock inputs. = unspecified = HIGH voltage level = LOW voltage level = Don’t care = LOW–to–HIGH level transition 1998 Jul 29 3 real-time B data to A bus stored B data to A bus Philips Semiconductors Product specification Octal transceiver/register with dual enable (3-State) LOGIC SYMBOL 74LVC652 FUNCTIONAL DIAGRAM 21 1 CP AB 2 S AB 4 OE BA CP BA 23 S BA 22 A0 B0 20 5 A1 B1 19 6 A2 B2 18 7 A3 B3 17 8 A4 B4 16 9 A5 B5 15 10 A6 B6 14 11 A7 B7 13 OE AB 3 4 A 5 A 6 A 7 A 8 A 9 A 10 A 11 A 21 OE 3 OE 2 S 22 S 1 B 2 B 3 B 4 B 5 B 6 B 7 0 1 2 3 4 5 6 7 20 19 18 17 16 15 14 13 BA AB AB BA 1 CP 23 CP 23 C4 B 1 SV00768 LOGIC SYMBOL (IEEE/IEC) B 0 AB BA C5 22 G6 2 G7 21 3 SV00770 3EN1 3EN2 1 6 4 4D 1 6 7 5D 1 1 1 2 20 7 5 19 6 18 7 17 8 16 9 15 10 14 11 13 SV00769 1998 Jul 29 4 Philips Semiconductors Product specification Octal transceiver/register with dual enable (3-State) 74LVC652 LOGIC DIAGRAM OE BA OE AB S BA CP BA S AB CP AB V CC Y S D1 MUX An D2 Q D FF n CP V CC S D1 Y MUX D Q Bn D2 FF n CP 8 identical channels SV00771 1998 Jul 29 5 Philips Semiconductors Product specification Octal transceiver/register with dual enable (3-State) 74LVC652 RECOMMENDED OPERATING CONDITIONS SYMBOL VCC VI PARAMETER CONDITIONS LIMITS MIN MAX DC supply voltage (for max. speed performance) 2.7 3.6 DC supply voltage (for low-voltage applications) 1.2 3.6 UNIT V DC input voltage range 0 5.5 V VI/O DC input voltage range for I/Os 0 VCC V VO DC output voltage range 0 VCC V –40 +85 °C 0 0 20 10 ns/V Tamb Operating free-air temperature range tr, tf Input rise and fall times VCC = 1.2 to 2.7V VCC = 2.7 to 3.6V ABSOLUTE MAXIMUM RATINGS1 In accordance with the Absolute Maximum Rating System (IEC 134) Voltages are referenced to GND (ground = 0V) SYMBOL VCC PARAMETER CONDITIONS DC supply voltage RATING UNIT –0.5 to +4.6 V mA IIK DC input diode current VI t0 –50 VI DC input voltage Note 2 –0.5 to +5.5 V IOK DC output diode current VO uVCC or VO t 0 "50 mA DC output voltage; output HIGH or LOW Note 2 –0.5 to VCC +0.5 V DC input voltage; output 3-State Note 2 –0.5 to VCC +0.5 V IO DC output diode current VO = 0 to VCC "50 mA IGND, ICC DC VCC or GND current "100 mA –65 to +150 °C VI/O Tstg PTOT Storage temperature range Power dissipation per package – plastic mini-pack (SO) – plastic shrink mini-pack (SSOP and TSSOP) above +70°C derate linearly with 8 mW/K 500 above +60°C derate linearly with 5.5 mW/K 500 mW NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 1998 Jul 29 6 Philips Semiconductors Product specification Octal transceiver/register with dual enable (3-State) 74LVC652 DC ELECTRICAL CHARACTERISTICS Over recommended operating conditions voltages are referenced to GND (ground = 0V) LIMITS SYMBOL PARAMETER TEST CONDITIONS Temp = -40°C to +85°C MIN VIH HIGH level Input voltage VIL LOW level Input voltage VOH O VCC = 1.2V VCC VCC = 2.7 to 3.6V 2.0 TYP1 V VCC = 1.2V GND V VCC = 2.7 to 3.6V HIGH level output voltage 0.8 VCC = 2.7V; VI = VIH or VIL; IO = –12mA VCC0.5 VCC = 3.0V; VI = VIH or VIL; IO = –100µA VCC0.2 VCC = 3.0V; VI = VIH or VIL; IO = –18mA VCC0.6 VCC = 3.0V; VI = VIH or VIL; IO = –24mA VCC0.8 VCC VCC = 2.7V; VI = VIH or VIL; IO = 12mA VOL LOW level output voltage VCC = 3.0V; VI = VIH or VIL; IO = 100µA GND V 0.55 5 µA 0.1 15 µA VCC = 3.6V; VI = VIH or VIL; VO = 5.5V or GND 0.1 10 µA Power off leakage current VCC = 0.0V; VI = 5.5V; VO = 5.5V 0.1 10 µA Quiescent supply current VCC = 3.6V; VI = VCC or GND; IO = 0 0.1 10 µA Additional quiescent supply current per input pin VCC = 2.7V to 3.6V; VI = VCC –0.6V; IO = 0 5 500 µA VCC = 3.6V; VI = 5.5V or GND IIHZ/IILZ Input current for common I/O pins VCC = 3.6V; VI = 5.5V or GND IOZ 3-State output OFF-state current IOFF ICC NOTES: 1. All typical values are at VCC = 3.3V and Tamb = 25°C. 1998 Jul 29 0.20 0.1 Input leakage current ∆ICC V 0.40 VCC = 3.0V; VI = VIH or VIL; IO = 24mA II UNIT MAX 7 Not for I/O pins Philips Semiconductors Product specification Octal transceiver/register with dual enable (3-State) 74LVC652 AC CHARACTERISTICS GND = 0 V; tr = tf v 2.5 ns; CL = 50 pF LIMITS SYMBOL PARAMETER VCC = 3.3V ±0.3V WAVEFORM VCC = 2.7V VCC = 1.2V UNIT MIN TYP1 MAX MIN MAX MIN TYP tPHL/tPLH Propagation delay An to Bn, Bn to An Figures 1, 5 1.5 4.6 7.9 1.5 9.2 1.5 24 ns tPHL/tPLH Propagation delay CPAB, CPBA to Bn, An Figures 2, 5 1.5 5.2 8.9 1.5 11 1.5 26 ns tPHL/tPLH Propagation delay SAB, SBA to Bn, An Figures 3, 5 1.5 5.2 8.8 1.5 11 1.5 27 ns tPZH/tPZL 3-State output enable time OEAB to Bn Figures 4, 5 1.5 4.8 8.0 1.5 10 1.5 20 ns tPHZ/tPLZ 3-State output disable time OEAB to Bn Figures 4, 5 1.5 4.4 8.0 1.5 10 1.5 10 ns tPZH/tPZL 3-State output enable time OEBA to An Figures 4, 5 1.5 4.8 8.0 1.5 10 1.5 20 ns tPHZ/tPLZ 3-State output disable time OEBA to An Figures 4, 5 1.5 4.4 8.0 1.5 10 1.5 10 ns Figures 4, 5 – 3.0 – 3.0 – – – ns tW Clock pulse width HIGH or LOW CPAB or CPBA tsu Set-up time An, Bn to CPAB, CPBA Figure 2 1.5 0.5 – 1.5 – – – ns th Hold time An, Bn to CPAB, CPBA Figure 2 1.0 0 – 1.0 – – – ns fmax Maximum clock pulse frequency Figure 2 7.5 150 – – – – – MHz NOTE: 1. These typical values are at VCC = 3.3V and Tamb = 25°C. AC WAVEFORMS VM = 1.5V at VCC w 2.7V VM = 0.5V * VCC at VCC t 2.7V VOL and VOH are the typical output voltage drop that occur with the output load. VX = VOL + 0.3V at VCC w 2.7V VX = VOL + 0.1VCC at VCC < 2.7V VY = VOH – 0.3V at VCC w 2.7V VY = VOH – 0.1VCC at VCC < 2.7V VI An, B n INPUT VM GND tsu VOH CPAB , CP BA OUTPUT VI An,B n INPUT VOL VM th VM tW 1/f max t PLH t PHL V OH OUTPUT tsu VOH B n, A n OUTPUT GND Bn, An th VOL tPHL tPLH VM V OL SV00773 Figure 2. An, Bn to CPAB, CPBA set-up and hold times, clock CPAB, CPBA pulse width, maximum clock pulse frequency and the CPAB, CPBA to output Bn, An propagation delays. SV00772 Figure 1. Input An, Bn to output Bn, An propagation delays. 1998 Jul 29 8 Philips Semiconductors Product specification Octal transceiver/register with dual enable (3-State) AC WAVEFORMS (Continued) 74LVC652 TEST CIRCUIT VM = 1.5V at VCC 2.7V VM = 0.5V * VCC at VCC 2.7V VOL and VOH are the typical output voltage drop that occur with the output load. VX = VOL + 0.3V at VCC 2.7V VX = VOL + 0.1VCC at VCC < 2.7V VY = VOH – 0.3V at VCC 2.7V VY = VOH – 0.1VCC at VCC < 2.7V S1 VCC PULSE GENERATOR VI 500Ω VO D.U.T. RT 50pF CL Test VI S AB , S BA VM INPUT 500Ω S1 VCC VI tPLH/tPHL Open 2.7V VCC tPLZ/tPZL 2 x VCC 2.7V – 3.6V 2.7V tPHZ/tPZH GND GND SY00003 t PHL t PLH Figure 5. Load circuitry for switching times. V OH Bn, A n OUTPUT VM V OL SV00774 Figure 3. Input SAB, SBA to output Bn, An propagation delay times. VI OE AB INPUT VM GND VCC OE BA INPUT VM GND VCC OUTPUT LOW–to–OFF OFF–to–LOW VOL tPLZ tPZL VM VX tPHZ VOH OUTPUT HIGH–to–OFF OFF–to–HIGH GND tPZH VY VM outputs enabled outputs disabled outputs enabled SV00775 Figure 4. OE inputs (OEAB, OEBA) to outputs An, Bn enable and disable times. 1998 Jul 29 2 x VCC Open GND 9 Philips Semiconductors Product specification Octal transceiver/register with dual enable (3-State) 74LVC652 APPLICATION INFORMATION BUS A BUS A BUS B Real-time transfer; bus A to bus B BUS B Real-time transfer; bus B to bus A SV00781 SV00782 OEAB OEBA CPAB CPBA SAB SBA OEAB OEBA CPAB CPBA SAB SBA L L X X X L H H X X L X BUS A BUS A BUS B Transfer A stored data to B bus or B stored data to A bus or both at the same time BUS B Store A, B or A and B in one register SV00783 OEBA CPAB CPBA SAB SBA OEAB OEBA CPAB X H ↑ L X X L H ↑ ↑ ↑ L X H H ↑ X X L L X X H L H or L X H X X H or L X H H or L H or L H H BUS A BUS A SAB SBA Isolation BUS B Store bus A in both registers or store bus B in both registers CPBA BUS B OEAB SV00784 SV00786 SV00785 OEAB OEBA CPAB CPBA SAB SBA OEAB OEBA CPAB CPBA SAB SBA H H ↑ ↑ L X L H H or L H or L X X L L ↑ ↑ X L 1998 Jul 29 10 Philips Semiconductors Product specification Octal transceiver/register with dual enable (3-State) SO24: plastic small outline package; 24 leads; body width 7.5 mm 1998 Jul 29 11 74LVC652 SOT137-1 Philips Semiconductors Product specification Octal transceiver/register with dual enable (3-State) SSOP24: plastic shrink small outline package; 24 leads; body width 5.3 mm 1998 Jul 29 12 74LVC652 SOT340-1 Philips Semiconductors Product specification Octal transceiver/register with dual enable (3-State) TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4.4 mm 1998 Jul 29 13 74LVC652 SOT355-1 Philips Semiconductors Product specification Octal transceiver/register with dual enable (3-State) 74LVC652 Data sheet status Data sheet status Product status Definition [1] Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 print code Document order number: yyyy mmm dd 14 Date of release: 08-98 9397-750-04517