AD ADG333ABR

Quad SPDT Switch
ADG333A
FEATURES
FUNCTIONAL BLOCK DIAGRAM
44 V supply maximum ratings
VSS to VDD analog signal range
Low on resistance (45 Ω max)
Low ∆RON (5 Ω max)
Low RON match (4 Ω max)
Low power dissipation
Fast switching times
tON < 175 ns
tOFF < 145 ns
Low leakage currents (5 nA max)
Low charge injection (10 pC max)
Break-before-make switching action
S4A
S1A
D2
D1
S4B
S1B
IN1
IN4
ADG333A
IN2
IN3
S2B
S3B
D2
S3A
SWITCHES SHOWN FOR A LOGIC 1 INPUT
01212-001
D3
S2A
Figure 1.
APPLICATIONS
Audio and video switching
Battery-powered systems
Test equipment
Communication systems
GENERAL DESCRIPTION
PRODUCT HIGHLIGHTS
The ADG333A is a monolithic CMOS device comprising four
independently selectable SPDT switches. It is designed on an
LC2MOS process, which provides low power dissipation yet
achieves a high switching speed and a low on resistance.
1.
Extended signal range.
The ADG333A is fabricated on an enhanced LC2MOS
process, giving an increased signal range which extends to
the supply rails.
The on resistance profile is very flat over the full analog input
range, ensuring good linearity and low distortion when
switching audio signals. High switching speed also makes the
part suitable for video signal switching. CMOS construction
ensures ultralow power dissipation, making the part ideally
suited for portable, battery-powered instruments.
2.
Low power dissipation.
3.
Low RON.
4.
Single-supply operation.
For applications where the analog signal is unipolar, the
ADG333A can be operated from a single rail power supply.
The part is fully specified with a single 12 V supply.
When they are on, each switch conducts equally well in both
directions and has an input signal range that extends to the
power supplies. In the off condition, signal levels up to the
supplies are blocked. All switches exhibit break-before-make
switching action for use in multiplexer applications. Inherent
in the design is low charge inject
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
© 2005 Analog Devices, Inc. All rights reserved.
ADG333A
TABLE OF CONTENTS
Specifications..................................................................................... 3
Typical Performance Characteristics ..............................................8
Dual Supply ................................................................................... 3
Test Circuits..................................................................................... 10
Single Supply ................................................................................. 4
Application Information................................................................ 11
Absolute Maximum Ratings............................................................ 5
ADG333A Supply Voltages ....................................................... 11
ESD Caution.................................................................................. 5
Power Supply Sequencing ......................................................... 11
Terminology ...................................................................................... 6
Outline Dimensions ....................................................................... 12
Pin Configurations and Function Descriptions ........................... 7
Ordering Guide .......................................................................... 12
REVISION HISTORY
3/05—Rev. 0 to Rev. A
Updated Format..................................................................Universal
Changes to Specifications Tables .................................................... 3
Updated Outline Dimensions ....................................................... 12
Changes to Ordering Guide .......................................................... 12
10/95—Revision 0: Initial Version
Rev. A | Page 2 of 12
ADG333A
SPECIFICATIONS
DUAL SUPPLY
VDD = +15 V, VSS = −15 V, GND = 0 V, unless otherwise noted.1
Table 1.
Parameter
ANALOG SWITCH
Analog Signal Range
RON
∆RON
RON Match
LEAKAGE CURRENTS
Source OFF Leakage IS (OFF)
Channel ON Leakage ID, IS (ON)
+25°C
20
45
±0.1
±0.25
±0.1
±0.4
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
IINL or IINH
DYNAMIC CHARACTERISTICS2
tON
−40°C to +85°C
Unit
VSS to VDD
V
Ω typ
Ω max
Ω max
Ω max
45
5
4
2.4
0.8
V min
V max
±0.005
±0.5
µA typ
µA max
VIN = 0 V or VDD
RL= 300 Ω, CL = 35 pF;
VS = ±10 V; Figure 17
RL = 300 Ω, CL = 35 pF;
VS = ±10 V; Figure 17
RL = 300 Ω, CL= 35 pF;
VS = +5 V; Figure 18
VD = 0 V, RD = 0 Ω, CL= 10 nF;
VDD = +15 V, VSS = –15 V; Figure 19
RL = 75 Ω, CL = 5 pF, f = 1 MHz;
VS = 2.3 V rms; Figure 20
RL = 75 Ω, CL = 5 pF, f = 1 MHz;
VS = 2.3 V rms; Figure 21
tOFF
80
Break-Before-Make Delay, tOPEN
10
Charge Injection
OFF Isolation
2
10
72
pC typ
pC max
dB typ
Channel-to-Channel Crosstalk
85
dB typ
7
26
pF typ
pF typ
175
145
ISS
VDD/VSS
1
2
VD = ±5 V, IS = –10 mA
VD = ±10 V, IS = –10 mA
VDD = +16.5 V, VSS = –16.5 V
VD = ±15.5 V, VS = +15.5 V
Figure 15
VS = VD = ±15.5 V
Figure 16
±5
90
0.05
0.25
0.01
1
VD = ±10 V, IS = –1 mA
nA typ
nA max
nA typ
nA max
±3
ns typ
ns max
ns typ
ns max
ns min
CS (OFF)
CD, CS (ON)
POWER REQUIREMENTS
IDD
Test Conditions/Comments
0.35
5
±3/±20
mA typ
mA max
µA typ
µA max
V min/V max
Temperature range is as follows: B version: −40°C to +85°C.
Guaranteed by design; not subject to production test.
Rev. A | Page 3 of 12
Digital inputs = 0 V or 5 V
|VDD| = |VSS|
ADG333A
SINGLE SUPPLY
VDD = +12 V, VSS = 0 V ± 10%, GND = 0 V, unless otherwise noted.1
Table 2.
Parameter
ANALOG SWITCH
Analog Signal Range
RON
+25°C
−40°C to +85°C
Unit
Test Conditions/Comments
0 V to VDD
V
Ω typ
Ω max
VD = 1 V, 10 V, IS = –1 mA
35
75
LEAKAGE CURRENTS
Source OFF Leakage IS (OFF)
Channel ON Leakage ID, IS (ON)
±0.1
±0.25
±0.1
±0.4
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
IINL or IINH
DYNAMIC CHARACTERISTICS2
tON
±5
2.4
0.8
V min
V max
±0.005
±0.5
µA typ
µA max
VIN = 0 V or VDD
RL = 300 Ω, CL = 35 pF;
VS = 8 V; Figure 17
RL = 300 Ω, CL = 35 pF;
VS = 8 V; Figure 17
RL = 300 Ω, CL = 35 pF;
VS = 5 V; Figure 18
VD = 6 V, RD = 0 W, CL = 10 nF;
VDD = 12 V, VSS = 0 V; Figure 19
RL = 75 Ω, CL = 5 pF, f = 1 MHz;
VS = 1.15 V rms; Figure 20
RL = 75 Ω, CL = 5 pF, f = 1 MHz;
VS = 1.15 V rms; Figure 21
±3
110
tOFF
100
Break-Before-Make Delay, tOPEN
10
Charge Injection
5
ns typ
ns max
ns typ
ns max
ns min
ns min
pC typ
OFF Isolation
72
dB typ
Channel-to-Channel Crosstalk
85
dB typ
12
25
pF typ
pF typ
0.05
0.25
mA typ
mA max
V min/V max
200
180
CS (OFF)
CD, CS (ON)
POWER REQUIREMENTS
IDD
VDD
1
2
VDD = 13.2 V
VD = 12.2 V/1 V, VS = 1 V/12.2 V
Figure 15
VS = VD = 12.2 V/1 V
Figure 16
nA typ
nA max
nA typ
nA max
0.35
±3/±30
Temperature range is as follows: B Version: −40°C to +85°C.
Guaranteed by design; not subject to production test.
Rev. A | Page 4 of 12
VDD = 13.5 V
Digital inputs = 0 V or 5 V
ADG333A
ABSOLUTE MAXIMUM RATINGS
TA = 25°C unless otherwise noted.
Table 3.
Parameter
VDD to VSS
VDD to GND
VSS to GND
Analog, Digital Inputs1
Continuous Current, S or D
Peak Current, S or D (Pulsed at
1 ms, 10% Duty Cycle Max)
Operating Temperature Range
Industrial (B Version)
Storage Temperature Range
Junction Temperature
θJA, Thermal Impedance
PDIP Package
SOIC Package
SSOP Package
Lead Temperature, Soldering
(10 sec)
Lead Temperature, Soldering
Vapor Phase (60 sec)
Infrared (15 sec)
Lead Temperature, Soldering
Vapor Phase (60 sec)
Infrared (15 sec)
1
Min
+44 V
–0.3 V to +30 V
+0.3 V to –30 V
VSS – 2 V to VDD + 2 V or 20 mA,
whichever occurs first
20 mA
40 mA
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Table 4. Truth Table
Logic
0
1
−40°C to +85°C
−65°C to +125°C
150°C
Switch A
Off
On
103°C/W
74°C/W
130°C/W
260°C
215°C
220°C
215°C
220°C
Overvoltage at IN, S, or D is clamped by internal diodes. Current should be
limited to the maximum ratings given.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. A | Page 5 of 12
Switch B
On
Off
ADG333A
TERMINOLOGY
RON
tON
Ohmic resistance between D and S.
Delay between applying the digital control input and the output
switching on.
∆RON
RON variation due to a change in the analog input voltage with a
constant load current.
RON Match
Difference between the RON of any two channels.
tOFF
Delay between applying the digital control input and the output
switching off.
tOPEN
IS (OFF)
Break-before-make delay when switches are configured as a
multiplexer.
Source leakage current with the switch off.
VINL
ID (OFF)
Maximum input voltage for Logic 0.
Drain leakage current with the switch off.
VINH
ID, IS (ON)
Minimum input voltage for Logic 1.
Channel leakage current with the switch on.
IINL (IINH)
VD (VS)
Input current of the digital input.
Analog voltage on Terminals D, S.
Crosstalk
CS (OFF)
OFF switch source capacitance.
A measure of unwanted signal which is coupled through from
one channel to another as a result of parasitic capacitance.
CD (OFF)
Off Isolation
OFF switch drain capacitance.
A measure of unwanted signal coupling through an OFF switch.
CD, CS (ON)
Charge Injection
ON switch capacitance.
A measure of the glitch impulse transferred from the digital
input to the analog output during switching.
Rev. A | Page 6 of 12
ADG333A
IN4
S1A 2
19
S4A
D1 3
18
D4
17
S4B
16
VDD
GND 6
15
NC
S2B 7
14
S3B
D2 8
13
D3
S2A 9
12
S3A
IN2 10
11
IN3
ADG333A
S1B 4
TOP VIEW
(Not to Scale)
VSS 5
NC = NO CONNECT
IN1 1
20
IN4
S1A 2
19
S4A
D1 3
18
D4
S1B 4
VSS 5
ADG333A
17
S4B
16
VDD
TOP VIEW
GND 6 (Not to Scale) 15 NC
S2B 7
14 S3B
Figure 2. PDIP Pin Configuration
D2 8
13
D3
S2A 9
12
S3A
IN2 10
11
IN3
NC = NO CONNECT
IN1 1
20
IN4
S1A 2
19
S4A
D1 3
18
D4
S1B 4
ADG333A
17
S4B
VSS 5
TOP VIEW
(Not to Scale)
16
VDD
15
NC
S2B 7
14
S3B
D2 8
13
D3
S2A 9
12
S3A
IN2 10
11
IN3
GND 6
01212-003
20
01212-002
IN1 1
Figure 3. SOIC Pin Configuration
NC = NO CONNECT
01212-004
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Figure 4. SSOP Pin Configuration
Table 5. Pin Function Descriptions
Pin No.
1, 10, 11, 20
2, 4, 7, 9, 12, 14,
17, 19
3, 8, 13, 18
5
Mnemonic
IN1, IN2, IN3, IN4
S1A, S1B, S2B, S2A,
S3A, S3B, S4B, S4A
D1, D2, D3, D4
VSS
6
15
16
GND
NC
VDD
Description
Logic Control Input.
Source Terminal. Can be an input or output.
Drain Terminal. Can be an input or output.
Most Negative Power Supply Potential in Dual Supplies. In single-supply applications, it can be
connected to ground.
Ground (0 V) Reference.
No Connect.
Most Positive Power Supply Potential.
Rev. A | Page 7 of 12
ADG333A
TYPICAL PERFORMANCE CHARACTERISTICS
60
60
VDD = 15V
VSS = 0V
TA = 25°C
50
50
+125°C
RON (Ω)
40
30
VDD = +10V
VSS = –10V
20
20
VDD = +15V
VSS = –15V
10
–15
–10
–5
0
VDD, VS (V)
5
10
0
3
6
9
12
15
VDD, VS (V)
Figure 8. RON as a Function of VD (VS) for Different Temperatures:
Single Supply
0.004
100
TA = 25°C
90
VDD = +16.5V
VSS = –16.5V
TA = 25°C
0.002
LEAKAGE CURRENT (nA)
VDD = +5V
VSS = –5V
70
60
50
VDD = +10V
VSS = –10V
40
VDD = +15V
VSS = –15V
20
0
3
6
9
12
0
–0.002
IS (ON)
–0.004
–0.006
ID (ON)
–0.008
01212-006
30
IS (OFF)
–0.010
–15
15
01212-009
80
RON (Ω)
+25°C
–40°C
10
15
Figure 5. RON as a Function of VD (VS):
Dual Supply
–10
–5
VDD, VS (V)
Figure 6. RON as a Function of VD (VS):
Single Supply
40
0
VD, VS (V)
5
10
15
Figure 9. Leakage Currents as a Function of VD (VS):
Dual Supply
0.001
45
VDD = +15V
VSS = –15V
IS (OFF)
LEAKAGE CURRENT (nA)
0
35
+125°C
RON (Ω)
+85°C
40
01212-008
30
01212-005
RON (Ω)
VDD = +5V
VSS = –5V
30
+85°C
25
20
VDD = +16.5V
VSS = –16.5V
TA = 25°C
–0.001
ID (ON)
–0.002
IS (ON)
10
–15
–40°C
–10
+25°C
–5
0
VDD, VS (V)
5
01212-007
15
10
01212-010
–0.003
–0.004
0
15
3
6
VD, VS (V)
9
Figure 10. Leakage Currents as a Function of VD (VS):
Single Supply
Figure 7. RON as a Function of VD (VS) for Different Temperatures:
Dual Supply
Rev. A | Page 8 of 12
12
ADG333A
20
1
CL = 10nF
VDD = +16.5V
VSS = –16.5V
TA = 25°C
15
0.8
10
IDD (mA)
Q (pC)
5
VDD = +16.5V
VSS = –16.5V
0
VDD = +12V
VSS = 0V
–5
0.6
0.4
–10
01212-011
–20
–15
–10
–5
0
VS (V)
5
10
0
15
0
Figure 11. Charge Injection as a Function of VS
VD = +2V
VS = –2V
120
100
80
01212-012
SWITCHING TIME (ns)
140
0
5
10
VDD (V)
15
200
400
600
800
SWITCHING FREQUENCY (kHz)
Figure 13. IDD as a Function of Switching Frequency
160
60
01212-013
0.2
–15
20
Figure 12. Switching Time as a Function of VD
Rev. A | Page 9 of 12
1000
ADG333A
TEST CIRCUITS
IDS
V1
ID (ON)
IS (OFF)
RON = V1/IDS
S
VS
A
S
D
VD
NC = NO CONNECT
Figure 16. On Leakage
VDD
0.1µF
+3V
VDD
50%
VIN
SB
D
VS
VOUT
RL
300Ω
SA
+10V
VD
Figure 15. Off Leakage
Figure 14. On Resistance
–10V
D
CL
35pF
50%
0V
+10V
IN
tOFF
VS
0V
VSS
GND
tON
50%
50%
01212-017
–10V
0.1µF
VSS
Figure 17. Switching Times
VDD
0.1µF
3V
VDD
VS
VIN
SB
D
VOUT
RL
300Ω
SA
CL
35pF
0V
VS
IN
50%
VOUT
50%
VSS
GND
01212-018
tOPEN
0.1µF
VSS
Figure 18. Break-Before-Make Delay, tOPEN
VDD
VDD
3V
VD
D
SA
CL
10nF
IN
VIN
VOUT
0V
VOUT
VSS
GND
QINJ = CL × ∆VOUT
0V
∆VOUT
01212-019
RD
VSS
Figure 19. Charge Injection
0.1µF
VDD
VDD
S
VDD
S
RL
75Ω
D
S
VOUT
0.1µF
VSS
01212-020
VS
VOUT
VSS
GND
VIN2
VIN1
VS
VIN
75Ω
D
D
NC
RL
75Ω
VSS
GND
0.1µF
VSS
Figure 20. Off Isolation
CHANNEL-TO-CHANNEL
CROSSTALK
20 × LOG |VS/VOUT|
Figure 21. Channel-to-Channel Crosstalk
Rev. A | Page 10 of 12
01212-021
0.1µF
VDD
01212-016
VD
01212-015
D
01212-014
S
NC
A
ADG333A
APPLICATION INFORMATION
ADG333A SUPPLY VOLTAGES
POWER SUPPLY SEQUENCING
The ADG333A can operate from a dual or signal supply. VSS
should be connected to GND when operating with a single
supply. When using a dual supply, the ADG333A can also
operate with unbalanced supplies; for example VDD = 20 V and
VSS = −5 V. The only restrictions are that VDD to GND must not
exceed 30 V, VSS to GND must not drop below −30 V, and VDD
to VSS must not exceed +44 V. It is important to remember that
the ADG333A supply voltage directly affects the input signal
range, the switch on resistance and the switching times of the
part. The effects of the power supplies on these characteristics
can be clearly seen from the Typical Performance Characteristics
curves.
When using CMOS devices, care must be taken to ensure
correct power-supply sequencing. Incorrect power-supply
sequencing can result in the device being subjected to stresses
beyond those listed in the Absolute Maximum Ratings. This is
also true for the ADG333A. Always turn on VDD first, followed
by VSS and the logic signals. An external signal within the maximum specified ratings can then be safely presented to the source
or drain of the switch
Rev. A | Page 11 of 12
ADG333A
OUTLINE DIMENSIONS
1.060 (26.92)
1.030 (26.16)
0.980 (24.89)
20
1
11
10
13.00 (0.5118)
12.60 (0.4961)
0.280 (7.11)
0.250 (6.35)
0.240 (6.10)
20
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
PIN 1
0.100 (2.54)
BSC
7.60 (0.2992)
7.40 (0.2913)
0.060 (1.52)
MAX
0.210
(5.33)
MAX
0.015
(0.38)
MIN
0.150 (3.81)
0.130 (3.30)
0.115 (2.92)
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
0.015 (0.38)
GAUGE
PLANE
1
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
SEATING
PLANE
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
10
0.070 (1.78)
0.060 (1.52)
0.045 (1.14)
10.65 (0.4193)
10.00 (0.3937)
2.65 (0.1043)
2.35 (0.0925)
0.30 (0.0118)
0.10 (0.0039)
0.430 (10.92)
MAX
0.005 (0.13)
MIN
11
COPLANARITY
0.10
1.27
(0.0500)
BSC
0.75 (0.0295)
× 45°
0.25 (0.0098)
8°
0.51 (0.0201) SEATING
0.33 (0.0130) 0°
0.31 (0.0122) PLANE
0.20 (0.0079)
1.27 (0.0500)
0.40 (0.0157)
COMPLIANT TO JEDEC STANDARDS MS-001-AD
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
COMPLIANT TO JEDEC STANDARDS MS-013AC
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
Figure 22. 20-Lead Plastic Dual In-Line Package [PDIP]
Narrow Body (N-20)
Dimensions shown in inches and (millimeters)
Figure 23. 20-Lead Standard Small Outline Package [SOIC]
Wide Body (R-20)
Dimensions shown in millimeters and (inches)
7.50
7.20
6.90
20
11
1
10
5.60
5.30
8.20
5.00
7.80
7.40
PIN 1
2.00 MAX
0.65
BSC
0.05 MIN
COPLANARITY
0.10
1.85
1.75
1.65
0.38
0.22
0.25
0.09
SEATING
PLANE
8°
4°
0°
0.95
0.75
0.55
COMPLIANT TO JEDEC STANDARDS MO-150AE
Figure 24. 20-Lead Shrink Small Outline Package [SSOP]
(RS-20)
Dimensions shown in millimeters
ORDERING GUIDE
Model
ADG333ABN
ADG333ABR
ADG333ABR-REEL
ADG333ABRZ1
ADG333ABRZ-REEL1
ADG333ABRS
ADG333ABRS-REEL
ADG333ABRSZ1
ADG333ABRSZ-REEL1
1
Temperature Range
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
Package Description
20-Lead Plastic Dual In-Line Package (PDIP)
20-Lead Standard Small Outline Package (SOIC)
20-Lead Standard Small Outline Package (SOIC)
20-Lead Standard Small Outline Package (SOIC)
20-Lead Standard Small Outline Package (SOIC)
20-Lead Shrink Small Outline Package (SSOP)
20-Lead Shrink Small Outline Package (SSOP)
20-Lead Shrink Small Outline Package (SSOP)
20-Lead Shrink Small Outline Package (SSOP)
Z = Pb-free part.
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C01212–0–3/05(A)
Rev. A | Page 12 of 12
Package Option
N-20
R-20
R-20
R-20
R-20
RS-20
RS-20
RS-20
RS-20