a FEATURES 44 V Supply Maximum Ratings V SS to VDD Analog Signal Range Low On Resistance (12 ⍀ Typ) Low ⌬R ON (3 ⍀ Max) Low RON Match (2.5 ⍀ Max) Low Power Dissipation Fast Switching Times tON < 175 ns tOFF < 145 ns Low Leakage Currents (5 nA Max) Low Charge Injection (10 pC) Break-Before-Make Switching Action Dual SPDT Switch ADG436 FUNCTIONAL BLOCK DIAGRAM S2A S1A D1 D2 S1B S2B IN2 IN1 ADG436 APPLICATIONS Audio and Video Switching Battery Powered Systems Test Equipment Communications Systems GENERAL DESCRIPTION PRODUCT HIGHLIGHTS The ADG436 is a monolithic CMOS device comprising two independently selectable SPDT switches. It is designed on an LC2MOS process which provides low power dissipation yet gives high switching speed and low on resistance. 1. Extended Signal Range The ADG436 is fabricated on an enhanced LC2MOS process, giving an increased signal range which extends to the supply rails. The on resistance profile is very flat over the full analog input range ensuring good linearity and low distortion when switching audio signals. High switching speed also makes the part suitable for video signal switching. CMOS construction ensures ultralow power dissipation making the part ideally suited for portable and battery powered instruments. 2. Low Power Dissipation 3. Low RON 4. Single Supply Operation For applications where the analog signal is unipolar, the ADG436 can be operated from a single rail power supply. Each switch conducts equally well in both directions when ON and has an input signal range which extends to the power supplies. In the OFF condition, signal levels up to the supplies are blocked. All switches exhibit break-before-make switching action for use in multiplexer applications. Inherent in the design is low charge injection for minimum transients when switching the digital inputs. REV. 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Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 1998 ADG436–SPECIFICATIONS1 Dual Supply (VDD = +15 V, VSS = –15 V, GND = 0 V, unless otherwise noted) Parameter +25ⴗC ANALOG SWITCH Analog Signal Range RON 12 ∆RON –40ⴗC to +85ⴗC VSS to VDD 25 1 3 RON Match 1 2.5 LEAKAGE CURRENTS Source OFF Leakage IS (OFF) Channel ON Leakage ID, IS (ON) ± 0.005 ± 0.25 ± 0.05 ± 0.4 DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH DYNAMIC CHARACTERISTICS2 tON Units V Ω typ Ω max Ω typ Ω max Ω typ Ω max VDD = +16.5 V, VSS = –16.5 V VD = ± 15.5 V, VS = ± 15.5 V Test Circuit 2 VS = VD = ± 15.5 V Test Circuit 3 V min V max ± 0.005 ± 0.5 µA typ µA max VIN = 0 V or VDD RL = 300 Ω, C L = 35 pF; VS = ± 10 V; Test Circuit 4 RL = 300 Ω, C L = 35 pF; VS = ± 10 V; Test Circuit 4 RL = 300 Ω, C L = 35 pF; VS = +5 V; Test Circuit 5 VD = 0 V, RD = 0 Ω, CL = 10 nF; Test Circuit 6 RL = 75 Ω, CL = 5 pF, f = 1 MHz; VS = 2.3 V rms, Test Circuit 7 RL = 75 Ω, CL = 5 pF, f = 1 MHz; VS = 2.3 V rms, Test Circuit 8 tOFF 60 Break-Before-Make Delay, tOPEN 10 Charge Injection 10 pC typ OFF Isolation 72 dB typ Channel-to-Channel Crosstalk 90 dB typ CS (OFF) CD, CS (ON) 10 30 pF typ pF typ 120 0.05 0.35 VDD/VSS VD = ± 10 V, IS = –10 mA 2.4 0.8 70 0.01 1 VD = –5 V, 5 V, IS = –10 mA ±5 ±5 ns typ ns max ns typ ns max ns min ISS VD = ± 10 V, IS = –1 mA nA typ nA max nA typ nA max 125 POWER REQUIREMENTS IDD Test Conditions/ Comments 5 ± 3/± 20 mA typ mA max µA typ µA max V min/V max Digital Inputs = 0 V or 5 V |VDD| = |VSS| NOTES 1 Temperature range is as follows: B Version, –40°C to +85°C. 2 Guaranteed by design, not subject to production test. Specifications subject to change without notice. –2– REV. A ADG436 Single Supply (V DD = +12 V, VSS = 0 V, GND = 0 V, unless otherwise noted) Parameter +25ⴗC ANALOG SWITCH Analog Signal Range RON 20 0 to VDD 40 2.5 RON Match LEAKAGE CURRENTS Source OFF Leakage IS (OFF) Channel ON Leakage ID, IS (ON) ± 0.005 ± 0.25 ± 0.05 ±4 DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH DYNAMIC CHARACTERISTICS2 tON –40ⴗC to +85ⴗC Units V Ω typ Ω max Ω max 2.4 0.8 V min V max ± 0.005 ± 0.5 µA typ µA max VIN = 0 V or VDD RL = 300 Ω, C L = 35 pF; VS = +8 V; Test Circuit 4 RL = 300 Ω, C L = 35 pF; VS = +8 V; Test Circuit 4 RL = 300 Ω, C L = 35 pF; VS = +5 V; Test Circuit 5 VD = 6 V, RD = 0 Ω, CL = 10 nF; Test Circuit 6 RL = 75 Ω, CL = 5 pF, f = 1 MHz; VS = 1.15 V rms; Test Circuit 7 RL = 75 Ω, CL = 5 pF, f = 1 MHz; VS = 1.15 V rms, Test Circuit 8 tOFF 90 Break-Before-Make Delay, tOPEN 10 ns typ ns max ns typ ns max ns typ Charge Injection 10 pC typ OFF Isolation 72 dB typ Channel-to-Channel Crosstalk 90 dB typ CS (OFF) CD, CS (ON) 10 30 pF typ pF typ 0.05 mA typ mA max V min/V max 180 0.35 +3/+30 NOTES 1 Temperature range is as follows: B Version, – 40°C to +85°C. 2 Guaranteed by design, not subject to production test. Specifications subject to change without notice. REV. A VDD = +13.2 V VD = 12.2 V/1 V, VS = 1 V/12.2 V Test Circuit 2 VS = VD = 12.2 V/1 V Test Circuit 3 ±5 ±5 100 VDD VD = +1 V, +10 V, IS = –1 mA nA typ nA max nA typ nA max 200 POWER REQUIREMENTS IDD Test Conditions/ Comments –3– VDD = +13.5 V Digital Inputs = 0 V or 5 V ADG436 ABSOLUTE MAXIMUM RATINGS 1 SOIC Package θJA, Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 77°C/W Lead Temperature, Soldering Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . +215°C Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . +220°C (TA = +25°C unless otherwise noted) VDD to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +44 V VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +30 V VSS to GND . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to –30 V Analog, Digital Inputs2 . . . . . . . . . . . VSS – 2 V to VDD + 2 V or 20 mA, whichever occurs first Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . 20 mA Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . 40 mA (Pulsed at 1 ms, 10% Duty Cycle max) Operating Temperature Range Industrial (B Version) . . . . . . . . . . . . . . . –40°C to +85°C Storage Temperature Range . . . . . . . . . . . . –65°C to +125°C Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . +150°C Plastic DIP Package θJA, Thermal Impedance . . . . . . . . . . . . . . . . . . . 117°C/W Lead Temperature, Soldering (10 sec) . . . . . . . . . . +260°C NOTES 1 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at any one time. 2 Overvoltages at IN, S or D will be clamped by internal diodes. Current should be limited to the maximum ratings given. CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADG436 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. WARNING! ESD SENSITIVE DEVICE Table I. Truth Table Logic Switch A Switch B 0 1 OFF ON ON OFF ORDERING GUIDE Model Temperature Range Package Descriptions Package Options ADG436BN ADG436BR – 40°C to +85°C – 40°C to +85°C Plastic DIP 0.15" SOIC N-16 R-16A –4– REV. A ADG436 TERMINOLOGY VDD VSS GND S D IN RON ∆RON RON Match IS (OFF) ID, IS (ON) VD (VS ) CS (OFF) CD, CS (ON) tON Most positive power supply potential. Most negative power supply potential in dual supplies. In single supply applications, it may be connected to ground. Ground (0 V) reference. Source terminal. May be an input or output. Drain terminal. May be an input or output. Logic control input. Ohmic resistance between D and S. RON variation due to a change in the analog input voltage with a constant load current. Difference between the RON of any two channels. Source leakage current with the switch “OFF.” Channel leakage current with the switch “ON.” Analog voltage on terminals D, S. “OFF” switch source capacitance. “ON” switch capacitance. Delay between applying the digital control input and the output switching on. tOFF Delay between applying the digital control input and the output switching off. tOPEN Break-before-make delay when switches are configured as a multiplexer. VINL Maximum input voltage for Logic “0.” VINH Minimum input voltage for Logic “1.” IINL (IINH) Input current of the digital input. Crosstalk A measure of unwanted signal that is coupled through from one channel to another as a result of parasitic capacitance. Off Isolation A measure of unwanted signal coupling through an “OFF” switch. Charge Injection A measure of the glitch impulse transferred from the digital input to the analog output during switching. IDD Positive supply current. ISS Negative supply current. PIN CONFIGURATION (DIP/SOIC) IN1 1 16 NC S1A 2 15 NC 14 NC D1 3 ADG436 13 VDD TOP VIEW VSS 5 (Not to Scale) 12 S2B S1B 4 11 D2 GND 6 NC 7 10 S2A NC 8 9 IN2 NC = NO CONNECT REV. A –5– ADG436–Typical Performance Characteristics 50 26 16 TA = +258C VDD = +16.5V VSS = –16.5V 45 VDD = +5V VSS = –5V 40 14 14 VDD = +10V VSS = –10V RON – V 35 18 RON – V RON – V 22 VDD = +5V VSS = 0V 30 25 VDD = +10V VSS = 0V 20 10 VDD = +15V VSS = –15V 6 –15 10 –10 –5 0 5 VD, VS – Volts 10 0 15 Figure 1. RON as a Function of VD (VS): Dual Supply 3 6 9 VD, VS – Volts 12 –0.01 –0.02 +258C 10 15 0 IS(OFF) – nA ID(ON) – nA +858C 14 –5 0 5 VD, VS – Volts VDD = +16.5V VSS = –16.5V TA = +258C 0 16 –10 0.01 VDD = +16.5V VSS = –16.5V TA = +258C 18 RON – V –408C Figure 3. RON as a Function of VD (VS) for Different Temperatures: Dual Supply 0.01 VDD = +16.5V VSS = 0V 12 +258C 6 –15 15 Figure 2. RON as a Function of VD (V S): Single Power Supply 20 +858C 10 8 VDD = +15V VSS = 0V 15 12 –0.01 –0.02 –408C 0 3 6 9 VD, VS – Volts 12 15 Figure 4. RON as a Function of VD (VS) for Different Temperatures: Single Supply –0.03 –15 10 15 Figure 5. ID (ON) Leakage Current as a Function of VD (VS): Dual Supply 0.01 SWITCHING TIME – ns –0.01 –0.02 –5 0 5 VD, VS – Volts 10 15 140 0.8 120 0.6 100 Figure 7. IS (ON) Leakage Current as a Function of VD (VS): Dual Supply 60 –5 0 5 VD, VS – Volts 10 15 1 80 –10 –10 Figure 6. IS (OFF) Leakage Current as a Function of VD (VS): Dual Supply VD = 2V VS = –2V 0 –0.03 –15 –0.03 –15 160 VDD = +16.5V VSS = –16.5V TA = +258C IS(ON) – nA –5 0 5 VD, VS – Volts –10 IDD – mA 10 VDD = +16.5V VSS = –16.5V TA = +258C 0.4 0.2 0 5 10 VD, VS – Volts 15 20 Figure 8. Switching Time as a Function of VD (V S): Dual Supply –6– 0 0 200 400 600 800 1000 SWITCHING FREQUENCY – kHz Figure 9. I DD as a Function of Switching Frequency: Dual Supply REV. A Test Circuits– ADG436 IDS V1 IS(OFF) ID(ON) NC A S D VD A S VS D S VD RON = V1/IDS D VD NC = NO CONNECT Test Circuit 2. Off Leakage Test Circuit 1. On Resistance 0.1mF VDD 3V SB –10V VOUT D VS VIN 50% +10V RL 300V IN 50% 0V SA +10V Test Circuit 3. On Leakage VDD tOFF 0V VS CL 35pF 50% tON –10V VSS GND 0.1mF VSS Test Circuit 4. Switching Times VDD 0.1mF VDD 3V SB VS VIN VOUT D 0V SA VS RL 300V IN 50% VOUT CL 35pF 50% tOPEN VSS GND 0.1mF VSS Test Circuit 5. Break-Before-Make Delay, tOPEN VDD VDD 3V VIN VOUT RD D VD 0V SA 0V CL 10nF IN GND VOUT DVOUT QINJ = CL 3 DVOUT VSS VSS Test Circuit 6. Charge Injection 0.1mF 0.1mF VDD VDD VDD 75V VDD S D VOUT VS S D RL 75V VS VIN S 0.1mF GND CHANNEL-TO-CHANNEL CROSSTALK 20 3 Log |VS/VOUT| VSS VOUT VSS 0.1mF RL 75V VSS Test Circuit 8. Channel-to-Channel Crosstalk Test Circuit 7. Off Isolation REV. A D NC VSS GND VIN2 VIN1 –7– APPLICATIONS INFORMATION Power-Supply Sequencing ADG436 Supply Voltages When using CMOS devices, care must be taken to ensure correct power-supply sequencing. Incorrect power-supply sequencing can result in the device being subjected to stresses beyond those maximum ratings listed in the data sheet. Always sequence VDD on first followed by VSS and the logic signals. An external signal can then be safely presented to the source or drain of the switch. The ADG436 can operate from a dual or single supply. VSS should be connected to GND when operating with a single supply. When using a dual supply, the ADG436 can also operate with unbalanced supplies, for example VDD = 20 V and VSS = –5 V. The only restrictions are that VDD to GND must not exceed 30 V, VSS to GND must not drop below –30 V and VDD to VSS must not exceed +44 V. It is important to remember that the ADG436 supply voltage directly affects the input signal range, the switch ON resistance and the switching times of the part. The effects of the power supplies on these characteristics can be clearly seen from the characteristic curves in this data sheet. C2108a–0–11/98 ADG436 OUTLINE DIMENSIONS Dimensions are shown in inches and (mm). 16-Lead Narrow Body SOIC (R-16A) 16-Lead Plastic DIP (N-16) 0.3937 (10.00) 0.3859 (9.80) 0.840 (21.33) 0.745 (18.93) 9 1 8 0.060 (1.52) 0.015 (0.38) PIN 1 0.210 (5.33) MAX 0.130 (3.30) MIN 0.160 (4.06) 0.115 (2.93) 0.022 (0.558) 0.014 (0.356) 0.280 (7.11) 0.240 (6.10) 0.100 (2.54) BSC 0.070 (1.77) SEATING 0.045 (1.15) PLANE 0.1574 (4.00) 0.1497 (5.80) 0.325 (8.25) 0.300 (7.62) 0.195 (4.95) 0.115 (2.93) 16 9 1 8 PIN 1 0.0098 (0.25) 0.0040 (0.10) 0.015 (0.381) 0.008 (0.204) SEATING PLANE 0.0500 (1.27) BSC 0.2550 (6.20) 0.2284 (5.80) 0.0688 (1.75) 0.0532 (1.35) 0.0192 (0.49) 0.0138 (0.35) 0.0099 (0.25) 0.0075 (0.19) 0.0196 (0.50) x 45° 0.0099 (0.25) 8° 0° 0.0500 (1.27) 0.0160 (0.41) PRINTED IN U.S.A. 16 –8– REV. A