INTEGRATED CIRCUITS PTN2111 1:10 LVDS clock distribution device Product Data 2001 Jun 19 Philips Semiconductors Product Data 1:10 LVDS clock distribution device PTN2111 25 GND 26 Q2 27 Q2 28 Q1 29 Q1 CK 1 24 Q3 21 Q4 5 20 Q5 CLK1 6 19 Q5 CLK1 7 18 Q6 EN 8 17 Q6 V CC 16 4 VBB Q7 15 CLK0 Q7 14 22 Q4 Q8 13 23 Q3 3 Q8 12 2 Q9 11 SI CLK0 GND 9 • Programmable drivers power off control • Available in LQFP32 package 30 Q0 32 V CC state) 31 Q0 PIN CONFIGURATION • 100 ps part-to-part skew • 35 ps output-to-output skew • Differential design • Meets LVDS specification for driver outputs and receiver inputs • Reference voltage available output VBB • Low voltage VCC range of +2.375 V to 2.625 V • High signalling rate capability (above 622 MHz) • Supports open, short, and terminated input fail-safe (HIGH output Q9 10 FEATURES DESCRIPTION ST00013 The PTN2111 is a low skew programmable 1:10 LVDS clock distribution device. The selected input signal is fanned out to 10 identical differential outputs. PIN DESCRIPTION The PTN2111 features an 11-bit Shift Register with a serial-in and a Control Register. The purpose of the Control Register is to enable or power off each output clock channel and to select the clock input. The PTN2111 is specifically designed, modeled and produced with low skew as the key goal. Optimal design and layout serve to minimize gate-to-gate skew within a device. The final result is a dependable guaranteed low skew device. The PTN2111 can be used for high performance clock distribution in +2.5 V systems with LVDS levels. Designers can take advantage of the device’s performance to distribute low skew clocks across the backplane or the board. TYPE NUMBER PTN2111BD 2001 Jun 19 NAME LQFP32 PIN NUMBER SYMBOL 1 CK Control register clock NAME AND FUNCTION 2 SI Control register serial-in/CLK_SEL 3 CLK0 Differential input 4 CLK0 Differential input 5 VBB 6 CLK1 Output reference voltage Differential input 7 CLK1 Differential input 8 EN 9, 25 GND Device enable/program Ground 16, 32 VCC Supply voltage 31, 29, 27, 24, 22, 20, 18, 15, 13, 11 Q[0:9] Differential outputs 30, 28, 26, 23, 21, 19, 17, 14, 12, 10 Q[0:9] Differential outputs DESCRIPTION Plastic low profile quad flat package; 32 leads; body 7 x 7 x 1.4 mm 2 VERSION SOT358-1 853-2263 26561 Philips Semiconductors Product Data 1:10 LVDS clock distribution device PTN2111 LOGIC DIAGRAM Shift Register 11-Bit SI CK EN Control Register 11-Bit Counter 12 10 0 1 9 8 7 6 5 4 3 2 1 0 SEL CLK0 CLK1 0 1 Q9 Q8 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 ST00010 2001 Jun 19 3 Philips Semiconductors Product Data 1:10 LVDS clock distribution device PTN2111 ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. SYMBOL PARAMETER LIMITS UNIT V VCC Supply voltage –0.3 to 2.8 IOSD Driver short circuit current continuous ESD Electrostatic discharge (Human Body Model 1.5 kΩ, 100 pF) >2 kV Junction temperature 150 °C Tj RECOMMENDED OPERATING CONDITIONS SYMBOL MIN MAX UNIT VCC Supply voltage 2.375 2.625 V VIR Receiver input voltage GND VCC Operating ambient temperature range in free air –40 +85 °C Tamb PARAMETER DC ELECTRICAL CHARACTERISTICS Tamb = –40 °C to +85 °C unless otherwise specified; VCC = 2.5 V ±5% (Notes 1, 2) CONDITIONS MIN TYP2 MAX UNIT Output differential voltage RL = 100 Ω 250 350 450 mV VOD magnitude change RL = 100 Ω 50 mV PARAMETER SYMBOL Driver VOD ∆VOD Offset voltage RL = 100 Ω ∆VOS VOS magnitude change RL = 100 Ω IOSD OS Output short circuit current VOS 1.125 1.25 1.375 V 50 mV VO = 0 V 15 40 mA VOD = 0 V 7 15 mA 100 mV Receiver VIDH Input threshold HIGH VIDL Input threshold LOW IIN Input current –100 mV VIN = 0 V 50 100 µA VIN = VCC 50 100 µA 1.25 1.35 V All drivers enabled and loaded; input frequency = 800 MHz 190 230 mA VIN = 0 V to VCC 5 pF 5 pF Device VBB Output reference voltage ICCD Power supply current CIN Input capacitance COUT 1.15 Output capacitance VIH Logic input HIGH threshold VIL Logic input LOW threshold II VCC = 2.5 V; IOUT ≤ 100 µA Logic input current VCC = 2.5 V 2 V VCC = 2.5 V 0.8 V VCC = 2.5 V; VIN = VCC or GND ±10 µA NOTES: 1. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless otherwise specified. 2. All typical values are given for VCC = +2.5 V and Tamb = +25 °C, unless otherwise specified. 3. CL includes probe and fixture capacitance. 4. Generator waveforms for all tests unless otherwise specified: f = 1 MHz, ZO = 50 Ω, 50% duty cycle. 5. The PTN2111 is a current mode device, and only functions to datasheet specifications when a resistive load is applied to the drives outputs. 2001 Jun 19 4 Philips Semiconductors Product Data 1:10 LVDS clock distribution device PTN2111 AC ELECTRICAL CHARACTERISTICS (LVDS) Tamb = –40 °C to +85 °C unless otherwise specified; VCC = 2.5 V ±5% (Note 1) TYP MAX UNIT tTLH Transition time LOW to HIGH PARAMETER RL = 100 Ω; CL = 5 pF 460 560 ps tTHL Transition time HIGH to LOW RL = 100 Ω; CL = 5 pF 460 560 ps tPLH tPHL Propagation delay to output 2 ns fMAX Maximum input frequency SYMBOL tskew CONDITIONS MIN 650 800 MHz Within-device skew 35 ps Part-to-part skew 100 ps Pulse skew 50 ps NOTE: 1. Generator waveforms for all tests unless otherwise specified: f = 1 MHz, ZO = 50 Ω, 50% duty cycle. 2001 Jun 19 5 Philips Semiconductors Product Data 1:10 LVDS clock distribution device PTN2111 CONTROL REGISTER SPECIFICATION Table 1. Truth Table of State Machine Inputs The PTN2111 is provided with an 11-bit shift register with a serial-in and a Control Register. The purpose is to enable or power-off each output clock channel and to select the clock input. The PTN2111 provides two working modes: Programmed mode, and Standard mode. EN SI CK OUTPUT L L X All outputs enabled, Clock0 selected, Control Register disabled. L H X All outputs enabled, Clock1 selected, Control Register disabled. H L First stage stores “L”, other stages store the data of previous stage. H H First stage stores “H”, other stages store the data of previous stage. L X Reset of the state machine, Shift register, and Control Register. Programmed Mode (EN = 1) The shift register has a serial input to load the working configuration. Once the configuration is loaded with 11 clock pulses, another clock pulse loads the configuration into the Control Register. To restart the configuration of the shift register, a reset of the state machine must be done with a clock pulse on CK, and the EN set to LOW. The Control Register can be configured only one time after each reset. D0 is the first bit shifted in, D10 is the last bit shifted in. Bit D0 controls Q9, D9 controls Q0, and D10 controls CLKIN. Standard Mode (EN = 0) In Standard Mode, the PTN2111 is not programmable. All clock buffer outputs are enabled. The LVDS clock input is selected from Clock0 or Clock1 with the SI pin, as shown in the Truth Table. Table 2. Configuration of the Control Register Control Register bit D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 Function Q9 Q8 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 CLK_SEL Table 3. Truth Table of the Control Register D10 Dn[0:9] Qn[0:9] L H Clock0 H H Clock1 X L Qn output disabled X = Don’t Care AC ELECTRICAL CHARACTERISTICS (Control Register) SYMBOL fMAX PARAMETER CONDITIONS Maximum frequency of shift register MIN TYP MAX 50 UNIT MHz ts Clock to SI setup time 4.0 ns th Clock to SI hold time 1.0 ns Enable to clock removal time 4.0 ns trem tw 2001 Jun 19 Minimum clock pulse width 5 6 ns Philips Semiconductors Product Data 1:10 LVDS clock distribution device PTN2111 LQFP32: plastic low profile quad flat package; 32 leads; body 7 x 7 x 1.4 mm 2001 Jun 19 7 SOT358-1 Philips Semiconductors Product Data 1:10 LVDS clock distribution device PTN2111 Data sheet status Data sheet status [1] Product status [2] Definitions Objective data Development This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A. [1] Please consult the most recently issued datasheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Copyright Philips Electronics North America Corporation 2001 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 Date of release: 06-01 Document order number: 2001 Jun 19 8 9397 750 08325