ATMEL MMDJ-65608EV-30-E

Features
• Operating Voltage: 5V
• Access Time: 30, 45 ns
• Very Low Power Consumption
•
•
•
•
•
•
•
•
– Active: 600 mW (Max)
– Standby: 1 µW (Typ)
Wide Temperature Range: -55°C to +125°C
400 Mils Width Packages: FP32 and SB32
TTL Compatible Inputs and Outputs
Asynchronous
No Single Event Latch-up below a LET Threshold of 80 MeV/mg/cm2
Tested up to a Total Dose of 30 krads (Si) according to MIL STD 883 Method 1019
QML Q and V with SMD 5962-89598
ESCC with Specification 9301/047
Description
The M65608E is a very low power CMOS static RAM organized as 131072 x 8 bits.
Utilizing an array of six transistors (6T) memory cells, the M65608E combines an
extremely low standby supply current (Typical value = 0.2 µA) with a fast access time
at 30 ns over the full military temperature range. The high stability of the 6T cell provides excellent protection against soft errors due to noise.
The M65608E is processed according to the methods of the latest revision of the MIL
PRF 38535 or ESCC 9000.
Rad. Tolerant
128K x 8
5-volts
Very Low Power
CMOS SRAM
M65608E
Rev. 4151M–AERO–07/07
1
M65608E
Block Diagram
Pin Configuration
32-lead DIL side-brazed
400 MILS
32-lead Flatpack
400 MILS
2
4151M–AERO–07/07
Pin Description
Table 1. Pin Names
Names
Description
A0 - A16
Address inputs
I/O0 - I/O7
Data Input/Output
CS1
Chip select 1
CS2
Chip select 2
WE
Write Enable
OE
Output Enable
VCC
Power
GND
Ground
Table 2. Truth Table
Note:
3
CS1
CS2
W
OE
Inputs/
Outputs
H
X
X
X
Z
Deselect/
Power-down
X
L
X
X
Z
Deselect/
power-down
L
H
H
L
Data Out
Read
L
H
L
X
Data In
Write
L
H
H
H
Z
Mode
Output
Disable
L = low, H = high, X = H or L, Z = high impedance.
M65608E
4151M–AERO–07/07
M65608E
Electrical Characteristics
Absolute Maximum Ratings
Supply voltage to GND potential:..........................-0.5V + 7.0V
*NOTE:
Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the
device.This is a stress rating only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of
this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may
affect reliability.
DC input voltage: ..............................GND - 0.5V to VCC + 0.5
DC output voltage high Z state: ........GND - 0.5V to VCC + 0.5
Storage temperature: ..................................... -65°C to +150°C
Output current into outputs (low): .................................. 20 mA
Electro statics discharge voltage: ............................... > 2001V
(MIL STD 883D method 3015.3)
Military Operating Range
Operating Voltage
Operating Temperature
5V + 10%
-55°C to + 125°C
Recommended DC Operating
Conditions
Parameter
Description
Minimum
Typical
Maximum
Unit
VCC
Supply voltage
4.5
5.0
5.5
V
GND
Ground
0.0
0.0
0.0
V
VIL
Input low voltage
GND - 0.5
0.0
0.8
V
VIH
Input high voltage
2.2
–
VCC + 0.5
V
Minimum
Typical
Maximum
Unit
Capacitance
Parameter
Description
Cin(1)
Input low voltage
–
–
8
pF
Cout(1)
Output high
voltage
–
–
8
pF
Note:
1. Guaranteed but not tested.
4
4151M–AERO–07/07
DC Parameters
DC Test Conditions
Table 3. DC Test Conditions
TA = -55°C to + 125°C; Vss = 0V; VCC = 4.5V to 5.5V
Symbol
Description
Minimum
Typical
Maximum
Unit
IIX (1)
Input leakage
current
-1
–
1
µA
IOZ(1)
Output leakage
current
-1
–
1
µA
VOL (2)
Output low voltage
–
–
0.4
V
VOH (3)
Output high
voltage
2.4
–
–
V
1.
2.
3.
GND < Vin < VCC, GND < Vout < VCC Output Disabled.
VCC min. IOL = 8 mA
VCC min. IOH = -4 mA.
Consumption
Symbol
Description
65608E-30
65608E-45
Unit
Value
ICCSB (1)
Standby supply
current
2
2
mA
max
ICCSB1 (2)
Standby supply
current
300
300
µA
max
ICCOP (3)
Dynamic operating
current
110
100
mA
max
1.
2.
3.
5
CS1 > VIH or CS2 < VIL and CS1 < VIL.
CS1 > VCC - 0.3V or, CS2 < GND + 0.3V and CS1 < 0.2V.
F = 1/TAVAV, Iout = 0 mA, W = OE = VIH, Vin = GND or VCC, VCC max.
M65608E
4151M–AERO–07/07
M65608E
AC Parameters
AC Test Conditions
Input Pulse Levels: ....................................GND to 3.0V
Input Rise/Fall Times: ...............................5 ns
Input Timing Reference Levels: ................1.5V
Output loading IOL/IOH (see Figure 1 and Figure 2)+30 pF
AC Test Loads Waveforms
Figure 1
Data Retention Mode
Figure 2
Figure 3
Atmel CMOS RAM’s are designed with battery backup in mind. Data retention voltage
and supply current are guaranteed over temperature. The following rules ensure data
retention:
1. During data retention chip select CS1 must be held high within VCC to VCC 0.2V or, chip select CS2 must be held down within GND to GND +0.2V.
2. Output Enable (OE) should be held high to keep the RAM outputs high impedance, minimizing power dissipation.
3. During power up and power-down transitions CS1 and OE must be kept between
VCC + 0.3V and 70% of VCC, or with CS2 between GND and GND -0.3V.
4. The RAM can begin operation > TR ns after VCC reaches the minimum operation voltages (4.5V).
Timing
6
4151M–AERO–07/07
Data Retention Characteristics
Parameter
Description
Minimum
Typical
TA = 25 °C
Maximum
Unit
VCCDR
VCC for data
retention
2.0
–
–
V
TCDR
Chip
deselect to
data
retention
time
0.0
–
–
ns
TR
Operation
recovery
time
TAVAV(1)
–
–
ns
(2)
Data
retention
current at
2.0V
–
0.1
150
µA
(2)
Data
retention
current at
3.0V
–
0.2
200
µA
ICCDR1
ICCDR2
Notes:
1. TAVAV = Read Cycle Time
2. CS1 = VCC or CS2 = CS1 = GND, Vin = GND/VCC, this parameter is only tested at
VCC = 2V.
Write Cycle
Symbol
Parameter
65608-30
65608-45
Unit
Value
TAVAW
Write cycle time
30
45
ns
min
TAVWL
Address set-up time
0
0
ns
min
TAVWH
Address valid to end of
write
22
35
ns
min
TDVWH
Data set-up time
18
20
ns
min
TE1LWH
CS1 low to write end
22
35
ns
min
TE2HWH
CS2 high to write end
22
35
ns
min
TWLQZ
Write low to high Z(1)
8
15
ns
max
TWLWH
Write pulse width
22
35
ns
min
TWHAX
Address hold from to
end of write
0
0
ns
min
TWHDX
Data hold time
0
0
ns
min
TWHQX
Write high to low Z(1)
0
0
ns
min
Note:
7
1. Parameters guaranteed, not tested, with output loading 5 pF.
M65608E
4151M–AERO–07/07
M65608E
Read Cycle
Symbol
Parameter
65608-30
65608-45
Unit
Value
TAVAV
Read cycle time
30
45
ns
min
TAVQV
Address access time
30
45
ns
max
TAVQX
Address valid to low Z(1)
5
5
ns
min
TE1LQV
Chip-select1 access time
30
45
ns
max
TE1LQX
CS1 low to low Z(1)
3
3
ns
min
TE1HQZ
CS1 high to high Z(1)
15
20
ns
max
TE2HQV
Chip-select2 access time
30
45
ns
max
TE2HQX
CS2 high to low Z(1)
3
3
ns
min
TE2LQZ
CS2 low to high Z(1)
15
20
ns
max
TGLQV
Output Enable access time
12
15
ns
max
TGLQX
OE low to low Z(1)
0
0
ns
min
TGHQZ
OE high to high Z(1)
8
15
ns
max
Note:
1. Parameters Guaranteed, not tested, with output loading 5 pF.
8
4151M–AERO–07/07
Write Cycle 1 WE Controlled,
OE High During Write
Write Cycle 2 WE Controlled,
OE Low
9
M65608E
4151M–AERO–07/07
M65608E
Write Cycle 3 CS1 or CS2,
Controlled
Note:
The internal write time of the memory is defined by the overlap of CS1 Low and CS2 HIGH and W LOW. Both signals must be
actived to initiate a write and either signal can terminate a write by going in actived. The data input setup and hold timing should
be referenced to the actived edge of the signal that terminates the write. Data out is high impedance if OE = VIH.
10
4151M–AERO–07/07
Read Cycle 1
Read Cycle 2
Read Cycle 3
11
M65608E
4151M–AERO–07/07
M65608E
Ordering Information
Part Number
Temperature Range
Speed
Package
Flow
25°C
30 ns
SB32.4
Engineering Samples
25°C
30 ns
FP32.4
Engineering Samples
5962-8959847QZC
-55° to +125°C
30 ns
SB32.4
QML Q
5962-8959847QTC
-55° to +125°C
30 ns
FP32.4
QML Q
5962-8959818QZC
-55° to +125°C
45 ns
SB32.4
QML Q
5962-8959818QTC
-55° to +125°C
45 ns
FP32.4
QML Q
5962-8959847VZC
-55° to +125°C
30 ns
SB32.4
QML V
5962-8959847VTC
-55° to +125°C
30 ns
FP32.4
QML V
5962-8959818VZC
-55° to +125°C
45 ns
SB32.4
QML V
5962-8959818VTC
-55° to +125°C
45 ns
FP32.4
QML V
930104703
-55° to +125°C
30 ns
SB32.4
ESCC
930104704
-55° to +125°C
30 ns
FP32.4
ESCC
930104701
-55° to +125°C
45 ns
SB32.4
ESCC
930104702
-55° to +125°C1
45 ns
FP32.4
ESCC
MM065608EV-30-E
25°C
30 ns
Die
Engineering Samples
5962-8959847V6A
-55° to +125°C
30 ns
Die
QML V
MMC9-65608EV-30-E
(1)
MMDJ-65608EV-30-E
Note:
1. Contact Atmel for availability.
12
4151M–AERO–07/07
Package Drawings
32-lead Flat Pack 400 Mils
13
M65608E
4151M–AERO–07/07
M65608E
Package Drawings
32-lead Side Braze 400 Mils
14
4151M–AERO–07/07
M65608E
Document Revision History
Changes from Rev L.
04/07 to Rev. M 07/07
1. Change in “Consumption” on page 5. ICCOP.
15
4151M–AERO–07/07
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4151L–AERO–04/07
/xM