INTEGRATED CIRCUITS GTL2000 22-bit GTL processor voltage clamp Product specification Supersedes data of 1999 Apr 05 2000 Jan 25 Philips Semiconductors Product specification 22-bit GTL processor voltage clamp GTL2000 FEATURES PIN CONFIGURATION • Direct interface with TTL level • 6.5Ω ON-state connection between port Sn and Dn GND 1 48 GREF SREF 2 47 DREF DESCRIPTION S1 3 46 D1 The GTL2000 provides twenty-two bits of high-speed voltage clamps. The low ON-state resistance of the clamp allows connections to be made with minimal propagation delay. S2 4 45 D2 S3 5 44 D3 S4 6 43 D4 S5 7 42 D5 S6 8 41 D6 S7 9 40 D7 S8 10 39 D8 S9 11 38 D9 S10 12 37 D10 The device is organized as one 22-bit voltage clamp. When S or D is low the clamp is in the ON–state and a low resistance connection exists between the S and D ports. When S port and D port are high, the clamp is in the OFF-state and a very high impedance exists between the S and D ports. When the D port is high, the voltage on the S port is clamped to the applied reference voltage on the GREF port. FUNCTION TABLE Driven Input Output of Driven Input off X X VTT on H VTT1 H VTT nearly off VTT H2 L L VTT on L L3 L L 0 – VTT off X X GREF DREF SREF4 Switch H H 0V H H H H = High voltage level L = Low voltage level X = Don’t Care NOTES: 1. The output is not pulled up or pulled down. 2. The output is pulled up to VCC through an external resistor. 3. The driven output can be Sn or Dn; the output of drivn input follows the input low. 4. GREF must be at least 1.5 V higher than SREF for proper switch operation. S11 13 36 D11 S12 14 35 D12 S13 15 34 D13 S14 16 33 D14 S15 17 32 D15 S16 18 31 D16 S17 19 30 D17 S18 20 29 D18 S19 21 28 D19 S20 22 27 D20 S21 23 26 D21 S22 24 25 D22 SA00521 QUICK REFERENCE DATA SYMBOL CONDITIONS Tamb = 25°C; GND = 0V PARAMETER TYPICAL UNIT tPLH Propagation delay Sn to Dn VDD1 = 3.3 V; VDD2 = 2.5 V; VREF = 1.5 V; unloaded 1.5 ns COFF Channel capacitance (OFF-state) VS = 1.5 V 7.5 pF ORDERING INFORMATION PACKAGES 48-Pin Plastic SSOP Type II 2000 Jan 25 TEMPERATURE RANGE ORDER CODE DWG NUMBER 0°C to +85°C GTL2000 DL SOT370–1 2 853-2154 23030 Philips Semiconductors Product specification 22-bit GTL processor voltage clamp GTL2000 PIN DESCRIPTION CLAMP SCHEMATIC PIN NUMBER SYMBOL 1 GND Ground (0V) 2 SREF Source of reference transistor NAME AND FUNCTION 3 – 24 Sn Port S1 to Port S22 25 – 46 Dn Port D1 to Port D22 47 DREF Drain of reference transistor 48 GREF Gate of reference transistor DREF GREF SREF D1 D22 S1 S22 SA00522 ABSOLUTE MAXIMUM RATINGS1, 2, 3 SYMBOL RATING UNIT VS_REF DC source reference voltage PARAMETER CONDITIONS –0.5 to +7.0 V VD_REF DC drain reference voltage –0.5 to +7.0 V VG_REF DC gate reference voltage –0.5 to +7.0 V VSn DC voltage Port Sn –0.5 to +7.0 V VDn DC voltage Port Dn –0.5 to +7.0 V DC reference diode current VI < 0 –50 mA ISK DC diode current Port Sn VI < 0 –50 mA IDK DC diode current Port Dn VI < 0 –50 mA Channel in ON-state ±35 mA –65 to +150 °C IREFK IMAX DC clamp current per channel Tstg Storage temperature range NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C. 3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed. RECOMMENDED OPERATING CONDITIONS SYMBOL PARAMETER CONDITIONS LIMITS Min Max UNIT VS_REF DC source reference voltage 1.0 4.4 V VD_REF DC drain reference voltage VS_REF + 0.6 5 V VG_REF DC gate reference voltage VS_REF + 0.6 5 V VS_REF 5 V VSn DC voltage Port Sn (OFF-state) VSn DC voltage Port Sn (ON-state) 0 0.2 V VDn DC voltage Port Dn (OFF-state) VS_REF 5 V VDn DC voltage Port Dn (ON-state) 0 0.4 V IS Switch input leakage current (OFF-state) for Sn and Dn I/O VS , VD = 5 V 15 µA II GREF input leakage current VG = 5 V 2.5 µA Operating ambient temperature range In free air +85 °C Tamb 2000 Jan 25 0 3 Philips Semiconductors Product specification 22-bit GTL processor voltage clamp GTL2000 DC CHARACTERISTICS for VDD1 = 3.0 to 3.6 V; VDD2 = 2.36 to 2.64 V; VREF = 1.365 to 1.635 V range Over recommended operating conditions. Voltage are referenced to GND (ground = 0 V). Refer to the Test Circuit diagram. LIMITS SYMBOL PARAMETER TEST CONDITIONS Tamb = 0°C to +85°C MIN VOL LOW level output voltage VS = 0.175 V; ICLAMP = 15.2 mA TYP1 MAX 260 350 UNIT mV NOTE: 1. All typical values are measured at VDD1 = 3.3 V, VDD2 = 2.5 V, VREF = 1.5 V and Tamb = 25°C AC CHARACTERISTICS for VDD1 = 3.0 to 3.6 V; VDD2 = 2.36 to 2.64 V; VREF = 1.365 to 1.635 V range GND = 0V; tr = tf ≤ 3.0 ns. Refer to the Test Circuit diagram. LIMITS SYMBOL PARAMETER Tamb = 0°C to +85°C WAVEFORM Propagation delay Sn to Dn; Dn to Sn tPLH2 MIN TYP1 MAX 0.5 1.5 5.5 UNIT ns NOTES: 1. All typical values are measured at VDD1 = 3.3 V, VDD2 = 2.5 V, VREF = 1.5 V and Tamb = 25°C. 2. Propagation delay guaranteed by characterization. 3. CON,MAX of 30 pF and a COFF,MAX of 15 pF is guaranteed by design. AC WAVEFORMS TEST CIRCUIT VDD1 VDD2 VDD2 VDD2 VI INPUT 150Ω 200KΩ VM 150Ω 150Ω VM GND OUTPUT HIGH-to-LOW LOW-to-HIGH VOL VDD2 OUTPUT HIGH-to-LOW LOW-to-HIGH VOL DUT tPLH tPHL VDD2 0 0 DREF VM GREF D1 D22 S1 S22 VM tPHL tPLH tPHL tPLH 1 1 VM SREF VM SA00524 VREF Waveform 1. The Input (Sn) to Output (Dn) Propagation Delays PULSE GENERATOR SA00523 Waveform 2. Load circuit 2000 Jan 25 4 Philips Semiconductors Product specification 22-bit GTL processor voltage clamp GTL2000 SSOP48: plastic shrink small outline package; 48 leads; body width 7.5 mm 2000 Jan 25 5 SOT370-1 Philips Semiconductors Product specification 22-bit GTL processor voltage clamp GTL2000 Data sheet status Data sheet status Product status Definition [1] Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Copyright Philips Electronics North America Corporation 2000 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 Date of release: 01-00 Document order number: 2000 Jan 25 6 9397–750-06818