ATMEL T5554

Features
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Low-power, Low-voltage Operation
Contactless Power Supply
Contactless Read/Write Data Transmission
Radio Frequency (RF): 100 kHz to 150 kHz
264-bit EEPROM Memory in 8 Blocks of 33 Bits
224 Bits in Seven Blocks of 32 Bits are Free for User Data
Block Write Protection
Extensive Protection Against Contactless Malprogramming of the EEPROM
On-chip Resonance Capacitor (80 or 210 pF Mask Option)
Anticollision Using Answer-On-Request (AOR)
Typical < 50 ms to Write and Verify a Block
Other Options Set by EEPROM:
– Bitrate [bit/s]: RF/8, RF/16, RF/32, RF/40, RF/50, RF/64, RF/100, RF/128
– Modulation: BIN, FSK, PSK, Manchester, Biphase
– Other: Terminator Mode, Password Mode, AOR Mode
1. Description
Standard R/W
IDIC (264 Bit)
with Integrated
Capacitance
T5554
The T5554 is a contactless R/W-IDentification IC (IDIC®) for general-purpose applications in the 125 kHz range. A single coil, connected to the chip, serves as the IC’s
power supply and bidirectional communication interface. The coil and chip together
form a transponder.
The on-chip 264-bit EEPROM (8 blocks 33 bits each) can be read and written blockwise from a base station. The blocks can be protected against overwriting. One block
is reserved for setting the operation modes of the IC. Another block can contain a
password to prevent unauthorized writing.
Reading occurs by damping the coil by an internal load. There are different bitrates
and encoding schemes possible. Writing occurs by interrupting the RF field in a special way.
2. System Block Diagram
Figure 2-1.
RFID System Using T5554 Tag
Base station
Data
Controller
Power
Coil interface
Transponder
Memory
T5554
4576D–RFID–12/06
2.1
Pad Layout
Figure 2-2.
Pad Layout of T5554
Coil 1
T5554
Coil 2
VDD VSS
Test pads
3. T5554 Building Blocks
Figure 3-1.
Block Diagram
POR
Modulator
Coil 1
Analog front end
Write
decoder
Mode register
Memory
(264 bit EEPROM)
Bitrate
generator
Controller
Coil 2
Input register
Test logic
VDD
3.1
VSS
HV generator
Test pads
Analog Front End (AFE)
The AFE includes all circuits which are directly connected to the coil. It generates the IC’s power
supply and handles the bidirectional data communication with the reader unit. It consists of the
following blocks:
• Rectifier to generate a DC supply voltage from the AC coil voltage
• Clock extractor
• Switchable load between Coil1/Coil2 for data transmission from the IC to the reader unit
(read)
• Field gap detector for data transmission from the reader unit into the IC (write)
2
T5554
4576D–RFID–12/06
T5554
3.2
Resonance Capacitor
The resonance capacitor is integrated on chip. By mask option the value can be 80 pF or 210 pF
typically.
3.3
Controller
The main controller has the following functions:
• Load mode register with configuration data from EEPROM block 0 after power-on and also
during reading
• Control memory access (read, write)
• Handle write data transmission and the write error modes
• The first two bits of the write data stream are the OP-code. There are two valid OP-codes
(standard and stop) which are decoded by the controller.
• In password mode, the 32 bits received after the OP-code are compared with the stored
password in block 7.
3.4
Bitrate Generator
The bitrate generator can deliver the following bitrates:
RF/8 – RF/16 – RF/32 – RF/40 – RF/50 – RF/64 – RF/100 – RF/128
3.5
Write Decoder
Decode the detected gaps during writing. Check if write data stream is valid.
3.6
Test Logic
Test circuitry allows rapid programming and verification of the IC during test.
3.7
HV Generator
Voltage pump which generates ∼18V for programming of the EEPROM.
3.8
Power-On Reset (POR)
The power-on reset is a delay reset which is triggered when supply voltage is applied.
3.9
Mode Register
The mode register stores the mode data from EEPROM block 0. It is continually refreshed at the
start of every block. This increases the reliability of the device (if the originally loaded mode
information is false, it will be corrected by subsequent refresh cycles).
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3.10
Modulator
The modulator consists of several data encoders in two stages, which may be freely combined
to obtain the desired modulation. The basic types of modulation are:
• PSK: phase shift: 1) every change; 2) every “1”; 3) every rising edge (carrier: fc/2, fc/4 or fc/8)
• FSK: 1) f1 = rf/8 f2 = rf/5; 2) f1 = rf/8, f2 = rf/10
• Manchester: rising edge = H; falling edge = L
• Biphase: every bit creates a change, a data “H” creates an additional mid-bit change
Note:
The following modulation type combinations will not work:
– Stage1 Manchester or Biphase and stage2 PSK, at any PSK carrier frequency
(because the first stage output frequency is higher than the second stage strobe
frequency);
– Stage1 Manchester or Biphase and stage2 PSK with bitrate = rf/8 and PSK carrier
frequency = rf/8 (for the same reason as above);
– Any stage1 option with any PSK for bitrates rf/50 or rf/100 if the PSK carrier frequency is not
an integer multiple of the bitrate (e.g., br = rf/50, PSKcf = rf/4, because 50/4 = 12.5). This is
because the PSK carrier frequency must maintain constant phase with respect to the bit clock.
Figure 3-2.
Modulator Block Diagram
Carrier frequency
PSK1
PSK2
PSK3
Manchester
From memory
Direct
Biphase
Mux
Direct
Mux
To load
FSK1, 1a
FSK2, 2a
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T5554
4576D–RFID–12/06
T5554
3.11
Memory
The memory of the T5554 is a 264-bit EEPROM, which is arranged in 8 blocks of 33 bits each.
All 33 bits of a block, including the lock bit, are programmed simultaneously. The programming
voltage is generated on-chip.
Block 0 contains the mode data, which are not normally transmitted (see Figure 3-3).
Blocks 1 to 6 are freely programmable. Block 7 may be used as a password. If password protection is not required, it may be used for user data.
Bit 0 of every block is the lock bit for that block. Once locked, the block (including the lockbit
itself) cannot be field-reprogrammed.
Data from the memory is transmitted serially, starting with block 1, bit 1, up to block “MAXBLK”,
bit 32. “MAXBLK” is a mode parameter set by the user to a value between 0 and 7 (if maxblk = 0,
only block 0 will be transmitted).
Figure 3-3.
Memory Map
0 1
32
L
User data or password Block 7
Block 6
User data
L
User data
Block 5
L
User data
Block 4
L
User data
Block 3
L
User data
Block 2
L
User data
Block 1
L
Configuration data
Block 0
L
32 bits
Not transmitted
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Figure 3-4.
Memory Map of Block 0
0
11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
1
reserved
BR
[2] [1] [0]
lock bit (never transmitted)
*
"0"
MS1
MS2
PSKCF
[1] [0] [2] [1] [0] [1] [0]
MAXBLK
*
res'd
[2] [1] [0]
*useSTOP
"0"
useBT
AOR
useST
usePWD
Key:
-----------------------------------AOR
Anwer-On-Request
BT
use Block Terminator
ST
use Sequence Terminator
PWD
use Password
STOP
obey stop header (active low!)
BR
Bit Rate
MS1
Modulator Stage 1
MS2
Modulator Stage 2
PSKCF
PSK Clock Frequency
MAXBLK see Maxblock feature
reserved
do not use
* Bit 15 and 24 must always be at "0",
otherwise malfunction will appear.
send blocks:
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
0
0
1
1
1
1
6
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0
0
0
0
0
1
1
1
1
1
1
0
0
1
1
0
1
0
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
1 to 2
1 to 3
1 to 4
1 to 5
1 to 6
1 to 7
RF/2
RF/4
RF/8
reserved
0 direct
1 psk1 (phase change when input changes)
0 psk2 (phase change on bitclk if input high)
1 psk3 (phase change on rising edge of input)
----------------------------------o/p freq. DATA=1 DATA=0
0 fsk1 rf/8 rf/5
1 fsk2 rf/8 rf/10
0 fsk1a rf/5 rf/8
1 fsk2a rf/10 rf/8
direct
Manchester
Biphase
reserved
RF/8 bitrate_8cpb
RF/16 bitrate_16cpb
RF/32 bitrate_32cpb
RF/40 bitrate_40cpb
RF/50 bitrate_50cpb
RF/64 bitrate_64cpb
RF/100 bitrate_100cpb
RF/128 bitrate_128cpb
T5554
4576D–RFID–12/06
T5554
4. Operating the T5554
4.1
General
The basic functions of the T5554 are: supply IC from the coil, read data from the EEPROM to the
reader, write data into the IC and program these data into the EEPROM. Several errors can
be detected to protect the memory from being written with the wrong data (see Figure 5-4 on
page 16).
4.2
Supply
The T5554 is supplied via a tuned inductance (L ∼ 8 mH) which is connected to the Coil 1 and
Coil 2 pads. The incoming RF (actually a magnetic field) induces a current into the coil. The
on-chip rectifier generates the dc supply voltage (VDD, VSS pads). Overvoltage protection prevents the IC from damage due to high-field strengths. Depending on the coil, the open-circuit
voltage across the LC circuit can reach more than 100V. The first occurrence of RF triggers a
power-on reset pulse, ensuring a defined start-up state.
4.3
Read
Reading is the default mode after power-on reset. It is done by switching a load between the coil
pads on and off. This changes the current through the IC coil, which can be detected from the
reader unit.
4.4
Start-up
The many different modes of the T5554 are activated after the first readout of block 0. The modulation is off while block 0 is read. After this set-up time of 256 field clock periods, modulation
with the selected mode starts.
Any field gap during this initialization will restart the complete sequence.
4.5
Read Data Stream
The first block transmitted is block 1. When the last block is reached, reading restarts with block
1. Block 0, which contains mode data, is normally never transmitted. However, the mode register
is continuously refreshed with the contents of EEPROM block 0.
Figure 4-1.
Application Circuit
Reader coil
IAC
Tuned LC
Energy
125 kHz
L~8 mH
Cres
210 pF
T5554
Data
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Figure 4-2.
Voltage at Coil1/Coil2 After Power-on
Damping on
Damping off
VCoil 1 - Coil 2
≤ 2 ms
Power-on Loading block 0 (256 FC ~ 2 ms)
Read data with configured
reset
modulation and bitrate
* FC -> Field clocks
Figure 4-3.
Terminators
Block terminator
Bit period
Data bit '1'
Last bit
Block
First bit
Sequence terminator
Data bit '1'
Data bit '1'
Last bit
Sequence
V
Waveforms for different
modulations
First bit
Coil 1 - Coil 2
First bit '0' or '1'
Manchester
FSK
PSK
Terminator not suitable for Biphase modulation
Figure 4-4.
Read Data Streams and Terminators
ST
BT
off
off
0
Block 1
Block 2
Block 7
Block 1
Block 2
Loading block 0
Sequence terminator
on
off
0
Block 1
Block 2
Block 7
Block 1
Block 2
Loading block 0
Block terminator
off
on
0
Block 1
Block 2
Block 7
Block 1
Block 2
Loading block 0
on
on
0
Block 1
Block 2
Block 7
Block 1
Block 2
Loading block 0
8
T5554
4576D–RFID–12/06
T5554
Figure 4-5.
MAXBLK Examples
MAXBLK = 5
0
Block 1
Block 4
Block 5
Block 1
Block 2
Block 2
Block 1
Block 2
Block 1
Block 0
Block 0
Block 0
Block 0
Loading block 0
0
MAXBLK = 2
Block 1
Loading block 0
0
MAXBLK = 0
Block 0
Loading block 0
4.6
Maxblock Feature
If it is not necessary to read all user data blocks, the MAXBLK field in block 0 can be used to limit
the number of blocks read. For example, if MAXBLK = 5, the T5554 repeatedly reads and transmits only blocks 1 to 5 (see Figure 4-5). If MAXBLK is set to “0”, block 0 (which is normally not
transmitted) can be read.
4.7
Terminators
The terminators are (optionally selectable) special damping patterns, which may be used to synchronize the reader. There are two types available; a block terminator which precedes every
block, and a sequence terminator which always follows the last block.
The sequence terminator consists of two consecutive block terminators. The terminators may be
individually enabled with the mode bits ST (Sequence Terminator enable) or BT (Block Terminator enable).
Note:
4.8
It is not possible to include a sequence terminator in a transmission where MAXBLK = 0.
Direct Access
The direct access command allows the reading of an individual block by sending the OP-code
(“10”), the lock-bit and the 3-bit address.
Note:
4.9
PWD has to be 0.
Modulation and Bitrate
There are two modulator stages in the T5554 (see Figure 3-2 on page 4) whose mode can be
selected using the appropriate bits in block 0 (MS1[1:0] and MS[2:0]). Also the bitrate can be
selected using BR[2:0] in block 0. These options are described in detail in Figure 5-5 on page 17
through Figure 5-10 on page 22.
4.10
Answer-On-Request Mode (AOR)
When the AOR bit is set, the IDIC does not start modulation after loading configuration block 0.
It waits for a valid AOR data stream (wake-up command) from the reader before modulation is
enabled.
The wake-up command consists of the OP-code (“10”) following by a valid password. The IC will
remain active until the RF field is turned off or a stop OP-code is received.
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Table 4-1.
PWD
T5554 - Modes of Operation
AOR
STOP
Behavior of Tag after Reset/POR
Anticollision mode:
Modulation starts after wake-up
with a matching PWD
1
1
0
• Programming needs valid PWD
• AOR allows programing with read protection (no read after
write)
STOP Function
STOP OP-code (“11”) defeats
modulation until RF field is
turned off
Password mode:
1
0
0
• Modulation starts after reset
• Programming needs valid PWD
• Modulation starts after wake-up command
0
1
0
• Programming with modulation defeat without previous
wake-up
possible
• AOR allows programing with read protection (no read after
write)
Plain/Normal mode:
• Modulation starts after reset
0
0
0
• Direct access command
• Programming without password
x
0
Figure 4-6.
1
See corresponding modes above
STOP OP-code ignored,
modulation continues until RF
field is turned off
Answer-on-request (AOR) Mode
Modulation on
VCoil 1 - Coil 2
Loading block 0
POR
10
No modulation OP-code ('10') followed by valid password
(STOP = 0, AOR = 1)
T5554
4576D–RFID–12/06
T5554
Figure 4-7.
Anticollision Procedure Using AOR Mode
BASE station
TAG
init tags with
AOR = '1', PWD = '1', Stop = '0'
Field OFF -> ON
wait for tW > 2.5 ms
POWER ON RESET
read configuration
wait for OPCODE + PWD
(== wake up command)
"select single tag"
send OPCODE + PWD
(== wake up command)
write damping
NO
PWD correct ?
YES
decode data
send stop command
send block 1...MAXBLK
until STOP command
enter AOR mode
internal reset sequence
NO
all tags read ?
YES
EXIT
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Figure 4-8.
Signals During Writing
>64 FCs = stop write
RF_Field
1
Start
Gap
0
1
1
0
Write mode
Modulation during read mode
Damping
Load Off
Load On
Write data
Data Clock
Field clock
Read mode
Figure 4-9.
Programming Read mode
Writing
Write Data Decoding Schemes
1
16
32
fail
Write data decoder
48
0
fail
Data bits
32 2
64
1
writing done
Figure 4-10. T5554 – OP-code Formats
OP
Standard write
10 L
1
Addr
0
OP
10 1
Password
32 L
OP
AOR (wake-up command) 10 1
OP
Password
32
Password mode
Direct access
10 L 2
Addr
1
Data bits
32 2
Addr
0
0
OP
Stop command
12
11
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4576D–RFID–12/06
T5554
4.11
Write
Writing data into the IC occurs via the Atmel write method. It is based on interrupting the RF field
with short gaps. The time between two gaps encodes the “0/1” information to be transmitted.
4.12
Start Gap
The first gap is the start gap which triggers write mode. In write mode, the damping is permanently enabled which eases gap detection. The start gap may need to be longer than
subsequent gaps in order to be detected reliably.
A start gap will be detected at any time after block 0 has been read (field-on plus approximately
2 ms).
Figure 4-11. Start of Writing
Read mode
Write mode
RF
Start of writing
(start gap)
4.13
Decoder
The duration of the gaps is usually 50 to 150 µs. The time between two gaps is nominally 24 field
clocks for a “0” and 56 field clocks for a “1”. When there is no gap for more than 64 field clocks
after previous gap, the IDIC exits write mode; it starts with programming if the correct number of
valid bits were received.
If there is a gap fail - i.e., one or more of the intervals did represent not a valid “0” or “1” - the IC
does not program, but enters read mode beginning with block 1, bit 1.
4.14
Writing Data into the T5554
The T5554 expects a 2-bit OP-code first. There are two valid OP-codes (“10” and “11”). If the
OP-code is invalid, the T5554 starts read mode beginning with block 1 after the last gap. The
OP-code (“10”) is followed by different information (see Figure 4-11):
• Standard writing needs the OP-code, the lock bit, the 32 data bits and the 3-bit block
address.
• Writing with usePWD set requires a valid password between OP-code and address/data bits.
• In AOR mode with usePWD, OP-code and a valid password are necessary to enable
modulation.
• The STOP OP-code is used to silence the T5554 (disable damping until power is cycled).
Note:
The data bits are read in the same order as written.
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5. STOP OP-code
The STOP OP-code (“11”) is used to disable the modulation until a power-on reset occurs. This
feature can be used to have a steady RF field where single transponders are collected one by
one. Each IC is read and than disabled, so that it does not interfere with the next IC.
Note:
The STOP OP-code should contain only the two OP-code bits to disable the IC. Any additional
data sent will not be ignored, and the IC will not stop modulation.
Figure 5-1.
OP-code Transmission
Standard OP-code
1
0
more data ...
Start gap
Stop OP-code
1
Read mode
5.1
1
> 64 clocks
Write mode
Password
When password mode is on (usePWD = 1), the first 32 bits after the OP-code are regarded as
the password. They are compared bit-by-bit with the contents of block 7, starting at bit 1. If the
comparison fails, the IC will not program the memory, but restart in read mode at block 1 once
writing has completed.
Notes:
5.2
1. If PWD is not set, but the IC receives a write datastream containing any 32 bits in place of a
password, the IC will enter programming mode.
2) In password mode, MAXBLK should be set to a value below 7 to prevent the password from
being transmitted by
3) Every transmission of 2 OP-code bits, 32 password bits, one lock bit, 32 data bits and 3
address bits (= 70 bits) needs about 35 ms. Testing all 232 possible combinations (about 4.3
billion) takes about 40,000 h, or over four years. This is a sufficient password protection for a
general-purpose IDIC.
Programming
When all necessary information has been written to the T5554, programming may proceed.
There is a 32-clock delay between the end of writing and the start of programming. During this
time, Vpp - the EEPROM programming voltage - is measured and the lock bit for the block to be
programmed is examined. Furthermore, Vpp is continually monitored throughout the programming cycle. If at any time Vpp is too low, the chip enters read mode immediately.
The programming time is 16 ms.
After programming is done, the T5554 enters read mode, starting with the block just programmed. If either block or sequence terminators are enabled, the block is preceded by a block
terminator. If the mode register (block 0) has been reprogrammed, the new mode will be activated after the just-programmed block has been transmitted using the previous mode.
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4576D–RFID–12/06
T5554
Figure 5-2.
Programming
Writing done (> 64 clocks since last gap)
Write mode
Programming ends
16 ms
Check Vpp
0.12 ms
Programming starts
(HV at EEPROMs)
HV on
HV on for testing if Vpp is ok
Modulation
No modulation
Write
Operation
Figure 5-3.
Reading starts
Vpp/Lock ok?
Program EEPROM
READ
Coil Voltage after Programming of Block 0
VCoil 1 - Coil 2
16 ms
Programming
Read programming block
(= block 0)
Read next block
with updated modes
(e.g., new bitrate)
Write data into the IC
5.3
Error Handling
Several error conditions can be detected to ensure that only valid bits are programmed into the
EEPROM. There are two error types which lead to different actions.
5.4
Errors During Writing
There are four detectable errors which could occur during writing data into the T5554:
• Wrong number of field clocks between two gaps
• The OP-code is neither the standard OP-code (’10‘) nor the stop OP-code (’11‘)
• Password mode is active but the password does not match the contents of block 7
• The number of bits received is incorrect; valid bit counts are
– Standard write:
38 bits (PWD not set)
– Password write:
70 bits (PWD set)
– AOR wake-up:
34 bits
– Stop command:
2 bits
If any of these four conditions are detected, the IC starts read mode immediately after leaving
write mode. Reading starts with block 1.
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5.5
Errors During Programming
If writing was successful, the following errors could prevent programming:
• The lock bit of the addressed block is set
• VPP is too low
In these cases, programming stops immediately. The IC reverts to read mode, starting with the
currently addressed block.
Figure 5-4.
Functional Diagram of the T5554
Power-on reset
Loading
block 0
READ
addr+1
Stop
Write mode
11
OP-code
fail
ok
10
Password
fail
addr+current
ok
Number of bits
fail
ok
Lock bit
ok
HV
fail
fail
ok
PROGRAM
fail
ok
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4576D–RFID–12/06
RF-field
Inverted modulator
signal
Manchester coded
Data stream
1 2
1
8 FC
8
9
8 FC
16 1
8
0
9
16
1
8
0
16 1
8
1
9
16
1 2
8
9
1
16 1
8
9
0
16
Figure 5-5.
Data rate =
50 Field Clocks (FC)
T5554
Example of Manchester Coding with Data Rate RF/16
17
18
RF-field
Inverted modulator
signal
Biphase coded
Data stream
1 2
8 FC
8
1
9
8 FC
Data rate =
50 Field Clocks (FC)
16
1
8 9
0
16
1
8
0
16
1
8
1
9
16
1 2
8
9
1
16
1
8 9
0
16
Figure 5-6.
Example of Biphase Coding with Data Rate RF/16
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4576D–RFID–12/06
RF-field
f0 = RF/8,
f1 = RF/5
1
5
1
8
0
1
8
0
1
5
1
1
5
1
1
8
0
Figure 5-7.
Inverted modulator
signal
Data stream
1
Data rate =
40 Field Clocks (FC)
T5554
Example of FSK Coding with Data Rate RF/40, Subcarrier f0 = RF/8, f1 = RF/5
19
20
RF-field
subcarrier RF/2
Inverted modulator
signal
Data stream
1 2
8 FC
8 9
1
8 FC
Data rate =
16 Field Clocks (FC)
16 1
8
0
16 1
8
0
16 1
8
1
16 1
8
1
16 1
8
0
Figure 5-8.
Example of PSK Coding with Data Rate RF/16
T5554
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4576D–RFID–12/06
RF-field
Inverted
modulator signal
subcarrier RF/2
Datas stream
1 2
8 9
8 FC
16 1
8
0
16 1
8
0
16 1
8
1
16 1
8
1
16 1
8
0
Figure 5-9.
8 FC
1
Data rate =
16 Field Clocks (FC)
T5554
Example of PSK2 Coding with Data Rate RF/16
21
22
RF-field
Inverted
modulator signal
sub carrier RF/2
Data stream
1 2
8 FC
8 9
1
8 FC
Data rate =
16 Field Clocks (FC)
16 1
8
0
16 1
8
0
16 1
8
1
16 1
8
1
16 1
8
0
Figure 5-10. Example of PSK3 Coding with Data Rate RF/16
T5554
4576D–RFID–12/06
T5554
Figure 5-11. Measurement Setup for IDD
I
DD
VDD
Coil 1
~
=
2V
Coil 2
VSS
V pp Coil at 1.5V
Figure 5-12. Simplified Damping Circuit
100
~2V
Coil 1
Mod
Coil 2
~2V
100
6. Application Example
Figure 6-1.
Typical Application Circuit
From
oscillator
I
AC
740 H
8 mH
Energy
125 kHz
Input capacitance
Cres = 210 pF + 5 pF static,
25 pF dynamic
Coil 1 (Pin 8)
T5554
Coil 2 (Pin 1)
Data
To read
amplifier
2.2 nF
23
4576D–RFID–12/06
7. Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Parameters
Symbol
Value
Unit
Maximum DC current into Coil 1/Coil 2
Icoil
10
mA
Maximum AC current into Coil 1/Coil 2, f = 125 kHz
Icoil p
20
mA
Power dissipation (dice)
(free-air condition, time of application: 1s)
Ptot
100
mW
Electrostatic discharge maximum to MIL-Standard
883 C method 3015
Vmax
2
kV
Operating ambient temperature range
Tamb
–40 to +85
°C
Storage temperature range (data retention reduced)
Tstg
–40 to +150
°C
Maximum assembly temperature for less than 5 min
Tsld
150
°C
Note:
Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
8. Electrical Characteristics
Tamb = 25°C; fRF = 125 kHz, reference terminal is VSS
Parameters
Test Conditions
RF frequency range
Symbol
Min.
Typ.
Max.
Unit
fRF
100
125
150
kHz
Supply current
(see Figure 5-11 on page 23)
Read and write over the full
temperature range
IDD
5
7.5
µA
Supply current
(see Figure 5-11 on page 23)
Programming over the full temperature
range
IDD
100
200
µA
Clamp voltage
10 mA current into Coil1/2
Vcl
9.5
11.5
V
Programming voltage
From on-chip HV-Generator
Vpp
16
Programming time
tP
Startup time
Data retention
(1)
Programming cycles
Supply voltage
Coil voltage
tretention
10
ncycle
100,000
V
ms
4
tstartup
(1)
ms
Years
Cycles
Read and write
VDD
1.6
V
Read-mode, T = –30°C
VDD
2.0
V
Vcoil pp
6.0
V
Read and write
Programming, RF field not damped
Resonance capacitor
Damping resistor
Notes:
20
18
10
V
Cres(A)(2)
72
80
88
pF
Cres(B)(2)
189
210
231
pF
Vcoil pp
RD
300
W
1. Since EEPROM performance may be influenced by assembly and packaging, Atmel confirms the parameters for
DOW (= die-on-wafer) and ICs assembled in standard package.
2. Typical value selected by mask option.
24
T5554
4576D–RFID–12/06
T5554
9. Ordering Information
Extended Type Number
Package
Remarks
T555401-DBN
Au-bumped 25 µm
chip on sticky tape
210 pF capacitor; default programming: all 0; EEPROM memory erased
T555404-DBN
NiAu-bumped 15 µm
chip on sticky tape
210 pF capacitor; default programming: all 0; EEPROM memory erased
T555401N-DDW
6” wafer
210 pF capacitor; default programming: all 0; EEPROM memory erased
T555402-DBN
T555403-DBN
80 pF capacitor; default programming: all 0; EEPROM memory erased
80 pF capacitor; default programming: all 0; EEPROM memory erased
10. Chip Dimensions
Figure 10-1. Chip Dimensions of T5554
25
4576D–RFID–12/06
11. Revision History
Please note that the following page numbers referred to in this section refer to the specific revision
mentioned, not to this document.
26
Revision No.
History
4576D-RFID-12/06
•
•
•
•
•
•
•
4576C-RFID-12/05
• Pb-free Logo on page 1 deleted
Put data sheet in a new template
Features on page 1 changed
Section 3.2 “Resonance Capacitor” on page 3 changed
Figure 4-1 “Application Circuit” on page 7 changed
Figure 6-1 “Typical Application Circuit” on page 23 changed
Section 8 “Electrical Characteristics” on page 24 changed
Section 9 “Ordering Information” on page 25 changed
T5554
4576D–RFID–12/06
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4576D–RFID–12/06