SY10/100/101474-3 SY10/100/101474-4 SY10/100/101474-5 SY10474-3/4/5/7 SY10/100/101474-7 SY100474-3/4/5/7 SY101474-3/4/5/7 1K x 4 ECL RAM SYNERGY SEMICONDUCTOR FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTION Address access time, tAA: 3/4/5/7ns max. Chip select access time, tAC: 2ns max. Write pulse width, tWW: 3ns min. Edge rate, tr/tf: 500ps typ. Power supply current, IEE: –300mA, –220mA for –5/7ns Superior immunity against alpha particles provides virtually no soft error sensitivity Built with advanced ASSET™ technology Fully compatible with industry standard 10K/100K ECL I/O levels Noise margins improved with on-chip voltage and temperature compensation Open emitter output for easy memory expansion ESD protection of 2000V Available in 24-pin Flatpack and 28-pin PLCC and MLCC packages The Synergy SY10/100/101474 are 4096-bit Random Access Memories (RAMs), designed with advanced Emitter Coupled Logic (ECL) circuitry. The devices are organized as 1024-words-by-4-bits and meet the standard 10K/100K family signal levels. The SY100474 is also supply voltagecompatible with 100K ECL, while the SY101474 operates from 10K ECL supply voltage (–5.2V). All feature on-chip voltage and temperature compensation for improved noise margin. The SY10/100/101474 employ proprietary circuit design techniques and Synergy’s proprietary ASSET advanced bipolar technology to achieve extremely fast access, write pulse width and write recovery times. ASSET uses proprietary technology concepts to achieve significant reduction in parasitic capacitance while improving device packing density. Synergy’s circuit design techniques, coupled with ASSET, result not only in ultra-fast performance, but also allow device operation with virtually no soft error sensitivity and with outstanding device reliability in volume production. BLOCK DIAGRAM A1 A0 A2 A3 A4 A5 A6 A7 A8 A9 X-Decoder/ Driver Y-Decoder/Driver Memory Cell Array CS WE SA/WA* SA/WA SA/WA SA/WA DI0 DO0 DI1 DO1 DI2 DO2 DI3 DO3 * SA = Sense Amplifier WA = Write Amplifier Rev.: D © 1999 Micrel-Synergy 1 Amendment: /1 Issue Date: December 1999 SY10/100/101474-3 SY10/100/101474-4 SY10/100/101474-5 SY10/100/101474-7 SYNERGY SEMICONDUCTOR 1 28 27 26 DO0 2 VCC VCCA NC 3 DO1 DO3 DO2 NC 5 25 DI3 A4 A3 A1 6 24 DI2 A2 7 23 DI1 A2 A1 NC 8 22 NC A3 9 21 DI0 A4 10 20 CS A5 19 11 12 13 14 15 16 17 18 WE PIN NAMES A7 A8 NC VEE A6 A0 Top View MLCC (M28-1) or PLCC (J28-1) A9 A0 NC VEE A6 4 A5 DO2 DO3 VCC 24 23 22 21 20 19 18 17 Top View 16 Flatpack 15 F24-1 14 13 7 8 9 10 11 12 DO0 DO1 DI3 1 2 3 4 5 6 VCCA WE CS DI0 DI1 DI2 A8 A7 A9 PIN CONFIGURATIONS TRUTH TABLE Label Function A0 - A9 Address Inputs CS Input CS WE DIN Output Mode Chip Select H X X L Disabled WE Write Enable L L H L Write “H” DI0 - DI3 Data Input (DIN) L L L L Write “L” DO0 - DO3 Data Output (DOUT) L H X DOUT VCC GND (0V) VCCA Output GND (0V) VEE Supply Voltage NC No Connect NOTE: H = High Voltage Level L = Low Voltage Level X = Don’t Care 2 Read SY10/100/101474-3 SY10/100/101474-4 SY10/100/101474-5 SY10/100/101474-7 SYNERGY SEMICONDUCTOR FUNCTIONAL DESCRIPTION The Synergy SY10/100/101474 are 4096-bit RAMs organized as 1024-words-by-4-bits. Memory cell selection is achieved by using the 10 address bits designated as A0 through A9. Each of the 210 possible input address combinations corresponds to a unique word location in memory. The active low Chip Select (CS) is provided for memory expansion. The active low Write Enable (WE) controls the read and write operation. Data resident on the DIN inputs (DI0 through DI3) is written into the addressed location only when WE and CS are held low. In order to perform a read operation, WE is held high, CS is held low and the non-inverted output data at the addressed location is transferred to DOUT (DO0 through DO3) to be read out. Open emitter outputs are provided for maximum flexibility and memory expansion by allowing output wire-OR connections. External termination of 50Ω to –2.0V or an equivalent circuit must be used to provide the specified output levels. The outputs are brought to a logical low level when the RAM is being written into (WE = LOW) or when the device is deselected via the active low chip select pin (CS = HIGH). ABSOLUTE MAXIMUM RATINGS(1) Symbol Rating GUARANTEED OPERATING CONDITIONS Value Unit Parameter Voltage(1) VEE VEE Pin Potential to VCC Pin +0.5 to –7.0 V VIN Input Voltage +0.5 to VEE V IOUT DC Output Current (Output High) –30 mA TC Temperature Under Bias –55 to +125 °C Tstore Storage Temperature –65 to +150 °C Supply 10K Supply Typ. Max. Unit VEE –5.46 –5.2 –4.94 V TC 0 — 75 °C VEE –4.8 –4.5 –4.2 V TC 0 — 85 °C VEE –5.46 –5.2 –4.94 V TC 0 — 85 °C Symbol Min. Typ. Max. Unit Case Temperature Voltage(1) 100K Case Temperature Supply Voltage(1) 101K Case Temperature NOTE: 1. Referenced to VCC. NOTE: 1. Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. This is a stress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to ABSOLUTE MAXIMUM RATlNG conditions for extended periods may affect device reliability. RISE AND FALL TIME Parameter Symbol Min. CAPACITANCE Code(1) Symbol Min. Typ. Max. Unit Parameter Output Rise Time F S tr — — 500 1500 — — ps Input Pin Capacitance CIN — 4 — pF Output Fall Time F S tf — — 500 1500 — — ps Output Pin Capacitance COUT — 5 — pF NOTE: 1. F = Fast Edge Rate S = Standard Edge Rate 3 SY10/100/101474-3 SY10/100/101474-4 SY10/100/101474-5 SY10/100/101474-7 SYNERGY SEMICONDUCTOR 10K DC ELECTRICAL CHARACTERISTICS VCC = 0V; TC = 0°C to +75°C; VEE = –5.2V; Airflow > 2.5m/s; Output Load = 50Ω to –2.0V Symbol Parameter TC Min. Max. Unit Condition VOH Output High Voltage 0°C +25°C +75°C –1000 –960 –900 –840 –810 –720 mV VIN = VIH Max. or VIL Min. VOL Output Low Voltage 0°C +25°C +75°C –1870 –1850 –1830 –1665 –1650 –1625 mV VIN = VIH Max. or VIL Min. VOHC Output High Voltage 0°C +25°C +75°C –1020 –980 –920 — — — mV VIN = VIH Min. or VIL Max. VOLC Output Low Voltage 0°C +25°C +75°C — — — –1645 –1630 –1605 mV VIN = VIH Min. or VIL Max. VIH Input High Voltage 0°C +25°C +75°C –1145 –1105 –1045 –840 –810 –720 mV Guaranteed Input Voltage High for All Inputs VIL Input Low Voltage 0°C +25°C +75°C –1870 –1850 –1830 –1490 –1475 –1450 mV Guaranteed Input Voltage Low for All Inputs IIH Input High Current 0°C to +75°C 0.0 20 µA VIN = VIH Max. IIL Input Low Current 0°C to +75°C –2 2 µA VIN = VIL Min. IIL CS Input Low Current 0°C to +75°C 30 170 µA VIN = VIL Min. IIH CS Input High Current 0°C to +75°C 40 220 µA VIN = VIH Max. IIL WE Input Low Current 0°C to +75°C –2 35 µA VIN = VIL Min. IIH WE Input High Current 0°C to +75°C 0.0 60 µA VIN = VIH Max. IEE Power Supply Current 0°C to +75°C –300 –220 — mA All Inputs and Outputs Open -3ns, -4ns -5ns, -7ns 100K/101K DC ELECTRICAL CHARACTERISTICS VCCA = 0V VCC = 0V Symbol VEE = –4.5V (100K) VEE = –5.2V (101K) Parameter TC = 0°C to +85°C Min. Max. Airflow > 2.5m/s Output Load = 50Ω to –2.0V Unit Condition VOH Output High Voltage –1025 –880 mV VIN = VIH Max. or VIL Min. VOL Output Low Voltage –1810 –1620 mV VIN = VIH Max. or VIL Min. VOHC Output High Voltage –1035 — mV VIN = VIH Min. or VIL Max. VOLC Output Low Voltage — –1610 mV VIN = VIH Min. or VIL Max. VIH Input High Voltage –1165 –880 mV Guaranteed Input Voltage Highfor All Inputs VIL Input Low Voltage –1810 –1475 mV Guaranteed Input Voltage Lowfor All Inputs IIH Input High Current 0.0 20 µA VIN = VIH Max. IIL Input Low Current –2 2 µA VIN = VIL Min. IIL CS Input Low Current 30 170 µA VIN = VIL Min. IIH CS Input High Current 40 220 µA VIN = VIH Max. IIL WE Input Low Current –2 35 µA VIN = VIL Min. IIH WE Input High Current 0.0 60 µA VIN = VIH Max. IEE Power Supply 3ns, 4ns Current -5ns, -7ns — mA All Inputs and Outputs Open –300 –220 4 SY10/100/101474-3 SY10/100/101474-4 SY10/100/101474-5 SY10/100/101474-7 SYNERGY SEMICONDUCTOR AC ELECTRICAL CHARACTERISTICS AC TEST CONDITIONS VCC = VCCA = 0V VEE = –5.2V ± 5%(10K) VEE = –4.5V ± 0.3V(100K) VEE = –5.2V ± 5%(101K) Output Load = 50Ω to –2.0V TC = 0°C to +75°C (10K) TC = 0°C to +85°C (100K/101K) Airflow > 2.5m/s Loading Condition TC VIH VIL 10K 0°C +25°C +75°C –0.933V –0.90V –0.863V –1.733V –1.70V –1.663V 100/101K 0°C to +85°C –0.90V –1.70V GND Input Pulse VIH 80% VCCA VCC 20% OUT VEE VIL tr CL RL tf tr = tf = 1.0ns typ. OUTPUT LOAD: RL = 50Ω CL = 5pF* (typ.) * (Modeled as 50Ω transmission line terminated to –2V.) 0.01µF VEE –2.0V NOTE: All timing measurements referenced to 50% input levels. READ CYCLE SY10474-3 SY100474-3 SY101474-3 Symbol Parameter Min. SY10474-4 SY100474-4 SY101474-4 SY10474-5 SY100474-5 SY101474-5 SY10474-7 SY100474-7 SY101474-7 Max. Min. Max. Min. Max. Min. Max. Unit tAA TAVQV Address Access Time — 3 — 4 — 5 — 7 ns tAC TSLQV Chip Select Access Time — 2 — 2 — 3 — 3 ns tRC TSHQL Chip Select Recovery Time — 2 — 2 — 3 — 3 ns READ CYCLE TIMING DIAGRAM CS 50% tAC Address tRC tAA 80% 50% 20% DOUT tr 50% DOUT tf 5 50% SY10/100/101474-3 SY10/100/101474-4 SY10/100/101474-5 SY10/100/101474-7 SYNERGY SEMICONDUCTOR WRITE CYCLE Symbol Parameter SY10474-3 SY100474-3 SY101474-3 SY10474-4 SY100474-4 SY101474-4 SY10474-5 SY100474-5 SY101474-5 Min. Max. Min. Max. Min. Max. SY10474-7 SY100474-7 SY101474-7 Min. Max. Units tWW TWLWH Write Pulse Width 3 — 4 — 5 — 5 — ns tWS TWLQL Write Disable Time — 2 — 2 — 3 — 4 ns tWR TWHQV Write Recovery Time — 3 — 4 — 5 — 5 ns tSA TAVWL Address Set-up Time 1 — 1 — 1 — 1 — ns tSC TSLWL Chip Select Set-up Time 0 — 0 — 0.5 — 1 — ns tSD TDVWL Data Set-up Time 0 — 0 — 0.5 — 1 — ns tHA TWHAX Address Hold Time 1 — 1 — 1 — 1 — ns tHC TWHSX Chip Select Hold Time 1 — 1 — 1 — 1 — ns tHD TWHDX Data Hold Time 1 — 1 — 1 — 1 — ns WRITE CYCLE TIMING DIAGRAM CS Address DIN tSD tHD WE tSA DOUT tWW tHC 50% tSC tWS tWR 6 SY10/100/101474-3 SY10/100/101474-4 SY10/100/101474-5 SY10/100/101474-7 SYNERGY SEMICONDUCTOR PRODUCT ORDERING CODE Speed (ns) Ordering Code Edge Rate Package Type Operating Range 3 SY10/100/101474-3FCF SY10/100/101474-3MCF Fast Fast F24-1 M28-1 Commercial Commercial 4 SY10/100/101474-4FCF SY10/100/101474-4MCF Fast Fast F24-1 M28-1 Commercial Commercial 5 SY10/100/101474-5FCS SY10/100/101474-5JCS SY10/100/101474-5JCSTR Standard Standard Standard F24-1 J28-1 J28-1 Commercial Commercial Commercial 7 SY10/100/101474-7FCS SY10/100/101474-7JCS SY10/100/101474-7JCSTR Standard Standard Standard F24-1 J28-1 J28-1 Commercial Commercial Commercial 7 SY10/100/101474-3 SY10/100/101474-4 SY10/100/101474-5 SY10/100/101474-7 SYNERGY SEMICONDUCTOR 24 LEAD CERPACK (F24-1) 8 SY10/100/101474-3 SY10/100/101474-4 SY10/100/101474-5 SY10/100/101474-7 SYNERGY SEMICONDUCTOR 28 LEAD PLASTIC LEADED CHIP CARRIER (J28-1) 9 WWW.ALLDATASHEET.COM Copyright © Each Manufacturing Company. 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