AVAGO HFBR

HFBR-57L5AP
Agilent HFBR-57L5AP Digital Diagnos
SFP 850 nm Transceiver for Fibre Chann
1.0625 Gb/s and Ethernet 1.25 Gb/s
Digital Diagnostic SFP 850 nm Transceiver
for Fibre Channel 1.0625 Gb/s and Ethernet 1.25 Gb/s Data Sheet
Data Sheet
Features
• SFF-8472 Diagnostic Monito
Interface (DMI) for Optical
Transceivers with real time
monitors:
- Transmitted Optical Power
- Received Optical Power
- Laser Bias Current
Description
Related Products
- Temperature
Description
The HFBR-57L5AP is a state of Features
• HFBR-0534: Evaluation Kit for
- Supply Voltage
theofart
designed
to • SFF-8472
Agilent Diagnostic
SFPs with Diagnostic
The HFBR-57L5AP is a state
thetransceiver
art transceiver
designed
Monitoring Interface
(DMI)
for
• SFP
Transceiver
Specificati
provide
a cost effective,
highfor
Monitoring
Interface
(DMI)
to provide a cost effective,
high performance
solution
Optical
Transceivers
with
real time monitors:
- SFF-8074i (Rev 1.0)
solution
forappli1.25
•- HFBR-57M5AP:
850 nm
+3.3 V
1.25 Gb/s Ethernet and performance
1.0625 Gb/s Fibre
Channel
- SFF-8472 (Rev 9.3)
Transmitted Optical
Power
Gb/sto
Ethernet
and 1.0625
SFP w/DMI for 2.125/1.0625 Gb/s
cations. As an enhancement
the conventional
SFP,Gb/s
the
- 1.25 Gb/s Ethernet operati
- for
Received
Optical and
Power
Fibre
applications.
Fibre Channel
1.250 Gb/s
HFBR- 57L5AP implements
the Channel
digital diagnostic
interface
IEEE 802.3 1000BASE-SX
1000BASE-SX.
per MSA SFF-8472. Real time monitors of temperature,
- for
Laser
Bias Current
As an enhancement to the
- 1.0625 Gb/s Fibre Channel,
supply voltage, laser bias current, laser average output
•- HFBR-5701L/LP:
850 nm +3.3 V
Temperature
conventional SFP, the HFBR100-M5-SN-I and 100-M6power and received input power OMA are provided via a
SFP
for
1.250
Gb/s
operation for
57L5AP implements the digital
-
Supply
Voltage
•
Alarms
and warnings to ind
two-wire serial interface. This information is in addition to
1000BASE-SX and 1.0625 Gb/s for
diagnostic interface per MSA
status
of
real time monitors
the conventional SFP data.
• SFPFibre
Transceiver
ChannelSpecifications:
SFF-8472. Real time monitors of
• LC Duplex optical connector
•- HDMP-1636A/46A:
SFF-8074i (Rev 1.0) Single SerDes
temperature, supply voltage,
interface conforming to ANS
Related Products
IC for Gigabit Ethernet and Fibre
laser bias current, laser average
- SFF-8472 (Rev 9.3)
TIA/EIA604-10 (FOCIS 10)
Channel
• HFBR-0534: Evaluation
Kit power
for Avago
SFPs with
output
and received
•
Wide temperature and supp
-
1.25
Gb/s
Ethernet
operation,
IEEE
802.3
• HDMP-1685A: Quad SerDes IC for
Diagnostic Monitoring
Interface
(DMI)
input
power
OMA are provided
voltage operation
1000BASE-SX
Gigabit Ethernet with 5 bit
serialw/DMI
interface.
• HFBR-57M5AP: 850 via
nma two-wire
+3.3 V SFP
for
•
850 nmand
VCSEL
interface
DDR TTL
- parallel
1.0625 Gb/s
Fibreand
Channel,
FC-PI 100-M5-SN-I
in addition
2.125/1.0625 Gb/s forThis
Fibreinformation
Channel and is
1.250
Gb/s for
•
IEC
60825-1
Class 1/CDRH C
clock
input
100-M6-SN-I
to the conventional SFP data.
1000BASE-SX.
1
laser
eye
safe
HDMP-1687:
Quad SerDes
IC for
• •Alarms
and warnings
to indicate
status of real time
• HFBR-5701L/LP: 850 nm +3.3 V SFP for 1.250 Gb/s
Gigabit
Ethernet
with
10
bit
monitors
operation for 1000BASE-SX and 1.0625 Gb/s for Fibre
Applications
parallel interface and TTL clock
• LCinput
Duplex optical connector interface conforming
to Systems
Channel
• Fibre Channel
ANSI
TIA/EIA604-10
(FOCIS
10)
- Enterprise Class Storage
• HDMP-1636A/46A: Single SerDes IC for Gigabit Ethernet
Systems
• Wide temperature and supply voltage operation
and Fibre Channel
Director
Class Switches
• 850 nm VCSEL
• HDMP-1685A: Quad SerDes IC for Gigabit Ethernet with
- Fabric Switches
5 bit parallel interface and DDR TTL clock input
• IEC 60825-1 Class 1/CDRH Class 1 laser eye safe
•
HBA Cards
• HDMP-1687: Quad SerDes IC for Gigabit Ethernet with
•
Switch to switch interface
Applications
10 bit parallel interface and TTL clock input
• File server interface
• Fibre Channel Systems
• iSCSI applications
- Enterprise Class Storage Systems
- Director Class Switches
- Fabric Switches
• HBA Cards
• Switch to switch interface
• File server interface
• iSCSI applications
digital diagnostic information.
Component Monitoring
Installation
The new diagnostic information
The real-time diagnostic
The HFBR-57L5AP can be
provides the opportunity for
parameters can be monitored to
installed in any SFF-8074i
compliant Small Form Pluggable Predictive Failure Identification, alert the system when operating
Fault
limits are exceeded and
(SFP) port. The HFBR-57L5AP is Compliance Prediction,
Installation
Predictive
Failure Identification
Isolation and Component
compliance cannot be ensured.
hot-pluggable, allowing the
The HFBR-57L5AP can be installed in any SFF-8074i comThe diagnostic information allows the host system to
Monitoring.
Real time transceiver
module to be installed while the
pliant Small Form Pluggable (SFP) port. The HFBR-57L5AP
identify potential link problems. Once identified, a “fail
diagnostics information can also
host system is operating and onis hot-pluggable, allowing the modulePredictive
to be installed
over” technique can be used to isolate and replace susFailure Identification
be combined with system level
line. Upon insertion, the
while the host system is operating and The
online.
Upon in-information
pect devices before system uptime is impacted.
diagnostic
monitoring to verify that
transceiver housing makes
sertion, the transceiver housing makes initial
contact
with system to
allows
the host
performance and operating
initial contact with the host
Component
Monitoring
the host board SFP cage, mitigating potential
identify damage
potential link
problems.
environments are meeting the
board SFP cage, mitigating
due to Electro- Static Discharge (ESD). Once identified, a “fail
over” diagnostic
The real-time
parameters
be monitored to
intended
design can
requirements.
potential damage due to Electrotechnique
can
be
used
to
isolate
alert
the
system
when
operating
limits
are
exceeded and
StaticDiagnostic
DischargeInterface
(ESD). and Serial Identification
Digital
and replace suspectcompliance
devices cannotFault
IsolationReal time transceiver dibe ensured.
systemAT-uptime
is
Thecan
diagnostic
information
Digital
Diagnostic
Interface and
The
2-wire
serial interface
is based onbefore
the ATMEL
agnostics
information
also be combined
withcan
system
impacted.
to pinpoint
the
Serial Identification
24C01A
series EEPROM protocol and signaling
detail. The
level monitoring toallow
verify the
thathost
performance
and operating
location the
of aintended
link problem
The 2-wire
interface
is
HFBR57L5P serial
contains
conventional
SFP memory per SFFenvironments are meeting
designand
requireaccelerate system servicing and
basedason
the
AT24C01A
8074i
well
as ATMEL
additional
memory (address 0xA2) for the
ments.
minimize downtime.
series
EEPROM
protocol
and
new
Figure
1. Transceiver
Functional
Diagram digital diagsignaling
detail. The
Fault Isolation
nostic
information.
The HFBRnew diagnostic information pro57L5P
conventional
vides
thecontains
opportunity
for Predictive Failure Identification,
The diagnostic information can allow the host to pinpoint
SFP memory
per SFF-8074i
as
Compliance
Prediction,
Fault Isolation
and Component
the location of a link problem and accelerate system serwell as additional memory
Monitoring.
vicing and minimize downtime.
(address 0xA2) for the new
Optical Interface
Electrical Interface
Receiver
RD+ (Receive Data)
Light from Fiber
Photodetector
Amplification &
Quantizattion
RD- (Receive Data)
RX Loss of Signal
MOD_DEF2 (SDA)
MICROCONTROLLER &
MEMORY
MOD_DEF1 (SCL)
MOD_DEF0
Transmitter
TX_DISABLE
Light to Fiber
VCSEL
Laser Driver &
Safety Circuit
TD+ (Transmit Data)
TD- (Transmit Data)
TX_FAULT
Figure 1. Transceiver Functional Diagram
2
the laser and assert the
Functional Data I/O
tion includes TX_FAULT output.
Agilent’s HFBR-57L5AP fiberVertical
optic transceiver is designed to
Receiver Section
tting Laser)
accept industry standard
Section
TX_FAULT
The receiver
section includes a
ransmitter Transmitter
electrical input differential
PIN
detector
with
amplification
driver circuit The transmitter section includes an 850 nmsignals.
The transceiver
haswill activate the transmitter signal, TX_FAULT,
VCSEL (VertiA laser fault
and quantization circuits.
nt average
internally
ac-coupled
data the laser. This signal is an open collector outcal Cavity Surface Emitting Laser) light source
and a transand disable
Optical connection to the
ut with Fibre mitter
inputs
and outputs.
Bias required on the host board). A low signal indidriver circuit. The driver circuit maintains
a constant
put (pull-up
receiver is provided via an LC
net 8B/10B average
resistors
optical power output with Fibre Channel
andand
Eth- coupling
cates normal laser operation and a high signal indicates a
optical connector.
connection ernet
capacitors
have been
included
8B/10B coded data. Optical connection
to the transfault. The
TX_FAULT will be latched high when a laser fault
s provided mitter is provided via an LC connector.
within
the
module
to
reduce
the
occurs
and
is cleared
by toggling the TX_DISABLE input or
RX_LOS
r.
number
of
components
required
power
cycling
the
transceiver.
The transmitter fault conThe receiver section contains a
TX_DISABLE
on
the
customer’s
board.
Figure
dition
can
also
be
monitored
via
the twowire serial interloss of signal (RX_LOS) circuit
2
illustrates
the
recommended
face.
indicate when
optical
opticalthe
output
can be disabled by assertical output Thetotransmitter
interface circuit.
input
signal
power
is
insufficient
ing
pin
3,
TX_DISABLE.
A
high
signal
asserts this function
asserting pin
Eye Safety Circuit
for aGigabit
Ethernet
or normal
Fibre laser operation.
low signal
enables
high signal while
ApplicationThe
Support
Channeloutput
compliance.
high
can alsoAbe
disabled and
monitored Kit
Under
normal operating conditions laser power will be
n while a low transmitter
An Evaluation
and Reference
signal
indicates
loss
of
via
the
two-wire
serial.
In
the
event
of
a
transceiver
fault,
maintained
below
mal laser
Designs are available to assist
in Class 1 eyesafety limits. Should a catamodulated
signal,
indicating
link
such
as
the
activation
of
the
eye
safety
circuit,
toggling
of
strophic
laser
fault
nsmitter
evaluation of the HFBR-57L5AP. occur and optical power become unfailure
such
as
a
broken
fiber
or
the
TX_DISABLE
will
reset
the
transmitter
as depicted in
controlled, the laser driver will detect the fault, shut down
disabled and
nonfunctional
remote
Please
contact
your
localand
Field
Figure
5.
the laser
assert the TX_FAULT output.
wo-wire
transmitter.
RX_LOS
can
be
also
Sales
representative
for
of a
be monitored via the two-wire
availability and ordering details.
uch as the
serial.
e safety
1 µH
3.3 V
he
10 µF
0.1 µF
1 µH
eset the
3.3 V
cted in
VCC,T
SFP MODULE
0.1 µF
4.7 K to 10 K
4.7 K to 10 K
Tx_DISABLE
Tx_FAULT
tivate the
TD+
50 Ω
VREFR
VREFR
SO+
TX_FAULT,
TX[0:9]
TD–
50
Ω
SO–
r. This
TX GND
TBC
TBC
EWRAP
EWRAP
VCC,R
llector
4.7 K to 10 K
HDMP-1636A
0.1
PROTOCOL
10 µF
uired on the
µF
IC
RX[0:9]
RD+
50 Ω
signal
SI+
RBC
RBC
100
Rx_RATE
Rx_RATE
ser operation
RD–
50 Ω
SI–
REFCLK
Rx_LOS
dicates a
Rx_LOS
RX GND
LT will be
MOD_DEF2
GPIO(X)
a laser fault
MOD_DEF1
GPIO(X)
MOD_DEF0
GP14
d by toggling
REFCLK
4.7 K to
4.7 K to 4.7 K to
put or power
10 K
10 K
10 K
ver. The
106.25 MHz
3.3 V
ndition can
ia the twoFigure 2. Typical Application Configuration
e.
ating
wer will be
Class 1 eyeda
ault occur
become
ser driver
, shut down
Tx_FAULT
0.01 µF
0.01 µF
VCC,R
50 Ω
0.01 µF
AMPLIFICATION
&
QUANTIZATION
0.01 µF
50 Ω
VCC,R
EEPROM
1 µH
VCCT
0.1 µF
1 µH
VCCR
0.1 µF
SFP MODULE
10 µF
HOST BOARD
Figure 3. Recommended Power Supply Filter
3.3 V
0.1 µF
10 µF
LASER DRIVER
& SAFETY
CIRCUITRY
100 Ω
Receiver Section
Regulatory Compliance
The receiver section includes a PIN detector with amplifi- The transceiver Regulatory Compliance performance is
cation and quantization circuits. Optical connection to the provided in Table 1 as a figure of merit to assist the deRegulatory
Compliance
Electromagnetic Interference
(EMI)
receiver
is provided
via an LC optical connector.
signer. The
overall equipment design will determine the
The transceiver Regulatory
Most equipment designs
using level.
certification
RX_LOS
Compliance performance is
the HFBR-57L5AP are subject to
Electrostatic Discharge (ESD)
provided
in
Table
1
as
a
figure
of
requirements
The receiver section contains a loss ofthe
signal
(RX_LOS) of the FCC in
merit
to
assist
the
designer.
The
the
United
States,
CENELEC
circuit to indicate when the optical input signal power is Normal ESD handling precautions for ESD sensitive deoverall
equipment
design
willor FibreEN55022
(CISPR 22)
in Europe
insufficient
for Gigabit
Ethernet
Channel complivices
should be followed while using these transceivers.
determine
the
certification
level.
and
VCCI
in
Japan.
The
ance. A high signal indicates loss of modulated signal, in- Thesemetal
precautions include using grounded wrist straps,
housing
and shielded
design
of and floor mats in ESD controlled areas. Addicating
link
failure
such
as
a
broken
fiber
or
nonfunctionwork
benches
Electrostatic Discharge (ESD)
the
HFBR-57L5AP
provides
al
remoteESD
transmitter.
RX_LOS can be also be monitored ditionally, static discharges to the exterior of the equipNormal
handling
excellent EMI performance.
via
the
two-wire
serial.
ment chassis containing the transceiver parts must also
precautions for ESD sensitive
be considered.
devices should be followed while Flammability
Functional
Data
I/O
using these transceivers. These
The HFBR-57L5AP is compliant
Electromagnetic Interference (EMI)
precautions
include fiberoptic
using transceiver
to UL
94V-0. to
Avago’s
HFBR-57L5AP
is designed
grounded
wriststandard
straps, work
accept
industry
electrical input differential sig- Most equipment designs using the HFBR-57L5AP are subbenches
and floor mats
in ESD ac-coupled data inputs
nals.
The transceiver
has internally
ject to the requirements of the FCC in the United States,
controlled
Additionally,
and
outputs.areas.
Bias resistors
and coupling capacitors have
CENELEC EN55022 (CISPR 22) in Europe and VCCI in Jastaticincluded
discharges
to the
been
within
the exterior
module to reduce the number
pan. The metal housing and shielded design of the HFBRthe equipment
chassis
of components
required
on the customer’s board. Figure
57L5AP provides excellent EMI performance.
containing
therecommended
transceiver parts
2
illustrates the
interface circuit.
Flammability
must also be considered.
Application Support
An Evaluation Kit and Reference Designs are available to
assist in evaluation of the HFBR-57L5AP.
The HFBR-57L5AP is compliant to UL 94V-0.
Please contact your local Field Sales representative for
availability and ordering details.
Table 1. Regulatory Compliance
Feature
Test Method
Performance
Electrostatic Discharge (ESD)
to the Electrical Pins
MIL-STD-883C
Method 3015.4
JEDEC
Class 2 (>2000 Volts)
Electrostatic Discharge (ESD)
to the Optical Connector
Variation of IEC 801-2
Air discharge of 15 kV (min) contact to connector w/o
damage
Electromagnetic Interference
(EMI)
FCC Class B
CENELEC EN55022 Class B
(CISPR 22A)
VCCI Class 1
System margins are dependent on customer board and
chassis design
Immunity
Variation of IEC 61000-4-3
Lass than 0.5 dB of Rx sensitivity degradation and less
than 10% margin reduction of Tx mask at 10 V/m, 10
MHz to 1 GHz w/o chassis enclosure
Laser Eye Safety and
Equipment Type Testing
US FDA CDRH AEL Class 1
US21 CFR, Subchapter J per Paragraphs
1002.10 and 1002.12
CDRH certification #: 9720151-31
TUV file #: 02171216.002
(IEC) EN60825-1: 1994 + A11+A2
(IEC) EN60825-2: 1994 + A1
(IEC) EN60950: 1992 + A1 + A2 + A3 + A4 + A11
Component Recognition
Underwriters Laboratories and Canadian
Standards Association Joint Component Recognition
for Information Technology Equipment Including
Electrical Business Equipment
UL file #: E173874
Caution
Ordering Information
The HFBR-57L5AP contains no user serviceable parts. Tampering with or modifying the performance of the HFBR57L5AP will result in voided product warranty. It may also
result in improper operation of the HFBR-57L5AP circuitry,
and possible overstress of the laser source. Device degradation or product failure may result. Operating above the
recommended absolute maximum conditions may be
considered an act of modifying or manufacturing a laser
product. The person(s) performing such an act is required
by law to recertify and reidentify the laser product under
the provisions of U.S. 21 CFR (Subchapter J) and the TUV.
Please contact your local field sales engineer or one of
Avago Technologies franchised distributors for ordering
information. For technical information, please visit Avago
Technologies’ web page at www.avagotech.com
For information related to SFF Committee documentation
visit www.sffcommittee.org.
Pin Description
Pin
Name
Function/Description
1
VEET
Transmitter Ground
2
TX_FAULT
Transmitter Fault Indication - High indicates a fault condition
1
3
TX_DISABLE
Transmitter Disable - Module optical output disables on high or open
2
4
MOD-DEF2
Module Definition 2 - Two wire serial ID interface data line (SDA)
3
5
MOD-DEF1
Module Definition 1 - Two wire serial ID interface clock line (SCL)
3
6
MOD-DEF0
Module Definition 0 - Grounded in module (module present indicator)
3
7
Notes
No connect
8
RX_LOS
Loss of Signal - High indicates loss of received optical signal
4
9
VEER
Receiver Ground
10
VEER
Receiver Ground
11
VEER
Receiver Ground
12
RD-
Inverse Received Data Out
5
13
RD+
Received Data Out
5
14
VEER
Receiver Ground
15
VCCR
Receiver Power +3.3 V
6
16
VCCT
Transmitter Power +3.3 V
6
17
VEET
Transmitter Ground
18
TD+
Transmitter Data In
7
19
TD-
Inverse Transmitter Data In
7
20
VEET
Transmitter Ground
Notes:
1. TX_FAULT is an open collector/drain output, which should be pulled up with a 4.7 k – 10 kW resistor on the host board. When high, this output
indicates a laser fault of some kind. Low indicates normal operation. In the low state, the output will be pulled to < 0.8 V.
2. TX_DISABLE is an input that is used to shut down the transmitter optical output. It is pulled up within the transceiver with a 4.7 k – 10 kW resistor.
Low (0 – 0.8 V): Transmitter on
Between (0.8 V and 2.0 V): Undefined
High (2.0 – V CC max): Transmitter Disabled
Open: Transmitter Disabled
3. The signals Mod-Def 0, 1, 2 designate the two wire serial interface pins. They should be pulled up with a 4.7 k – 10 kW resistor on the host board.
Mod-Def 0 is grounded by the module to indicate the module is present
Mod-Def 1 is serial clock line (SCL) of two wire serial interface
Mod-Def 2 is serial data line (SDA) of two wire serial interface
4. RX_LOS (Rx Loss of Signal) is an open collector/drain output that should be pulled up with a 4.7 k – 10 kW resistor on the host board. When high,
this output indicates the received optical power is below the worst case receiver sensitivity (as defined by the standard in use). Low indicates
normal operation. In the low state, the output will be pulled to < 0.8 V.
5. RD-/+ designate the differential receiver outputs. They are ac coupled 100 W differential lines which should be terminated with 100 W differential at
the host SerDes. Ac coupling is done inside the transceiver and is not required on the host board. The voltage swing on these lines will be between
500 and 2000 mV differential (250 – 1000 mV single ended) when properly terminated.
6. VCC R and V CCT are the receiver and transmitter power supplies. They are defined at the SFP connector pin. The maximum supply current is 210 mA
and the associated inrush current will typically be no more than 30 mA above steady state after 500 nanoseconds.
7. TD-/+ designate the differential transmitter inputs. They are ac coupled differential lines with 100 W differential termination inside the module. The
ac coupling is done inside the module and is thus not required on the host board. The inputs will accept differential swings of 500 – 2400 mV (250 –
1200 mV single ended).
6
Absolute Maximum Ratings
Parameter
Symbol
Minimum
Maximum
Unit
Notes
Storage Temperature
TS
-50
+100
°C
1, 2
Ambient Operating Temperature
TA
-50
+100
°C
1, 2
Relative Humidity
RH
5
95
%
1
Supply Voltage
VCCT, R
-0.5
4.0
V
1, 2, 3
Control Input Voltage
VIN
-0.5
VCC + 0.5
V
1
Notes:
1. Absolute Maximum Ratings are those values beyond which damage to the device may occur if these limits are exceeded for other than a short period
of time. See Reliability Data Sheet for specific reliability performance.
2. Between Absolute Maximum Ratings and the Recommended Operating Conditions functional performance is not intended, device reliability is not
implied, and damage to the device may occur over an extended period of time.
3. See Figure 3 for the recommended power connection.
Recommended Operating Conditions
Parameter
Symbol
Minimum
Maximum
Unit
Notes
Ambient Operating Temperature
TA
-10
+75
°C
1
Case Operating Temperature
TC
-10
+85
°C
2
Module Supply Voltage
VCCT, R
2.97
3.63
V
2
1.0625
1.25
Gb/s
2
Data Rate
Notes:
1. The Ambient Operating Temperature limitations are based on the Case Operating Temperature limitations and are subject to the host system thermal
design.
2. Recommended Operating Conditions are those values for which functional performance and device reliability is implied.
Transceiver Electrical Characteristics
TC = -10 °C to +85 °C, VCCT, VCCR = 3.3 V ± 10%
Parameter
Symbol
Minimum
Typical
Maximum
Unit
Notes
mV
1
AC Electrical Characteristics
Power Supply Noise Rejection (pk-pk)
PSNR
100
DC Electrical Characteristics
Module Supply Current
ICC
210
mA
Power Dissipation
PDISS
765
mW
VCCT, R + 0.3
V
2
0.4
V
2
Sense Outputs:
Output High
Transmit Fault (TX_FAULT)
VOH
2.4
Loss of Signal - RX_LOS
MOD_DEF2
Output Low
Transmit Fault (TX_FAULT)
VOL
Loss of Signal - RX_LOS
MOD_DEF0
Control Inputs:
Input High
VIH
2.0
VCC
V
2
VIL
0
0.8
V
2
Transmit Disable (TX_DISABLE)
MOD-DEF1
MOD-DEF2
Input Low
Transmit Disable (TX_DISABLE)
MOD-DEF1
MOD-DEF2
Notes:
1. Filter per SFP specification is required on host board to remove 10 Hz to 2 MHz content.
2. Pulled up externally with a 4.7 k – 10 kW resistor on the host board to 3.3 V.
7
Transceiver Electrical Characteristics
TC = -10 °C to +85 °C, VCCT, VCCR = 3.3 V ± 10%
Parameter
Symbol
Minimum
VI
Receiver Differential Output Voltage (RD±)
VO
Receiver Contributed Deterministic Jitter (1.0625 Gb/s) DJ
Typical
Maximum
Unit
Notes
350
2400
mV
1
500
2000
0.12
mV
UI
2
3
113
0.218
ps
UI
4
205
0.332
266
250
ps
UI
ps
ps
5
High Speed Data Input:
Transmitter Differential Input Voltage (TD±)
High Speed Data Output:
Receiver Contributed Total Jitter 1.0625 Gb/s
TJ
Receiver Contributed Total Jitter 1.25 Gb/s
TJ
Receiver Electrical Output Rise & Fall Times (20-80%)
tr, tf
100
Notes:
1. Internally ac coupled and terminated (100 Ohm differential). These levels are compatible with CML and LVPECL.
2. Internally ac coupled with internal 50 W pull-ups to VCC (single-ended) and a required external 100 Ohm differential load termination.
3. Contributed DJ is measured on an oscilloscope in average mode with 50% threshold and K28.5 pattern
4. Contributed RJ is calculated for 1x10-12 BER by multiplying the RMS jitter (measured on a single rise or fall edge) from the oscilloscope by 14. Per FCPI (Table 13 - MM jitter output, note 1), the actual contributed RJ is allowed to increase above its limit if the actual contributed DJ decreases below
its limits, as long as the component output DJ and TJ remain within their specified FC-PI maximum limits with the worst case specified component
jitter input.
5. 20%-80% electrical rise & fall times measured with a 500 MHz signal utilizing a 1010 data pattern.
8
Transmitter Optical Characteristics
TC = -10 °C to +85 °C, VCCT, VCCR = 3.3 V ± 10%
Parameter
Symbol
Minimum
Unit
Notes
Modulated Optical Output Power (OMA, pk-pk)
TX, OMA
156
Typical
Maximum
µW
3
1.0625 Gb/s
Average Optical Output Power
POUT
-9.5
dBm
1, 2
Optical Extinction Ratio
ER
9
dB
6
Center Wavelength
lC
830
860
nm
Spectral Width - rms
s, rms
0.85
nm
Optical Rise/Fall Time
tR , tF
260
ps
6
1.25 Gb/s
Optical Rise/Fall Time
tR , tF
300
ps
20-80%
1.0625 Gb/s
RIN12 (OMA)
RIN
-117
dB/Hz
1.0625 Gb/s
DJ
0.09
UI
1.25 Gb/s
DJ
85
0.1
ps
UI
80
ps
0.267
UI
251
ps
TJ
0.284
UI
POFF
227
-35
ps
dBm
Transmitter Contributed Deterministic Jitter
4
Transmitter Contributed Total Jitter
1.0625 Gb/s
1.25 Gb/s
POUT TX_DISABLE Asserted
TJ
5, 7
Notes:
1. Max Pout is the lesser of Class 1 safety limits (CDRH and EN 60825) or receiver power, max.
2. Into 50/125 µm (0.2 NA) multimode optical fiber.
3. An OMA of 156 is approximately equal to an average power of –10 dBm assuming an Extinction Ratio of 9 dB.
4. Contributed DJ is measured on an oscilloscope in average mode with 50% threshold and K28.5 pattern.
5. Contributed RJ is calculated for 1x10-12 BER by multiplying the RMS jitter (measured on a single rise or fall edge) from the oscilloscope by 14. Per
FC-PI (Table 13 - MM jitter output, note 1), the actual contributed RJ is allowed to increase above its limit if the actual contributed DJ decreases
below its limits, as long as the component output DJ and TJ remain within their specified FC-PI maximum limits with the worst case specified
component jitter input.
6. IEEE 802.3.
7. Measured at TP2. TP refers to the compliance point specified by IEEE 802.3, section 38.2.1.
9
Receiver Optical Characteristics
TC = -10 °C to +85 °C, VCCT, VCCR = 3.3 V ± 10%
Parameter
Symbol
Maximum
Unit
Input Optical Power [Overdrive]
PIN
Minimum
Typical
0
dBm avg
Notes
Receiver Sensitivity
PRMIN
-17
dBm
1, 6
µW,
2, 4, 5
1.0625 Gb/s [Sensitivity]
Stressed receiver sensitivity
-13.5
OMA
dBm
1.25 Gb/s
-12.5
Stressed receiver sensitivity (OMA)
55
µW,
1.0625 Gb/s
67
OMA
(Optical Input Power)
1.25 Gb/s
Input Optical Modulation Amplitude (Pk-Pk)
OMA
31
50/125 µm fiber
62.5/125 µm fiber
Note 1, 6
50/125 µm fiber,
62.5/125 µm fiber,
Note 3, 6
Return Loss
12
dB
Loss of Signal – Assert
PA
-31
-17.5
Loss of Signal - De-Assert
PD
-30.5
-17
Loss of Signal - Hysteresis
PD-PA
0.5
dBm avg
dBm avg
dB
Notes:
1. IEEE 802.3.
2. 50/125 µm. An OMA of 31 is approximately equal to an average power of –17 dBm with an Extinction Ratio of 9 dB.
3. 1.0625 Gb/s Stressed receiver vertical eye closure penalty (ISI) min is 0.96 dB for 50 µm fiber. Stressed receiver DCD component min (at TX) is 80 ps.
4. These average power values are specified with an Extinction Ratio of 9 dB. The loss of signal circuitry responds to valid 8B/10B encoded peak to
peak input optical power, not average power.
5. Input Optical Modulation Amplitude (commonly known as sensitivity) requires a valid 8B/10B encoded input.
6. BER = 10-12.
10
10
Transceiver Timing Characteristics
TC = -10 °C to +85 °C, VCCT, VCCR = 3.3 V ± 10%
Parameter
Symbol
Maximum
Unit
TX_DISABLE Assert Time
t_off
Minimum
10
µs
Notes
1
TX_DISABLE Negate Time
t_on
1
ms
1
Time to initialize, Including reset of TX_FAULT
t_init, t_serial
300
ms
1
100
µs
1
µs
1
TX_FAULT Assert Time
t_fault
TX_DISABLE to Reset
t_reset
RX_LOS Assert Time
t_loss_on
100
µs
1
RX_LOS De-assert Time
t_loss_off
100
µs
1
Serial ID Clock Rate
f_serial_clock
100
kHz
2
10
Notes:
1. See MSA SFF-8472 for details
2. Contact Agilent for applications requiring higher Serial ID clock rate.
Nominal Transceiver Digital Diagnostic Monitor (Real Time Sense) Characteristics
TC = -10 °C to +85 °C, VCCT, VCCR = 3.3 V ± 10%
Parameter
Symbol
Minimum
Units
Notes
Received Modulated Optical Input Power Accuracy (OMA)
PR
± 3.0
dB
4
Transmitted Average Optical Output Power Accuracy
PT
± 3.0
dB
3
Transmitter Laser DC Bias Current Accuracy
IINT
± 10
%
Transceiver Internal Temperature Accuracy
TINT
± 3.0
°C
1
Transceiver Internal Supply Voltage Accuracy
VINT
± 0.1
V
2
Notes:
1. Temperature is measured internal to the transceiver.
2. Voltage is measured internal to the transceiver.
3. Coupled into 50/125 µm multimode fiber. Valid from 100 to 1000 µW, avg.
4. Coupled from 50/125 µm multimode fiber. Valid from 31 to 800 µW OMA.
11
11
Address A0 as per MSA
0
Address A2 as per MSA
0
Serial ID defined by
SPF MSA (96 Bytes)
Alarm and Warning
Thresholds (56 Bytes)
55
95
95
Vendor Specific
(32 Bytes)
127
119
Real Time Diagnositic
Interface (24 Bytes)
Vendor Specific (8 Bytes)
127
User Writable
EEPROM (120 Bytes)
Reserved in SFP
MSA (128 Bytes)
247
255
Figure 4. Memory Map
12
12
Cal Constants
(40 Bytes)
255
Vendor Specific (8 Bytes)
VCC > 2.97 V
VCC > 2.97 V
Tx_FAULT
Tx_FAULT
Tx_DISABLE
Tx_DISABLE
TRANSMITTED SIGNAL
TRANSMITTED SIGNAL
t_init
t_init
t-init: TX DISABLE NEGATED
t-init: TX DISABLE ASSERTED
VCC > 2.97 V
Tx_FAULT
Tx_FAULT
Tx_DISABLE
Tx_DISABLE
TRANSMITTED SIGNAL
TRANSMITTED SIGNAL
t_off
t_init
t_on
INSERTION
t-init: TX DISABLE NEGATED, MODULE HOT PLUGGED
t-off & t-on: TX DISABLE ASSERTED THEN NEGATED
OCCURANCE OF FAULT
OCCURANCE OF FAULT
Tx_FAULT
Tx_FAULT
Tx_DISABLE
Tx_DISABLE
TRANSMITTED SIGNAL
TRANSMITTED SIGNAL
t_reset
t_fault
* CANNOT READ INPUT...
t-fault: TX FAULT ASSERTED, TX SIGNAL NOT RECOVERED
t_init*
t-reset: TX DISABLE ASSERTED THEN NEGATED, TX SIGNAL RECOVERED
OCCURANCE OF FAULT
Tx_FAULT
LOS
TRANSMITTED SIGNAL
t_fault
* SFP SHALL CLEAR Tx_FAULT IN
t_init IF THE FAILURE IS TRANSIENT
t_loss_on
t_reset
t-fault: TX DISABLE ASSERTED THEN NEGATED,
TX SIGNAL NOT RECOVERED
t_init*
t-loss-on & t-loss-off
Figure 5. Transceiver Timing Diagrams (Module Installed except where noted)
13
13
OCCURANCE
OF LOSS
OPTICAL SIGNAL
Tx_DISABLE
t_loss_off
Table 2. EEPROM Serial ID Memory Contents – Conventional SFP Memory (Address A0h)
Address
Hex
0
1
ASCII
Address
Hex
ASCII
Address
Hex
ASCII
Address
03
40
48
H
68
Note 1
96
04
41
46
F
69
Note 1
97
2
07
42
42
B
70
Note 1
98
3
00
43
52
R
71
Note 1
99
4
00
44
2D
-
72
Note 1
100
5
00
45
35
5
73
Note 1
101
6
01
46
37
7
74
Note 1
102
7
20
47
4C
L
75
Note 1
103
8
40
48
35
5
76
Note 1
104
9
0C
49
41
A
77
Note 1
105
10
01
50
50
P
78
Note 1
106
11
01
51
20
79
Note 1
107
12
0C
52
20
80
Note 1
108
13
00
53
20
81
Note 1
109
14
00
54
20
82
Note 1
110
15
00
55
20
83
Note 1
111
16
37
56
20
84
Note 2
112
17
1B
57
20
85
Note 2
113
18
00
58
20
86
Note 2
114
19
00
59
20
87
Note 2
115
20
41
A
60
00
88
Note 2
116
21
47
G
61
00
89
Note 2
117
22
49
I
62
00
90
Note 2
118
23
4C
L
63
Note 3
91
Note 2
119
24
45
E
64
00
92
60
120
25
4E
N
65
1A
93
F0
121
26
54
T
66
00
94
01
122
27
20
67
00
95
Note 3
28
20
124
29
20
125
30
20
126
31
20
127
32
20
33
20
34
20
35
20
36
00
37
Note 4
38
Note 4
39
Note 4
Hex
ASCII
123
Notes:
Notes:
1. Addresses
68-83 specify
the HFBR-57L5AP
ASCII
serial number
and on
willa vary
on basis.
a per unit basis. 2. Addresses 84-91 specify the HFBR-57L5AP
1. Addresses
68-83 specify
the HFBR-57L5AP
ASCII serial
number
and will vary
per unit
ASCII date84-91
codespecify
and will
on a per date
code
Addresses
63aand
95 are
check
sums. Address 63 is the check sum for bytes 0–62 and
2. Addresses
thevary
HFBR-57L5AP
ASCII
datebasis.
code 3.
and
will vary on
per date
code
basis.
address 9563isand
the95
check
sum for
bytes
64–94.
IEEE Organizationally
Unique
Identifier
(OUI)
assigned
is 00-30-D3 (3
3. Addresses
are check
sums.
Address
634.isThe
the check
sum for bytes 0–62
and address
95 is
the check
sumtoforAvago
bytes Technologies
64–94.
bytes
of
hex).
4. The IEEE Organizationally Unique Identifier (OUI) assigned to Agilent Technologies is 00-30-D3 (3 bytes of hex).
14
14
Table 3. Alarms and Warning Values – Enhanced Feature Set Memory (Address A2h)
High Warning
Low Warning
High Alarm
Low Alarm
Real-Time
Monitor
Hex
Real Value
Hex
Real Value
Hex
Real Value
Hex
Real Value
RX OMA
2AF8
1.1 mW
0136
31 µW
FFFF
6.55 mW
0000
0 mW
TX
0F8D
-4 dBm
03E8
-10 dBm
1BA7
-1.5 dBm
01F5
-13 dBm
Ibias
109A
8.5 mA
03E8
2 mA
1388
10 mA
03E8
2 mA
Temp
5500
+85 °C
F600
-10 °C
6400
+100 °C
D800
-40 °C
VCC
8DCC
3.63 V
7404
2.97 V
9858
3.9 V
6978
2.7 V
Writing to Alarm and Warning
Threshold
bytes (Address
0xA2,
Writing
to Alarm
and Warning
Threshold bytes
bytes 0-39):
(Address
0xA2, bytes
0-39):
For a complete
description
of
the aalarms
anddescription
warnings values,
For
complete
of the alarms and warnings
consultconsult
MSA SFF-8472.
values,
MSA SFF-8472. The default setting for the
alarm and warning threshold bytes is ‘non writable.’ By enThe default setting for the alarm
tering a password, however, the alarm and warning threshand warning threshold bytes is
old bytes can be made writable to the customer, enabling
‘non writable.’ By entering a
customization to suit system needs. The password conpassword, however, the alarm
sists of writing the following hex data to bytes 123-126 on
and warning threshold bytes can
page 0xA2: 123 = 0x47, 124 = 0x4F, 125 = 2D, 126 = 0x41.
be made writable to the
Alarm and warning threshold bytes are volatile memory;
customer, enabling
upon power cycles, alarm and warning threshold bytes
customization to suit system
will revert back to initial factory preset values.
needs. The password consists of
writing the following hex data to
bytes 123-126 on page 0xA2: 123
= 0x47, 124 = 0x4F, 125 = 2D,
126 = 0x41. Alarm and warning
threshold bytes are volatile
memory; upon power cycles,
alarm and warning threshold
bytes will revert back to initial
factory preset values.
15
15
AVAGO
HFBR-57L5AP
AGILENT HFBR-57L5AP
850
nmLASER
LASERPROD
PROD
850 nm
21CFR(J) CLASS
CLASS 1
1
21CFR(J)
COUNTRY OF
COUNTRY
OFORIGIN
ORIGINYYWW
YYWW
XXXXXX
XXXXXX
13.8±0.1
[0.541±0.004]
DEVICE SHOWN WITH
DUST CAP AND BAIL
WIRE DELATCH
13.4±0.1
[0.528±0.004]
2.60
[0.10]
55.2±0.2
[2.17±0.01]
FRONT EDGE OF SFP
TRANSCEIVER CAGE
6.25±0.05
[0.246±0.002]
13.0±0.2
[0.512±0.008]
TX
0.7MAX. UNCOMPRESSED
[0.028]
8.5±0.1
[0.335±0.004]
RX
AREA
FOR
PROCESS
PLUG
6.6
[0.261]
13.50
[0.53]
14.8MAX. UNCOMPRESSED
[0.583]
DIMENSIONS ARE IN MILLIMETERS (INCHES)
Figure 6. Module drawing
16
16
X
Y
34.5
10
3x
16.25
MIN. PITCH
7.1
8.58
∅ 0.85 ± 0.05
∅ 0.1 S X Y
A
1
2.5
1
2.5
B
PCB
EDGE
11.08
16.25 14.25
REF .
7.2
10x ∅1.05 ± 0.01
∅ 0.1 L X A S
3.68
5.68
20
PIN 1
2x 1.7
8.48
9.6
4.8
11
10
11.93
SEE DET AIL 1
2.0
11x
11x 2.0
9x 0.95 ± 0.05
∅ 0.1 L X A S
5
26.8
10
3x
3
2
41.3
42.3
3.2
5
0.9
PIN 1
9.6
20x 0.5 ± 0.03
0.06 L A S B S
LEGEND
20
10.53
10.93
0.8
TYP .
11.93
2. THR OUGH HOLES, PLATING OPTIONAL
10
11
3. HATCHED AREA DENOTES COMPONENT
AND TRACE KEEPOUT (EXCEPT
CHASSIS GROUND)
4
2x 1.55 ± 0.05
∅ 0.1 L A S B S
DET AIL 1
Figure 7. SFP host board mechanical layout
17
17
1. PADS AND VIAS ARE CHASSIS GROUND
2 ± 0.005 TYP .
0.06 L A S B S
4. AREA DENOTES COMPONENT
KEEPOUT (TRACES ALLOWED)
DIMENSIONS ARE IN MILLIMETERS
3.5±0.3
[.14±.01]
1.7±0.9
[.07±.04]
41.73±0.5
[1.64±.02]
PCB
AREA
FOR
PROCESS
PLUG
BEZEL
15MAX
.59
Tcase REFERENCE POINT
CAGE
ASSEMBLY
15.25±0.1
[.60±0.004]
12.4REF
10.4±0.1
[.41±0.004]
.49
9.8MAX
.39
1.15REF
.05
BELOW PCB
10REF
.39
TO PCB
16.25±0.1MIN PITCH
[.64±0.004]
0.4±0.1
[.02±0.004]
BELOW PCB
MSA-SPECIFIED BEZEL
DIMENSIONS ARE IN MILLIMETERS [INCHES].
Figure 8. SFP Assembly Drawing
For product information and a complete list of distributors, please go to our web site:
www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies, Limited in the United States and other countries.
Data subject to change. Copyright © 2008 Avago Technologies Limited. All rights reserved. Obsoletes 5988-8537EN
5989-0045EN - February 26, 2008
18