Si9183
Vishay Siliconix
High-Performance, Size Saving 150-mA CMOS LDO Regulator
FEATURES
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Low 135-mV Dropout at 150-mA Load
Guaranteed 150-mA Output Current
300-mA Peak Output Current Capability
Uses Low ESR Ceramic Output Capacitor
Fast Load And Line Transient Response
Low Output Noise
1-mA Maximum Shutdown Current
Built-in Short Circuit And Thermal Protection
Fixed 1.8-V, 2.5-V, 2.8-V, 2.85-V, 3.0-V, 3.3-V, 5.0-V
or Adjustable Output Voltage Options (Version B)
D Thin SOT-23 5-Pin Package
Available
APPLICATIONS
Battery Powered Portable Systems
Cellular Phones
PDAs, Palmtops
Pagers
Post Regulators for Multi-Output Converters
Notebook Computers
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DESCRIPTION
The Si9183 is a high performance yet size saving 150-mA
CMOS LDO (low dropout) voltage regulator. Its ultra low
ground current and dropout voltage prolong battery life in
portable electronics. The device provides LINE/LOAD
transient response and ripple rejection superior to that of
Bipolar or BiCMOS LDO regulators. It is designed to maintain
regulation while delivering 300-mA peak current. The Si9183
drives lower cost ceramic, as well as tantalum, output
capacitors. Stability is guaranteed from maximum load current
down to 0-mA load. An external noise bypass capacitor
connected to the device’s CBP pin will reduce the LDO’s
self-noise for low noise applications. The Si9183 includes a
shutdown feature that allows users to completely disable the
device and save power when no output is required.
The Si9183, in Thin SOT23-5 packaging, is available in two
versions (Version A or B). Version A offers low noise
performance, while Version B features adjustable output
voltage.
The Si9183 is available in both standard and lead (Pb)-free
packages.
TYPICAL APPLICATIONS CIRCUITS
Si9183-A
VIN
1
VIN
VOUT
Si9183-B
5
1 mF
VOUT
2.2 mF
SD
2
GND
3
SD
BP
4
ON
Thin SOT-23, 5-Lead
FIGURE 1. Version A with Low Output Noise
Document Number: 71258
S-51147—Rev. G, 20-Jun-05
1
VIN
VOUT
5
1 mF
SD
0.1 mF
OFF
VIN
VOUT
2.2 mF
2
GND
3
SD
FB
4
ON
OFF
Thin SOT-23, 5-Lead
FIGURE 2. Version B with Adjustable Output
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Si9183
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
Input Voltage, VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.5 V
SD Input Voltage, VSD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to VIN
Output Current, IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . Short Circuit Protected
Output Voltage, VOUT . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to VO(nom) + 0.3 V
Maximum Junction Temperature, TJ(max) . . . . . . . . . . . . . . . . . . . . . . . 150_C
Storage Temperature, TSTG . . . . . . . . . . . . . . . . . . . . . . . . . . −65_C to 125_C
ESD (Human Body Model) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV
Power Dissipation (Package)a, b
5-Pin SOT-23 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 555 mW
Thermal Impedance (QJA)
5-Pin SOT-23 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 180 _C/W
Notes
a. Device mounted with all leads soldered or welded to multi-layer (1S2P)
JEDEC board, horizontal orientation.
b. Derate 5.5 mW/_C above TA = 25_C.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING RANGE
Input Voltage, VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 V to 6 V
Output Voltage, VOUT (Adjustable Version) . . . . . . . . . . . . . . . . . . 1.5 V to 5 V
SD Input Voltage, VSD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to VIN
Operating Ambient Temperature, TA . . . . . . . . . . . . . . . . . . . . −40_C to 85_C
Operating Junction Temperature, TJ . . . . . . . . . . . . . . . . . . . −40_C to 125_C
CIN = 1 mF, COUT = 2.2 mF (ceramic, X5R or X7R type) , CBP = 0.1 mF (ceramic)
COUT Range = 1 mF to 10 mF ("20% tolerance, "20% over temperature; ESR = 0.4 to 4 W at dc to 100 kHz, 0 t0 0.4 W > 100 kHz) )
SPECIFICATIONS (TA = 25_C)
Test Conditions
Unless Otherwise Specified
Parameter
Symbol
Input Voltage Range
VOUT
Feedback Voltage (ADJ version)
Dropout Voltaged
(@VOUT t 2.5 V, VIN w 2 V)
Full
2
6
Full
1.5
5
Room
−1.5
1.5
Full
−2.5
2.5
Room
1.188
Full
1.176
1.252
From VIN = VOUT(nom) + 1 V
to VOUT(nom) + 2 V
Full
−0.18
0.18
From VIN = 5.5 V to 6 V
Full
−0.18
0.18
VOUT = 1.5 V, From VIN = 2.5 V to 3.5 V
Full
−0.18
0.18
VOUT = 5 V, From VIN = 5.5 V to 6 V
Full
−0.18
0.18
IOUT = 10 mA
Room
1
20
Room
135
170
Full
180
220
Room
235
320
1 mA v IOUT v 150 mA
VFB
DVOUT
VIN
100
VOUT(nom)
Line Regulation (ADJ Version)
Dropout Voltaged
@VOUT w 2.5 V)
Minb
Adjustable Version
Output Voltage Accuracy
(Fixed Versions)
Line Regulation (5-V Version)
Tempa
VIN
Output Voltage Range
Line Regulation
(Except 5-V Version)
VIN = VOUT(nom) + 1 V
V, IOUT = 1 mA
A
CIN = 1 mF, COUT = 2.2 mF, VSD = 1.5 V
VIN − VOUT
VIN − VOUT
IOUT = 150 mA
IOUT = 150 mA
Shutdown Supply Current
IGND
Typc
1.215
Full
IOUT = 0 mA
Ground Pin Current
Limits
−40 to 85_C
IOUT = 150 mA
Maxb
1.240
Room
150
Room
500
Full
VSD = 0 V
Full
0.1
1
Room
2
100
Peak Output Current
IO(peak)
VOUT w 0.95 x VOUT(nom), tpw = 2 ms
Room
Output Noise Voltage
eN
2
V
%/V
mV
mA
m
VFB = 1.2 V
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% VO(nom)
O(
)
900
IFB
BW = 50 Hz to 100 kHz
IOUT = 150 mA
V
380
IIN(off)
FB Pin Current
Unit
250
300
w/o CBP
Room
300
CBP = 0.1 mF
Room
100
mA
nA
mA
mV (rms)
Document Number: 71258
S-51147—Rev. G, 20-Jun-05
Si9183
Vishay Siliconix
SPECIFICATIONS (TA = 25_C)
Test Conditions
Unless Otherwise Specified
Parameter
Ripple
pp Rejection
j
Symbol
DVOUT/DVIN
VIN = VOUT(nom) + 1 V, IOUT = 1 mA
CIN = 1 mF, COUT = 2.2 mF, VSD = 1.5 V
IOUT = 150 mA
Limits
−40 to 85_C
Tempa
Minb
Typc
f = 1 kHz
Room
60
f = 10 kHz
Room
40
f = 100 kHz
Room
30
Dynamic Line Regulation
DVO(line)
VIN : VOUT(nom) + 1 V to VOUT(nom) + 2 V
tR/tF = 5 ms, IOUT = 150 mA
Room
10
Dynamic Load Regulation
DVO(load)
IOUT : 1 mA to 150 mA, tR/tF = 2 ms
Room
30
VOUT Turn-On-Time
Turn On Time
tON
VIN = 4.3 V
VOUT = 3.3 V
w/o CBP Cap
Room
5
CBP = 0.1 mF
Room
1000
Maxb
Unit
dB
mV
ms
Thermal Shutdown
Thermal Shutdown Junction Temp
tJ(s/d)
Room
165
Thermal Hysteresis
tHYST
Room
20
Short Circuit Current
ISC
VOUT = 0 V
Room
400
VIH
High = Regulator ON (Rising)
Full
VIL
Low = Regulator OFF (Falling)
Full
IIL
VSD = 0 V, Regulator OFF
Room
0.01
IIH
VSD = 6 V, Regulator ON
Room
1.0
Full
100
_C
mA
Shutdown Input
SD Input Voltage
SD Input Currente
Shutdown Hysteresis
VHYST
1.2
VIN
0.4
V
mA
mV
Notes
a. Room = 25_C, Full = −40 to 85_C.
b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Typical values for dropout voltage at VOUT w 2 V are measured at
VOUT = 2.5 V, while typical values for dropout voltage at VOUT < 2 V are measured at VOUT = 1.8 V.
d. Dropout voltage is defined as the input to output differential voltage at which the output voltage drops 2% below the output voltage measured with a 1-V
differential, provided that VIN does not not drop below 2.0 V.
e. The device’s shutdown pin includes a typical 6-MW internal pull-down resistor connected to ground.
f.
VOUT is defined as the output voltage of the DUT at 1 mA.
Document Number: 71258
S-51147—Rev. G, 20-Jun-05
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Si9183
Vishay Siliconix
TIMING WAVEFORMS
VIN
tON
VNOM
0.95 VNOM
VOUT
FIGURE 3. Timing Diagram for Power-Up
PIN CONFIGURATION
Thin SOT-23, 5-Pin
VIN
1
GND
2
SD
3
5
VOUT
4
BP (Version A)
FB (Version B)
PIN DESCRIPTION
Pin Number
Function
1
VIN
2
GND
3
SD
By applying less than 0.4 V to this pin, the device will be turned off. Connect this pin to VIN if unused.
4 (Version A)
BP
Noise bypass pin. For low noise applications, a 0.1-mF or larger ceramic capacitor should be connected from this pin to
ground.
4 (Version B)
FB
Connect to divided output voltage to adjust the regulation point.
5
VOUT
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4
Name
Input supply pin. Bypass this pin with a 1-mF ceramic or tantalum capacitor to ground.
Ground pin. Local ground for CBP and COUT.
Output voltage. Connect COUT between this pin and ground.
Document Number: 71258
S-51147—Rev. G, 20-Jun-05
Si9183
Vishay Siliconix
ORDERING INFORMATION
Part Number
Lead (Pb)-Free
Part Number
Marking
Voltage
Si9183DT-18-T1
Si9183DT-18-T1—E3
A2LL
1.8 V
Si9183DT-25-T1
Si9183DT-25-T1—E3
A4LL
2.5 V
Si9183DT-28-T1
Si9183DT-28-T1—E3
A5LL
2.8 V
Si9183DT-285-T1
Si9183DT-285-T1—E3
B3LL
2.85 V
Si9183DT-30-T1
Si9183DT-30-T1—E3
A6LL
3.0 V
Si9183DT-33-T1
Si9183DT-33-T1—E3
A7LL
3.3 V
Si9183DT-50-T1
Si9183DT-50-T1—E3
A8LL
5.0 V
Si9183DT-AD-T1
Si9183DT-AD-T1—E3
A9LL
Adjustable
Temperature Range
Package
−40
40 to 85_C
Thin
SOT23-5
NOTE: LL = Lot Code
Eval Kit
Temperature Range
Board Type
Si9183DB
−40 to 85_C
Surface Mount
TYPICAL CHARACTERISTICS (INTERNALLY REGULATED, 25_C UNLESS NOTED)
Dropout Voltage vs. Load Current
300
VIN − VOUT Transfer Characteristic
2.5
VOUT = 2.5 V
RLOAD = 250 W
2.0
RLOAD = 16.6 W
200
V OUT (V)
V DROP (mV)
250
150
1.5
1.0
100
0.5
50
0
0.0
0
60
120
180
240
300
0
1
2
3
ILOAD (mA)
6
IOUT = 300 mA
400
IOUT = 150 mA
IOUT = 75 mA
IOUT = 10 mA
IOUT = 0 mA
25
50
75
100
Junction Temperature (_C)
Document Number: 71258
S-51147—Rev. G, 20-Jun-05
5
Dropout Voltage vs. VOUT
500
125
150
Dropout Voltage (mV)
V DROP (mV)
Dropout Voltage vs. Temperature
375
350
VOUT = 2.5 V
325
300
275
250
225
200
175
150
125
100
75
50
25
0
−50 −25
0
4
VIN (V)
300
IOUT = 300 mA
200
IOUT = 150 mA
IOUT = 75 mA
100
IOUT = 10 mA
0
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
VOUT
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Si9183
Vishay Siliconix
TYPICAL CHARACTERISTICS (INTERNALLY REGULATED, 25_C UNLESS NOTED)
Normalized Output Voltage vs. Load Current
0.30
VIN = VOUT(nom) + 1 V
0.15
IOUT = 0 mA
−0.2
0.00
−0.4
V OUT (%)
Output Voltage (%)
Normalized VOUT vs. Temperature
−0.0
−0.15
−0.30
IOUT = 150 mA
−0.8
−0.45
−1.0
−0.60
VIN = VOUT(nom) + 1 V
−0.75
0
25
50
75
100
125
−1.2
−40
150
−15
10
Load Current (mA)
VOUT = 2.5 V
VIN = 3.5 V
400
35
60
85
Ambient Temperature (_C)
GND Current vs. Load Current
500
No Load GND Pin Current vs. Input Voltage
300
250
85_C
200
−40_C
300
I GND ( mA)
I GND ( mA)
IOUT = 75 mA
−0.6
200
85_C
150
−40_C
100
100
50
0
0
0
25
50
75
100
125
150
2
3
4
Load Current (mA)
1.5
Shutdown Pin Input Current vs. Temperature
1.4
1.3
1.5
1.4
VOUT = 2.5 V
VSD = 6.5 V
1.3
VIL, VIH (V)
I IH
1.0
0.9
0.8
VOUT = 2.5 V
1.0
0.9
VIH
0.8
0.7
0.7
0.6
0.6
0.5
−15
10
35
Ambient Temperature
6
Shutdown Threshold vs. Temperature
1.1
1.1
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1.2
1.2
0.5
−40
5
Input Voltage (V)
60
85
0.4
−40
VIL
−15
10
35
60
85
Ambient Temperature
Document Number: 71258
S-51147—Rev. G, 20-Jun-05
Si9183
Vishay Siliconix
TYPICAL CHARACTERISTICS (INTERNALLY REGULATED, 25_C UNLESS NOTED)
ISC vs. Temperature
0.75
VOUT = 2.5 V
0.65
−20
0.55
Gain (dB)
I SC (A)
Power Supply Rejection
0
0.45
CIN = 1 mF
COUT = 2.2 mF
ILOAD = 150 mA
−40
−60
0.35
0.25
−40
−15
10
35
60
85
−80
10
100
Ambient Temperature
1K
10 K
100 K
1M
Frequency (Hz)
TYPICAL WAVEFORMS
Turn-On Delay
Turn-Off Delay
SD 2 V/div
SD 2 V/div
VOUT 2 V/div
VOUT 2 V/div
10.00 ms/div
5.00 ms/div
VIN = 4.2 V
VOUT = 3.3 V
CBP = 0.1 mF
ILOAD = 350 mA
Output Noise
VIN = 4.2 V
VOUT = 3.3 V
CBP = 0.1 mF
ILOAD = 350 mA
Noise Spectrum
10.0
100 mV/div
mVń ǸHz
0.01
1 ms/div
Document Number: 71258
S-51147—Rev. G, 20-Jun-05
VIN = 4 V
VOUT = 3 V
IOUT = 150 mA
CIN = 1 mF
COUT = 2.2 mF
CBP = 0.1 mF
BW = 10 Hz to 1 MHz
100 Hz
VIN = 4 V
VOUT = 3
IOUT = 150 mA
CIN = 1 mF
COUT = 2.2 mF
CBP = 0.1 mF
1 MHz
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Si9183
Vishay Siliconix
TYPICAL WAVEFORMS
Load Transient Response-1
Load Transient Response-2
VOUT
10 mV/div
VOUT
10 mV/div
ILOAD
100 mA/div
ILOAD
100 mA/div
M 5.00 ms
VOUT = 3.0 V
COUT = 2.2 mF
ILOAD = 1 to 150 mA
trise = 2 msec
M 5.00 ms
VOUT = 3.0 V
COUT = 2.2 mF
ILOAD = 150 to 1 mA
tfall = 2 msec
Load Transient Response-3
Load Transient Response-4
VOUT
10 mV/div
VOUT
10 mV/div
ILOAD
100 mA/div
ILOAD
100 mA/div
M 5.00 ms
VOUT = 3.0 V
COUT = 1.0 mF
ILOAD = 1 to 150 mA
trise = 2 msec
M 5.00 ms
VOUT = 3.0 V
COUT = 1.0 mF
ILOAD = 150 to 1 mA
tfall = 2 msec
Line Transient Response-1
VIN
1 V/div
VIN
1 V/div
VOUT
10 mV/div
VOUT
10 mV/div
VOUT = 3.0 V
ILOAD = 150 mA
VIN = 4 to 5 V
COUT = 2.2 mF
trise = 5 msec
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Line Transient Response-2
M 20.0 ms
VOUT = 3.0 V
ILOAD = 150 mA
VIN = 5 to 4 V
COUT = 2.2 mF
tfall = 5 msec
M 20.0 ms
Document Number: 71258
S-51147—Rev. G, 20-Jun-05
Si9183
Vishay Siliconix
BLOCK DIAGRAMS
4
BP
Switches shown for device in normal operating mode (SD = HIGH)
1
VIN
CIN
1.0 mF
3
SD
ON
+
−
RFB2
OFF
5
6 MW
VOUT
COUT
2.2 mF
RFB1
+
GND
1.215 V
VREF
−
2
FIGURE 4. 150-mA CMOS LDO Regulator (Fixed Output)
4
FB
1
VIN
CIN
1.0 mF
R2
VFB
3
SD
R1
ON
+
−
OFF
5
6 MW
COUT
2.2 mF
+
GND
2
−
VOUT
1.215 V
VREF
FIGURE 5. 150-mA CMOS LDO Regulator (Adjustable Output)
Document Number: 71258
S-51147—Rev. G, 20-Jun-05
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Si9183
Vishay Siliconix
DETAILED DESCRIPTION
The Si9183 is a low drop out, low quiescent current, linear
regulator family with very fast transient response. It is primarily
designed for battery powered applications where battery run
time is at a premium. The low quiescent current allows
extended standby time while low drop out voltage enables the
system to fully utilize battery power before recharge. The
Si9183 is a very fast regulator with bandwidth exceeding
50 kHz while maintaining low quiescent current at light load
conditions. With this bandwidth, the Si9183 is one of the
fastest LDO available today. The Si9183 is stable with one of
any output capacitor types from 1 mF to 10.0 mF. However,
X5R or X7R ceramic capacitors are recommended for best
output noise and transient performance.
VIN
VIN is the input supply pin. The bypass capacitor for this pin
is not critical as long as the input supply has low enough source
impedance. For practical circuits, a 1.0-mF or larger ceramic
capacitor is recommended. When the source impedance is
not low enough and/or the source is several inches from the
Si9183, then a larger input bypass capacitor is needed. It is
required that the equivalent impedance (source impedance,
wire, and trace impedance in parallel with input bypass
capacitor impedance) must be smaller than the input
impedance of the Si9183 for stable operation. When the
source impedance, wire, and trace impedance are unknown,
it is recommended that an input bypass capacitor be used of
a value that is equal to or greater than the output capacitor.
VOUT
VOUT is the output voltage of the regulator. Connect a bypass
capacitor from VOUT to ground. The output capacitor can be
any value from 1.0 mF to 10.0 mF. A ceramic capacitor with
X5R or X7R dielectric type is recommended for best output
noise, line transient, and load transient performance.
GND
Ground is the common ground connection for VIN and VOUT.
It is also the local ground connection for CBP, ADJ, and SD.
ADJ
For the adjustable output version, use a resistor divider R1 and
R2, connect R1 from VOUT to ADJ and R2 from ADJ to ground.
R2 should be in the 25-kW to 150-kW range for low power
consumption, while maintaining adequate noise immunity.
The formula below calculates the value of R1, given the
desired output voltage and the R2 value,
R1 +
ǒV OUT * VADJǓR2
VADJ
VADJ is nominally 1.215 V.
(1)
SHUTDOWN (SD)
SD controls the turning on and off of the Si9183. VOUT is
guaranteed to be on when the SD pin voltage equals or is
greater than 1.2 V. VOUT is guaranteed to be off when theSD
pin voltage equals or is less than 0.4 V. During shutdown
mode, the Si9183 will draw less than 1-mA current from the
source. To automatically turn on VOUT whenever the input is
applied, tie the SD pin to VIN.
CBP
For low noise application, connect a high frequency ceramic
capacitor from CBP to ground. A 0.01-mF or a 0.1-mF X5R or
X7R is recommended.
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and
Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see
http://www.vishay.com/ppg?71258.
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Document Number: 71258
S-51147—Rev. G, 20-Jun-05
Legal Disclaimer Notice
Vishay
Notice
Specifications of the products displayed herein are subject to change without notice. Vishay Intertechnology, Inc.,
or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies.
Information contained herein is intended to provide a product description only. No license, express or implied, by
estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Vishay's
terms and conditions of sale for such products, Vishay assumes no liability whatsoever, and disclaims any express
or implied warranty, relating to sale and/or use of Vishay products including liability or warranties relating to fitness
for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications.
Customers using or selling these products for use in such applications do so at their own risk and agree to fully
indemnify Vishay for any damages resulting from such improper use or sale.
Document Number: 91000
Revision: 08-Apr-05
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