Revised March 2005
74ALVC2245
Low Voltage Bidirectional Transceiver
with 3.6V Tolerant Inputs and Outputs
and 26: Series Resistors in B Outputs
General Description
Features
The ALVC2245 contains eight non-inverting bidirectional
buffers with 3-STATE outputs and is intended for bus oriented applications. The T/R input determines the direction
of data flow. The OE input disables both the A and B ports
by placing them in a high impedance state.
■ 1.65V to 3.6V VCC supply operation
The 74ALVC2245 is designed for low voltage (1.65V to
3.6V) VCC applications with I/O compatibility up to 3.6V.
The ALVC2245 is also designed with 26: series resistance
in the B Port outputs. This design reduces line noise in
applications such as memory address drivers, clock drivers, and bus transceivers transmitters
The 74ALVC2245 is fabricated with an advanced CMOS
technology to achieve high-speed operation while maintaining low CMOS power dissipation.
■ Supports Live Insertion and Withdrawal (Note 1)
■ 3.6V tolerant inputs and outputs
■ 26: series resistors in B Port outputs
■ Power-off high impedance inputs and outputs
■ tPD (A to B)
4.9 ns max for 3.0V to 3.6V VCC
6.1 ns max for 2.3V to 2.7V VCC
9.8 ns max for 1.65V to 1.95V VCC
■ Uses patented Quiet Series¥ noise/EMI reduction
circuitry
■ Latchup conforms to JEDEC JED78
■ ESD performance:
Human body model ! 2000V
Machine model ! 200V
Note 1: To ensure the high impedance state during power up and power
down, OEn should be tied to VCC through a pull up resistor. The minimum
value of the resistor is determined by the current sourcing capability of the
driver.
Ordering Code:
Order Number
Package Number
74ALVC2245WM
M20B
74ALVC2245MTC
MTC20
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Pin Descriptions
Pin Names
Description
OE
Output Enable Input (Active LOW)
T/R
Transmit/Receive Input
A0–A7
Side A Inputs or 3-STATE Outputs
B0–B7
Side B Inputs or 3-STATE Outputs
Quiet Series¥ is a trademark of Fairchild Semiconductor Corporation.
© 2005 Fairchild Semiconductor Corporation
DS500717
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74ALVC2245 Low Voltage Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs and 26: Series
Resistors in B Outputs
February 2002
74ALVC2245
Connection Diagram
Truth Table
Inputs
Outputs
OE
T/R
L
L
Bus B0–B7 Data to Bus A0–A7
L
H
Bus A0–A7 Data to Bus B0–B7
H
X
HIGH Z State on A0–A7, B0–B7 (Note 2)
H HIGH Voltage Level
L LOW Voltage Level
X Immaterial
Z High Impedance
Note 2: Unused bus terminals during HIGH Z State must be held HIGH or
LOW.
Logic Diagram
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2
Supply Voltage (VCC )
DC Input Voltage (VI)
Output Voltage (VO) (Note 4)
Recommended Operating
Conditions (Note 5)
0.5V to 4.6V
0.5V to 4.6V
0.5V to VCC 0.5V
Power Supply
Operating
DC Input Diode Current (IIK)
VI 0V
0V to VCC
50 mA
Output Voltage (VO)
0V to VCC
50 mA
Minimum Input Edge Rate ('t/'V)
DC Output Diode Current (IOK)
Free Air Operating Temperature (TA)
VO 0V
DC Output Source/Sink Current
VIN
r50 mA
(IOH/IOL)
Supply Pin (ICC or GND)
0.8V to 2.0V, VCC
40qC to 85qC
3.0V
10 ns/V
Note 3: The Absolute Maximum Ratings are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation.
DC VCC or GND Current per
Storage Temperature Range (TSTG)
1.65V to 3.6V
Input Voltage
r100 mA
65qC to 150qC
Note 4: IO Absolute Maximum Rating must be observed.
Note 5: Floating or unused control inputs must be held HIGH or LOW.
DC Electrical Characteristics
Symbol
VIH
VIL
VOH
VOL
Parameter
Conditions
HIGH Level Input Voltage
LOW Level Input Voltage
VCC
(V)
Min
1.65 - 1.95
0.65 x VCC
2.3 - 2.7
1.7
2.7 - 3.6
2.0
Max
V
1.65 - 1.95
0.35 x VCC
2.3 - 2.7
0.7
2.7 - 3.6
0.8
HIGH Level Output Voltage
IOH
100 PA
A Outputs
IOH
4 mA
1.65
1.2
IOH
6 mA
2.3
2.0
IOH
12 mA
2.3
1.7
2.7
2.2
3.0
2.4
1.65 - 3.6
Units
V
VCC - 0.2
IOH
24 mA
3.0
2
HIGH Level Output Voltage
IOH
100 PA
1.65 - 3.6
VCC - 0.2
B Outputs
IOH
2 mA
1.65
1.2
IOH
4 mA
2.3
1.9
IOH
6 mA
2.3
1.7
3.0
2.4
V
IOH
8 mA
2.7
2
IOH
12 mA
3.0
2
LOW Level Output Voltage
IOL
100 PA
1.65 - 3.6
0.2
A Outputs
IOL
4 mA
1.65
0.45
IOL
6 mA
2.3
0.4
IOL
12 mA
2.3
0.7
2.7
0.4
IOL
24 mA
3.0
0.55
LOW Level Output Voltage
IOL
100 PA
1.65 - 3.6
0.2
B Outputs
IOL
2 mA
1.65
0.45
IOL
4 mA
2.3
0.4
IOL
6 mA
2.3
0.55
3.0
0.55
IOL
8 mA
2.7
0.6
IOL
12 mA
3.0
0.8
1.65 - 3.6
r5.0
PA
3.6
40
PA
II
Input Leakage Current
0 d VI d 3.6V
ICC
Quiescent Supply Current
VI
V CC or GND, IO
3
0
V
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74ALVC2245
Absolute Maximum Ratings(Note 3)
74ALVC2245
DC Electrical Characteristics
Symbol
(Continued)
Parameter
VCC
Conditions
Min
Max
Units
750
PA
(V)
'ICC
Increase in ICC per Input
VIH
VCC 0.6V
2.7 - 3.6
AC Electrical Characteristics
TA
Symbol
CL
Parameter
VCC
tPHL, tPLH
40qC to 85qC, RL
50 pF
3.3V r 0.3V
VCC
2.7V
VCC
500:
CL
30 pF
2.5 r 0.2V
VCC
1.8V r 0.15V
Min
Max
Min
Max
Min
Max
Min
Max
1.1
4.9
1.3
6.1
0.8
5.6
1.5
9.8
1.1
4.0
1.3
4.7
0.8
4.2
1.5
8.4
1.1
5.5
1.3
7.1
0.8
6.6
1.5
9.8
1.1
5.0
1.3
6.1
0.8
5.6
1.5
9.8
1.1
4.7
1.3
5.2
0.8
4.7
1.5
8.5
1.1
4.1
1.3
4.5
0.8
4.0
1.5
7.2
Units
Propagation Delay
A to B
ns
Propagation Delay
B to A
tPZL, tPZH
Output Enable Time
A to B
ns
Output Enable Time
B to A
tPLZ, tPHZ
Output Disable Time
A to B
ns
Output Disable Time
B to A
Capacitance
Symbol
Parameter
Conditions
CIN
Input Capacitance
VI
CIO
Input, Output Capacitance
VO
CPD
Power Dissipation Capacitance
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Outputs Enabled f
0V or VCC
0V or VCC
10 MHz, CL
4
50 pF
TA
25qC
Units
VCC
Typical
3.3
6
pF
3.3
7
pF
3.3
20
2.5
20
pF
TABLE 1. Values for Figure 1
TEST
SWITCH
tPLH, tPHL
Open
tPZL, tPLZ
VL
tPZH, tPHZ
GND
FIGURE 1. AC Test Circuit
TABLE 2. Variable Matrix
(Input Characteristics: f 1MHz; tr tf 2ns; ZO
Symbol
50:)
VCC
3.3V r 0.3V
2.7V
2.5 r 0.2V
1.8V r 0.15V
Vmi
1.5V
1.5V
VCC/2
VCC/2
Vmo
1.5V
1.5V
VCC/2
VCC/2
VX
VOL 0.3V
VOL 0.3V
VOL 0.15V
VOL 0.15V
VY
VOH 0.3V
VOH 0.3V
VOH 0.15V
VOH 0.15V
VL
6V
6V
VCC*2
VCC*2
FIGURE 2. Waveform for Inverting and Non-inverting Functions
FIGURE 3. 3-STATE Output High Enable and Disable Times for Low Voltage Logic
FIGURE 4. 3-STATE Output Low Enable and Disable Times for Low Voltage Logic
5
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74ALVC2245
AC Loading and Waveforms
74ALVC2245
Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Package Number M20B
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6
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC20
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
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74ALVC2245 Low Voltage Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs and 26: Series
Resistors in B Outputs
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)