Revised June 2005 74LCXZ162244 Low Voltage 16-Bit Buffer/Line Driver with 5V Tolerant Inputs/Outputs and 26: Series Resistors in the Outputs General Description Features The LCXZ162244 contains sixteen non-inverting buffers with 3-STATE outputs designed to be employed as a memory and address driver, clock driver, or bus oriented transmitter/receiver. The device is nibble controlled. Each nibble has separate 3-STATE control inputs which can be shorted together for full 16-bit operation. When VCC is between 0 and 1.5V, the LCXZ162244 is in the high impedance state during power up or power down. this places the outputs in the high impedance (Z) state preventing intermittent low impedance loading or glitching in bus oriented applications. ■ 5V tolerant inputs and outputs The LCXZ162244 is designed for low voltage (2.7V or 3.3V) VCC applications with capability of interfacing to a 5V signal environment. ■ ESD performance: In addition the outputs include 26: (nominal) series resistors to reduce overshoot and undershoot and are designed to sink/source 12 mA at VCC 3.0V. ■ Guaranteed power up/down high impedance ■ Supports live insertion/withdrawal ■ Outputs have equivalent 26: series resistors ■ 2.7V–3.6V VCC specifications provided ■ 5.3 ns tPD max (VCC 3.0V), 20 PA ICC max ■ r12 mA output drive (VCC 3.0V) ■ Implements patented noise/EMI reduction circuitry ■ Latch-up performance exceeds 500 mA Human body model ! 2000V Machine model ! 200V The LCXZ162244 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation. Ordering Code: Order Number Package Package Description Number 74LCXZ162244MEA MS48A 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide [TUBES] 74LCXZ162244MEX (Note 1) MS48A 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide [TAPE and REEL] 74LCXZ162244MTD MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide [TUBES] 74LCXZ162244MTX (Note 1) MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide [TAPE and REEL] Note 1: Use this Order Number to receive devices in Tape and Reel. © 2005 Fairchild Semiconductor Corporation DS500251 www.fairchildsemi.com 74LCXZ162244 Low Voltage 16-Bit Buffer/Line Driver with 5V Tolerant Inputs/Outputs and 26: Series Resistors in the Outputs September 2000 74LCXZ162244 Connection Diagram Logic Symbol Pin Descriptions Pin Names Description OEn Output Enable Input (Active LOW) I0–I15 Inputs O0–O15 Outputs Truth Tables Inputs Outputs Inputs Outputs OE1 I0–I3 O0–O3 OE3 I8–I11 L L L L L L L H H L H H H X Z H X Z Inputs OE2 Outputs I4–I7 Inputs O4–O7 OE4 O8–O11 Outputs I12–I15 O12–O15 L L L L L L L H H L H H H X Z H X Z H HIGH Voltage Level L LOW Voltage Level X Immaterial Z High Impedance Functional Description Logic Diagram The LCXZ162244 contains sixteen non-inverting buffers with 3-STATE standard outputs. The device is nibble (4 bits) controlled with each nibble functioning identically, but independent of the other. The control pins can be shorted together to obtain full 16-bit operation. The 3-STATE outputs are controlled by an Output Enable (OEn) input for each nibble. When OEn is LOW, the outputs are in 2-state mode. When OEn is HIGH, the outputs are in the high impedance mode, but this does not interfere with entering new data into the inputs. www.fairchildsemi.com 2 Symbol Parameter VCC Supply Voltage VI DC Input Voltage VO DC Output Voltage IIK DC Input Diode Current IOK DC Output Diode Current Value IO DC Output Source/Sink Current ICC DC Supply Current per Supply Pin IGND DC Ground Current per Ground Pin TSTG Storage Temperature Conditions 0.5 to 7.0 0.5 to 7.0 0.5 to 7.0 0.5 to VCC 0.5 50 50 50 r50 r100 r100 65 to 150 Units V V Output in 3-STATE or VCC 0–1.5V Output in HIGH or LOW State (Note 3) VI GND V mA VO GND mA VO ! VCC mA mA mA qC Recommended Operating Conditions (Note 4) Symbol Parameter VCC Supply Voltage VI Input Voltage VO Output Voltage IOH/IOL Min Max 2.7 3.6 V 0 5.5 V HIGH or LOW State 0 VCC 3-STATE 0 5.5 Operating Output Current TA Free-Air Operating Temperature 't/'V Input Edge Rate, VIN 0.8V–2.0V, VCC VCC 3.0V 3.6V VCC 2.7V 3.0V r12 r8 Units V mA 40 85 qC 0 10 ns/V 3.0V Note 2: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Note 3: IO Absolute Maximum Rating must be observed. Note 4: Unused inputs must be held HIGH or LOW. They may not float. DC Electrical Characteristics Symbol Parameter Conditions VCC 2.0 VIH HIGH Level Input Voltage 2.7 3.6 LOW Level Input Voltage 2.7 3.6 VOH HIGH Level Output Voltage LOW Level Output Voltage IOH 100 PA 2.7 3.6 VCC 0.2 4 mA 2.7 2.2 IOH 6 mA 3.0 2.4 IOH 8 mA 2.7 12 mA 3.0 100 PA 2.7 3.6 0.2 IOL 4 mA 2.7 0.4 IOL 6 mA 3.0 0.55 IOL 8 mA 2.7 0.6 IOL 12 mA IOZ 3-STATE Output Leakage 0 d VO d 5.5V VI V IH or VIL IOFF Power-Off Leakage Current VI or VO IPU/PD Power Up/Down VO 0.5V to VCC 5.5V 3-STATE Output Current VI GND or VCC Quiescent Supply Current VI V CC or GND 3.6V d VI, VO d 5.5V (Note 5) Increase in ICC per Input VIH VCC 0.6V 3 V V IOL 0 d VI d 5.5V 'ICC V IOH Input Leakage Current Units Max 0.8 IOH II ICC 40qC to 85qC Min VIL VOL TA (V) 2.0 V 3.0 0.8 2.7 3.6 r5.0 PA 2.7 3.6 r5.0 PA 0 10 PA 0 1.5 r5.0 PA 2.7 3.6 225 2.7 3.6 r225 2.7 3.6 500 PA PA www.fairchildsemi.com 74LCXZ162244 Absolute Maximum Ratings(Note 2) 74LCXZ162244 DC Electrical Characteristics (Continued) Note 5: Outputs disabled or 3-STATE only. AC Electrical Characteristics 40qC to 85qC, RL TA Symbol VCC Parameter 3.3V r 0.3V CL 50 pF 500 : VCC CL 2.7V Units 50 pF Min Max Min tPHL Propagation Delay 1.0 5.3 1.0 6.0 tPLH Data to Output 1.0 5.3 1.0 6.0 tPZL Output Enable Time 1.0 6.3 1.0 7.1 1.0 6.3 1.0 7.1 1.0 5.4 1.0 5.7 1.0 5.4 1.0 5.7 tPZH tPLZ Output Disable Time tPHZ tOSHL Output to Output Skew (Note 6) Max 1.0 tOSLH ns ns ns ns 1.0 Note 6: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH). Parameter guaranteed by design. Dynamic Switching Characteristics Symbol Parameter VCC Conditions (V) TA 25qC Units Typical VOLP Quiet Output Dynamic Peak VOL CL 50 pF, VIH 3.3V, VIL 0V 3.3 0.8 V VOLV Quiet Output Dynamic Valley VOL CL 50 pF, VIH 3.3V, VIL 0V 3.3 0.8 V Typical Units 7 pF 8 pF 20 pF Capacitance Symbol Parameter Conditions CIN Input Capacitance VCC Open, VI COUT Output Capacitance VCC 3.3V, VI 0V or VCC CPD Power Dissipation Capacitance VCC 3.3V, VI 0V or VCC, f www.fairchildsemi.com 4 0V or VCC 10 MHz 74LCXZ162244 AC LOADING and WAVEFORMS Generic for LCX Family FIGURE 1. AC Test Circuit (CL includes probe and jig capacitance) CL VI 6V for VCC 3.3V, 2.7V VCC * 2 for VCC 50 pF 2.5V 30 pF Waveform for Inverting and Non-Inverting Functions 3-STATE Output High Enable and Disable Times for Logic Propagation Delay. Pulse Width and trec Waveforms Setup Time, Hold Time and Recovery Time for Logic trise and tfall 3-STATE Output Low Enable and Disable Times for Logic FIGURE 2. Waveforms (Input Characteristics; f =1MHz, tR = tF = 3ns) Symbol VCC 3.3V r 0.3V 2.7V Vmi 1.5V 1.5V Vmo 1.5V 1.5V Vx VOL 0.3V VOL 0.3V Vy VOH 0.3V VOH 0.3V 5 www.fairchildsemi.com 74LCXZ162244 Schematic Diagram Generic for LCX Family www.fairchildsemi.com 6 74LCXZ162244 Physical Dimensions inches (millimeters) unless otherwise noted 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide Package Number MS48A 7 www.fairchildsemi.com 74LCXZ162244 Low Voltage 16-Bit Buffer/Line Driver with 5V Tolerant Inputs/Outputs and 26: Series Resistors in the Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Package Number MTD48 Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com www.fairchildsemi.com 8