PD - 95332B IRF2804PbF IRF2804SPbF IRF2804LPbF Features l l l l l l HEXFET® Power MOSFET Advanced Process Technology Ultra Low On-Resistance 175°C Operating Temperature Fast Switching Repetitive Avalanche Allowed up to Tjmax Lead-Free D VDSS = 40V RDS(on) = 2.0mΩ G Description ID = 75A S This HEXFET® Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this design are a 175°C junction operating temperature, fast switching speed and improved repetitive avalanche rating. These features combine to make this design an extremely efficient and reliable device for use in a wide variety of other applications. TO-220AB IRF2804PbF D2Pak IRF2804SPbF TO-262 IRF2804LPbF Absolute Maximum Ratings Parameter Max. Units ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited) 270 A ID @ TC = 100°C Continuous Drain Current, VGS @ 10V (See Fig. 9) 190 ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Package Limited) IDM Pulsed Drain Current Maximum Power Dissipation 1080 300 W 2.0 ± 20 W/°C V 540 mJ EAS (tested) Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy (Thermally Limited) Single Pulse Avalanche Energy Tested Value PD @TC = 25°C VGS EAS i c IAR Avalanche Current EAR Repetitive Avalanche Energy TJ Operating Junction and TSTG Storage Temperature Range d h Soldering Temperature, for 10 seconds Mounting torque, 6-32 or M3 screw Thermal Resistance Parameter RθJC RθCS Junction-to-Case Case-to-Sink, Flat, Greased Surface RθJA Junction-to-Ambient RθJA 75 c Junction-to-Ambient (PCB Mount, steady state)j 1160 See Fig.12a,12b,15,16 A mJ °C -55 to + 175 300 (1.6mm from case ) 10 lbf•in (1.1N•m) Typ. Max. Units ––– °C/W 0.50 0.50 ––– ––– 62 ––– 40 l HEXFET® is a registered trademark of International Rectifier. www.irf.com 1 05/12/10 IRF2804/S/LPbF Static @ TJ = 25°C (unless otherwise specified) Parameter V(BR)DSS ∆ΒVDSS/∆TJ RDS(on) SMD RDS(on) TO-220 VGS(th) Min. Typ. Max. Units Qg Qgs Qgd td(on) tr td(off) tf LD Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance 40 ––– ––– ––– 2.0 130 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– 0.031 1.5 1.8 ––– ––– ––– ––– ––– ––– 160 41 66 13 120 130 130 4.5 ––– ––– 2.0 2.3 4.0 ––– 20 250 200 -200 240 62 99 ––– ––– ––– ––– ––– LS Internal Source Inductance ––– 7.5 ––– Ciss Coss Crss Coss Coss Coss eff. Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance ––– ––– ––– ––– ––– ––– 6450 1690 840 5350 1520 2210 ––– ––– ––– ––– ––– ––– gfs IDSS IGSS Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current f f f f 6mm (0.25in.) from package pF Diode Characteristics Parameter Min. Typ. Max. Units IS Continuous Source Current ––– ––– 270 ISM (Body Diode) Pulsed Source Current ––– ––– 1080 VSD trr Qrr ton (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time ––– ––– ––– ––– 56 67 1.3 84 100 c G S and center of die contact VGS = 0V VDS = 25V ƒ = 1.0MHz, See Fig. 5 VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz VGS = 0V, VDS = 32V, ƒ = 1.0MHz VGS = 0V, VDS = 0V to 32V Conditions MOSFET symbol A V ns nC D showing the integral reverse G p-n junction diode. TJ = 25°C, IS = 75A, VGS = 0V TJ = 25°C, IF = 75A, VDD = 20V di/dt = 100A/µs f f S Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) Notes: Repetitive rating; pulse width limited by max. junction temperature. (See fig. 11). Limited by TJmax, starting TJ = 25°C, L=0.24mH, RG = 25Ω, IAS = 75A, VGS =10V. Part not recommended for use above this value. ISD ≤ 75A, di/dt ≤ 220A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C. Pulse width ≤ 1.0ms; duty cycle ≤ 2%. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS. 2 Conditions V VGS = 0V, ID = 250µA V/°C Reference to 25°C, ID = 1mA mΩ VGS = 10V, ID = 75A VGS = 10V, ID = 75A V VDS = VGS, ID = 250µA S VDS = 10V, ID = 75A µA VDS = 40V, VGS = 0V VDS = 40V, VGS = 0V, TJ = 125°C nA VGS = 20V VGS = -20V nC ID = 75A VDS = 32V VGS = 10V ns VDD = 20V ID = 75A RG = 2.5Ω VGS = 10V D nH Between lead, Limited by T Jmax , see Fig.12a, 12b, 15, 16 for typical repetitive avalanche performance. This value determined from sample failure population. 100% tested to this value in production. This is applied to D 2Pak, when mounted on 1" square PCB ( FR-4 or G-10 Material ). For recommended footprint and soldering techniques refer to application note #AN-994. Max R DS(on) for D2Pak and TO-262 (SMD) devices. TO-220 device will have an Rth value of 0.45°C/W. www.irf.com IRF2804/S/LPbF 10000 10000 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 1000 TOP TOP ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) TOP 100 10 4.5V 1000 15V 15V 10V 10V 8.0V 8.0V 7.0V 7.0V 6.0V 6.0V 5.5V 5.5V 5.0V BOTTOM 5.0V 4.5V BOTTOM 4.5V 100 4.5V 20µs PULSE WIDTH Tj = 25°C 1 20µs PULSE WIDTH Tj = 175°C 10 0.1 1 10 100 0.1 VDS, Drain-to-Source Voltage (V) 1 10 100 VDS, Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 1000 300 G fs , Forward Transconductance ( S) ID, Drain-to-Source Current (Α) VGS V GS T J = 175°C 100 T J = 25°C 10 VDS = 10V 20µs PULSE WIDTH 1 4.0 5.0 6.0 7.0 8.0 VGS, Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics www.irf.com 250 T J = 25°C 200 T J = 175°C 150 100 50 VDS = 10V 20µs PULSE WIDTH 0 9.0 0 40 80 120 160 200 ID, Drain-to-Source Current (A) Fig 4. Typical Forward Transconductance vs. Drain Current 3 IRF2804/S/LPbF 12000 20 10000 VGS , Gate-to-Source Voltage (V) VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, Cds SHORTED Crss = Cgd C, Capacitance (pF) Coss = Cds + Cgd 8000 Ciss 6000 4000 Coss 2000 VDS= 32V VDS= 20V VDS= 8.0V 16 12 8 4 Crss 0 0 1 ID= 75A 10 0 100 120 160 200 240 Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage Fig 5. Typical Capacitance vs. Drain-to-Source Voltage 10000 ID, Drain-to-Source Current (A) 1000.0 ISD, Reverse Drain Current (A) 80 Q G Total Gate Charge (nC) VDS, Drain-to-Source Voltage (V) T J = 175°C 100.0 10.0 1.0 T J = 25°C VGS = 0V 0.1 0.2 0.6 1.0 1.4 1.8 VSD, Source-toDrain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage 4 40 OPERATION IN THIS AREA LIMITED BY R DS(on) 1000 100µsec 1msec 100 10msec 10 Tc = 25°C Tj = 175°C Single Pulse 1 2.2 0 1 10 100 VDS, Drain-to-Source Voltage (V) Fig 8. Maximum Safe Operating Area www.irf.com IRF2804/S/LPbF 2.0 200 150 100 50 0 25 50 75 100 125 150 ID = 75A VGS = 10V 1.5 (Normalized) Limited By Package 250 ID, Drain Current (A) RDS(on) , Drain-to-Source On Resistance 300 1.0 0.5 -60 -40 -20 175 0 20 40 60 80 100 120 140 160 180 TJ , Junction Temperature (°C) T C , Case Temperature (°C) Fig 10. Normalized On-Resistance vs. Temperature Fig 9. Maximum Drain Current vs. Case Temperature 1 Thermal Response ( Z thJC ) D = 0.50 0.1 0.20 0.10 0.05 0.02 0.01 0.01 0.001 SINGLE PULSE ( THERMAL RESPONSE ) 0.0001 1E-008 1E-007 1E-006 1E-005 Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc 0.0001 0.001 0.01 0.1 1 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5 IRF2804/S/LPbF 15V VGS 20V + V - DD IAS A 0.01Ω tp EAS , Single Pulse Avalanche Energy (mJ) D.U.T RG ID 31A 53A BOTTOM 75A TOP 1000 DRIVER L VDS 1200 Fig 12a. Unclamped Inductive Test Circuit V(BR)DSS tp 800 600 400 200 0 25 50 75 100 125 150 175 Starting T J , Junction Temperature (°C) I AS Fig 12c. Maximum Avalanche Energy vs. Drain Current Fig 12b. Unclamped Inductive Waveforms QG 10 V QGS QGD VG Charge Fig 13a. Basic Gate Charge Waveform Current Regulator Same Type as D.U.T. 50KΩ 12V .2µF .3µF D.U.T. + V - DS VGS(th) Gate threshold Voltage (V) 4.0 ID = 250µA 3.0 2.0 1.0 -75 -50 -25 VGS 0 25 50 75 100 125 150 175 T J , Temperature ( °C ) 3mA IG ID Current Sampling Resistors Fig 13b. Gate Charge Test Circuit 6 Fig 14. Threshold Voltage vs. Temperature www.irf.com IRF2804/S/LPbF 1000 Avalanche Current (A) Duty Cycle = Single Pulse Allowed avalanche Current vs avalanche pulsewidth, tav assuming ∆ Tj = 25°C due to avalanche losses 0.01 100 0.05 0.10 10 1 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 tav (sec) Fig 15. Typical Avalanche Current Vs.Pulsewidth EAR , Avalanche Energy (mJ) 600 TOP Single Pulse BOTTOM 10% Duty Cycle ID = 75A 500 400 300 200 100 0 25 50 75 100 125 150 Starting T J , Junction Temperature (°C) Fig 16. Maximum Avalanche Energy vs. Temperature www.irf.com 175 Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of T jmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asT jmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 12a, 12b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. ∆T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figure 15, 16). tav = Average time in avalanche. D = Duty cycle in avalanche = tav ·f ZthJC(D, tav ) = Transient thermal resistance, see figure 11) PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC Iav = 2DT/ [1.3·BV·Zth] EAS (AR) = PD (ave)·tav 7 IRF2804/S/LPbF D.U.T Driver Gate Drive + - P.W. + D.U.T. ISD Waveform Reverse Recovery Current + V DD • dv/dt controlled by RG • Driver same type as D.U.T. • I SD controlled by Duty Factor "D" • D.U.T. - Device Under Test P.W. Period * RG D= VGS=10V Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer - Period + Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage - Body Diode VDD Forward Drop Inductor Curent ISD Ripple ≤ 5% * VGS = 5V for Logic Level Devices Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs V DS V GS RG RD D.U.T. + -V DD 10V Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % Fig 18a. Switching Time Test Circuit VDS 90% 10% VGS td(on) tr t d(off) tf Fig 18b. Switching Time Waveforms 8 www.irf.com IRF2804/S/LPbF TO-220AB Package Outline Dimensions are shown in millimeters (inches) TO-220AB Part Marking Information (;$03/( 7+,6,6$1,5) /27&2'( $66(0%/('21:: ,17+($66(0%/</,1(& 1RWH3LQDVVHPEO\OLQHSRVLWLRQ LQGLFDWHV/HDG)UHH ,17(51$7,21$/ 5(&7,),(5 /2*2 $66(0%/< /27&2'( 3$57180%(5 '$7(&2'( <($5 :((. /,1(& Notes: 1. For an Automotive Qualified version of this part please see http://www.irf.com/product-info/datasheets/data/auirf2804.pdf 2. For the most current drawing please refer to IR website at http://www.irf.com/package/ www.irf.com 9 IRF2804/S/LPbF D2Pak Package Outline Dimensions are shown in millimeters (inches) D2Pak Part Marking Information 7+,6,6$1,5)6:,7+ /27&2'( $66(0%/('21:: ,17+($66(0%/</,1(/ ,17(51$7,21$/ 5(&7,),(5 /2*2 $66(0%/< /27&2'( 25 ,17(51$7,21$/ 5(&7,),(5 /2*2 $66(0%/< /27&2'( 3$57180%(5 )6 '$7(&2'( <($5 :((. /,1(/ 3$57180%(5 )6 '$7(&2'( 3 '(6,*1$7(6/($')5(( 352'8&7237,21$/ <($5 :((. $ $66(0%/<6,7(&2'( Notes: 1. For an Automotive Qualified version of this part please see http://www.irf.com/product-info/datasheets/data/auirf2804.pdf 2. For the most current drawing please refer to IR website at http://www.irf.com/package/ 10 www.irf.com IRF2804/S/LPbF TO-262 Package Outline Dimensions are shown in millimeters (inches) TO-262 Part Marking Information (;$03/( 7+,6,6$1,5// /27&2'( $66(0%/('21:: ,17+($66(0%/</,1(& 1RWH3LQDVVHPEO\OLQH SRVLWLRQLQGLFDWHV/HDG)UHH ,17(51$7,21$/ 5(&7,),(5 /2*2 $66(0%/< /27&2'( 3$57180%(5 '$7(&2'( <($5 :((. /,1(& OR ,17(51$7,21$/ 5(&7,),(5 /2*2 $66(0%/< /27&2'( 3$57180%(5 '$7(&2'( 3 '(6,*1$7(6/($')5(( 352'8&7237,21$/ <($5 :((. $ $66(0%/<6,7(&2'( Notes: 1. For an Automotive Qualified version of this part please see http://www.irf.com/product-info/datasheets/data/auirf2804.pdf 2. For the most current drawing please refer to IR website at http://www.irf.com/package/ www.irf.com 11 IRF2804/S/LPbF D2Pak Tape & Reel Information Dimensions are shown in millimeters (inches) TRR 1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153) FEED DIRECTION 1.85 (.073) 1.65 (.065) 1.60 (.063) 1.50 (.059) 11.60 (.457) 11.40 (.449) 0.368 (.0145) 0.342 (.0135) 15.42 (.609) 15.22 (.601) 24.30 (.957) 23.90 (.941) TRL 10.90 (.429) 10.70 (.421) 1.75 (.069) 1.25 (.049) 4.72 (.136) 4.52 (.178) 16.10 (.634) 15.90 (.626) FEED DIRECTION 13.50 (.532) 12.80 (.504) 27.40 (1.079) 23.90 (.941) 4 330.00 (14.173) MAX. 60.00 (2.362) MIN. NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE. 30.40 (1.197) MAX. 26.40 (1.039) 24.40 (.961) 3 4 TO-220AB package is not recommended for Surface Mount Application. Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR’s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 05/2010 12 www.irf.com