Revised July 2003 DM74AS873 Dual 4-Bit D-Type Transparent Latches with 3-STATE Outputs General Description Features These dual 4-bit registers feature totem-pole 3-STATE outputs designed specifically for driving highly-capacitive or relatively low-impedance loads. The high-impedance state and increased high-logic-level drive provide these registers with the capability of being connected directly to and driving the bus lines in a bus-organized system without need for interface or pull-up components. They are particularly attractive for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. ■ Switching specifications at 50 pF ■ Switching specifications guaranteed over full temperature and VCC range ■ Advanced oxide-isolated, ion-implanted Schottky TTL process ■ 3-STATE buffer-type outputs drive bus lines directly ■ Space Saving 300 Mil Wide Package ■ Bus structured pinout The eight latches of the DM74AS873 are transparent Dtype latches meaning that while the enable (G) is HIGH the Q outputs will follow the data (D) inputs. When the enable is taken LOW the output will be latched at the level of the data that was set up. A buffered output control input can be used to place the eight outputs in either a normal logic state (HIGH or LOW logic levels) or a high-impedance state. In the high-impedance state the outputs neither load nor drive the bus lines significantly. The output control does not affect the internal operation of the latches. That is, the old data can be retained or new data can be entered even while the outputs are OFF. The pinout is arranged to ease printed circuit board layout. All data inputs are on one side of the package while all outputs are on the other side. Ordering Code: Order Number DM74AS873NT Package Number N24C Package Description 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram © 2003 Fairchild Semiconductor Corporation DS006330 www.fairchildsemi.com DM74AS873 Dual 4-Bit D-Type Transparent Latches with 3-STATE Outputs December 1986 DM74AS873 Function Table Logic Diagram Inputs Output CLR D EN OC Q X X X H Z L X X L L H H H L H H L H L L H X L L Q0 L = LOW State H = HIGH State X = Don’t Care Z = High Impedance State Q0 = Previous Condition of Q www.fairchildsemi.com 2 Supply Voltage 7V Input Voltage 7V Voltage Applied to Disabled Output 5.5V Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. 0°C to +70°C Operating Free Air Temperature Range −65°C to +150°C Storage Temperature Range Typical θJA 47.0°C/W N Package Recommended Operating Conditions Symbol Parameter Min Nom Max Units 4.5 5 5.5 V VCC Supply Voltage VIH HIGH Level Input Voltage VIL LOW Level Input Voltage 0.8 V IOH HIGH Level Output Current −15 mA IOL LOW Level Output Current 48 mA tW Pulse Width 2 Enable HIGH 5.5 Clear LOW 3.5 V ns tSU Data Setup Time (Note 2) 2↓ tH Data Hold Time (Note 2) 3↓ TA Free Air Operating Temperature 0 ns ns °C 70 Note 2: The (↓) arrow indicates the negative edge of the enable is used for reference. Electrical Characteristics over recommended operating free air temperature range. All typical values are measured at VCC = 5V, TA = 25°C. Symbol Parameter Conditions VIK Input Clamp Voltage VCC = 4.5V, II = −18 mA VOH HIGH Level VCC = 4.5V, VIL = Max Output Voltage IOH = Max Min 2.4 IOH = −2 mA, VCC = 4.5V to 5.5V VOL II LOW Level VCC = 4.5V, VIH = 2V Output Voltage IOL = Max Input Current at Max VCC = 5.5V, VIH = 7V Typ Max Units −1.2 V 3.3 V VCC −2 V 0.35 Input Voltage 0.5 V 0.1 mA IIH HIGH Level Input Current VCC = 5.5V, VIH = 2.7V 20 µA IIL LOW Level Input Current VCC = 5.5V, VIL = 0.4V −0.5 mA IO (Note 3) Output Drive Current VCC = 5.5V, VO = 2.25V −112 mA IOZH OFF-State Output Current, VCC = 5.5V, VIH = 2V HIGH Level Voltage Applied VO = 2.7V 50 µA IOZL OFF-State Output Current, VCC = 5.5V, VIH = 2V LOW Level Voltage Applied VO = 0.4V −50 µA Supply Current VCC = 5.5V Outputs HIGH 68 110 mA Outputs Open Outputs LOW 67 109 mA Outputs Disabled 80 129 mA ICC −30 Note 3: The output conditions have been chosen to produce a current that closely approximates one half of the true short circuit current, IOS. 3 www.fairchildsemi.com DM74AS873 Absolute Maximum Ratings(Note 1) DM74AS873 Switching Characteristics over recommended operating free air temperature range. All typical values are measured at VCC = 5V, TA = 25°C. Symbol Parameter Conditions From To Min tPLH tPHL Propagation Delay Time VCC = 4.5V to 5.5V LOW-to-HIGH Level Output RL = 500Ω Propagation Delay Time CL = 50 pF HIGH-to-LOW Level Output tPLH Propagation Delay Time LOW-to-HIGH Level Output tPHL Propagation Delay Time HIGH-to-LOW Level Output tPZH Output Enable Time Max Units Data Any Q 3 6.5 ns Data Any Q 3 6 ns Enable Any Q 6 11.5 ns Enable Any Q 4 7.5 ns Any Q 2 6.5 ns Any Q 4 9.5 ns Any Q 2 6.5 ns Any Q 2 7.5 ns Any Q 3 8.5 ns Output Control to HIGH Level Output tPZL Output Enable Time Output Control to LOW Level Output tPHZ Output Disable Time Output Control from HIGH Level Output tPLZ Output Disable Time Output Control from LOW Level Output tPHL Propagation Delay Time Clear HIGH-to-LOW Level Output www.fairchildsemi.com 4 DM74AS873 Dual 4-Bit D-Type Transparent Latches with 3-STATE Outputs Physical Dimensions inches (millimeters) unless otherwise noted 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N24C Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 5 www.fairchildsemi.com