Revised May 2000 DM74S253 Dual 3-STATE 1-of-4 Line Data Selector/Multiplexer General Description Features Each of these Schottky-clamped data selectors/multiplexers contains inverters and drivers to supply fully complementary, on-chip, binary decoding data selection to the AND-OR gates. Separate output control inputs are provided for each of the two four-line sections. ■ 3-STATE version of S153 with same pin-out The 3-STATE outputs can interface directly with data lines of bus-organized systems. With all but one of the common outputs disabled (at a high impedance state), the low impedance of the single enable output will drive the bus line to a HIGH or LOW logic level. ■ Strobe/output control ■ Schottky-diode-clamped transistors ■ Permits multiplexing from N lines to 1 line ■ Performs parallel-T-serial conversion ■ High fan-out totem-pole outputs ■ Typical propagation delay From data to output 6 ns From select to output 12 ns ■ Typical power dissipation 275 mW Ordering Code: Order Number DM74S253N Package Number N16E Package Description 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Connection Diagram Function Table Select Data Inputs Output Inputs Output Control B A C0 C1 C2 C3 G Y X X X X X X H Z L L L X X X L L L L H X X X L H L H X L X X L L L H X H X X L H H L X X L X L L H L X X H X L H H H X X X L L L H H X X X H L H Address inputs A and B are common to both sections. H = HIGH Level L = LOW Level X = Don’t Care Z = High Impedance © 2000 Fairchild Semiconductor Corporation DS006481 www.fairchildsemi.com DM74S253 Dual 3-STATE 1-of-4 Line Data Selector/Multiplexer August 1986 DM74S253 Logic Diagram www.fairchildsemi.com 2 Supply Voltage Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. 7V Input Voltage 5.5V 0°C to +70°C Operating Free Air Temperature Range −65°C to +150°C Storage Temperature Range Recommended Operating Conditions Symbol Parameter Min Nom Max 4.75 5 5.25 Units VCC Supply Voltage VIH HIGH Level Input Voltage VIL LOW Level Input Voltage 0.8 V IOH HIGH Level Output Current −6.5 mA IOL LOW Level Output Current 20 mA TA Free Air Operating Temperature 70 °C V 2 V 0 Electrical Characteristics over recommended operating free air temperature (unless otherwise noted) Symbol Parameter Conditions VI Input Clamp Voltage VCC = Min, II = −18 mA VOH HIGH Level VCC = Min, IOH = Max Output Voltage VIL = Max, VIH = Min LOW Level VCC = Min, IOL = Max VOL Output Voltage VIH = Min, VIL = Max II Input Current @ Max Input Voltage VCC = Max, VI = 5.5V Typ Min (Note 2) 2.4 Max Units −1.2 V 3.2 V 0.5 V 1 mA IIH HIGH Level Input Current VCC = Max, VI = 2.7V 50 µA IIL Low Level Input Current VCC = Max, VI = 0.5V −2 mA IOZH Off-State Output Current with VCC = Max, VO = 2.4V HIGH Level Output Voltage Applied VIH = Min, VIL = Max 50 µA Off-State Output Current with VCC = Max, VO = 0.5V LOW Level Output Voltage Applied VIH = Min, VIL = Max −50 µA −100 mA 70 mA IOZL IOS Short Circuit Output Current VCC = Max (Note 3) ICC Supply Current VCC = Max (Note 4) −40 55 Note 2: All typicals are at VCC = 5V, TA = 25°C. Note 3: Not more than one output should be shorted at a time, and the duration should not exceed one second. Note 4: ICC is measured with all outputs OPEN. Switching Characteristics at VCC = 5V and TA = 25°C RL = 280Ω Symbol Parameter From (Input) To (Output) CL = 15 pF Min Max CL = 50 pF Min Units Max tPLH Propagation Delay Time LOW-to-HIGH Level Output Data to Y 9 12 ns tPHL Propagation Delay Time HIGH-to-LOW Level Output Data to Y 9 12 ns tPLH Propagation Delay Time LOW-to-HIGH Level Output Select to Y 18 21 ns tPHL Propagation Delay Time HIGH-to-LOW Level Output Select to Y 18 21 ns tPZH Output Enable Time to HIGH Level Output Output Control to Y 16.5 19.5 ns tPZL Output Enable Time to LOW Level Output Output Control to Y 18 21 ns tPHZ Output Disable Time to HIGH Level Output (Note 5) Output Control to Y 9.5 ns tPLZ Output Disable Time to LOW Level Output (Note 5) Output Control to Y 15 ns Note 5: CL = 5 pF. 3 www.fairchildsemi.com DM74S253 Absolute Maximum Ratings(Note 1) DM74S253 Dual 3-STATE 1-of-4 Line Data Selector/Multiplexer Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N16E Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. 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