TOSHIBA TA8496FL

TA8496FL
Toshiba Bipolar Linear Integrated Circuit Silicon Monolithic
TA8496FL
Magnetic Head R/W IC
This IC enables writing and detection of magnetic recording
signals.
Features
•
Operating voltage range: VCC = 3.5 to 7 V
•
Output current: Iout = 20 mA (max)
•
Constant current operating function
VBAT = 1.8 to 7 V
: IOC = (0.25 (V) × 160 (A))/RWR (typ.)
Weight: 0.05 g (typ.)
Block Diagram
9
CFIL 10
19
T1
FCNT
AOUT2
AIN3
17
16
12
15
14
18
10 kΩ
Filter
AIN2
100 kΩ
100 Ω
COMIN 8
VCC − VF − 0.3 V
316 kΩ
10 kΩ
40 dB
30 kΩ 30 kΩ
VREF 24
100 kΩ
10 kΩ
HDFB HDOUT
10 kΩ
VCC
20 dB
20 dB
30 dB
13 AOUT3
AMP2
HEAD-AMP
AMP3
21 AHDIN
20 ACOM
COM-AMP
2 VBAT
ON/OFF 7
Control circuit
R/W 6
22 HDIN
ENA 5
23 COM
H-SW control circuit
CLK 4
3
WRCNT
1
WRGND
11
RDGND
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TA8496FL
Pin Function
Pin Number
Symbol
1
WRGND
2
VBAT
3
WRCNT
Description
GND for write block
High-switch control power supply
Write output setting pin
4
CLK
High-switch operation control signal input
5
ENA
High-switch enable signal input
6
R/W
Read/write select signal input
7
ON/OFF
Chip enable signal input
8
COMIN
Internal reference voltage setting
(fine adjustment)
9
VCC
Power supply input pin
10
CFIL
Power supply filter connecting pin (C = 0.1 µF)
11
RDGND
12
FCNT
13
AOUT3
14
AIN3
15
AOUT2
Amp 2 output
16
T1
Amp 2 test pin
17
AIN2
18
HDOUT
19
HDFB
Head amp feedback input
20
ACOM
COM amp output
21
AHDIN
Head amp output
22
HDIN
Write output
23
COM
Write output
24
Vref
GND for read block
Cut-off frequency setting pin
Amp 3 output
Amp 3 input
Amp 2 input
Head amp output
VCC filter output (internal power supply)
Maximum Rating (Ta = 25°C)
Characteristics
Symbol
Rating
Unit
VCC
8
V
VBAT
8
V
VI
6
V
Output Current
IOUT
20
mA
Operating Temperature
Topr
−20 to 70
°C
Storage Temperature
Tstg
−50 to 150
°C
Symbol
Rating
Unit
VCC
3.5 to 7.0
VBAT
1.8 to 7.0
Power Supply Voltage
Input Voltage
Recommended Operating Conditions
Characteristics
Power Supply Voltage
2
V
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TA8496FL
Functions
Input
ON/OFF
Read Unit
R/W
ENA
CLK
COM
HDin
H
H/L
H/L
∞
∞
Enable
L
H
H
L
H
Disable
L
H
L
H
L
Disable
L
L
L
L
L
Disable
L
L
H
∞
∞
Disable
H/L
H/L
H/L
∞
∞
Disable
H
L
Write Unit
∞: High impedance
Electrical Characteristics
Interface Block (unless otherwise is specified, VCC = 5 V, VBAT = 3 V, Ta = 25°°C)
Characteristics
Input Voltage
Input Current
Symbol
Test
Circuit
VIN1-Hi

VIN1-Lo
Min
Typ.
Max
ENA, ON/OFF
2.5

VCC

ENA, ON/OFF


1.0
VIN2-Hi

CLK, R/W
1.5

VCC
VIN2-Lo

CLK, R/W


0.5
IIN1-Hi
CLK, VIN = 5 V
―
15
25
IIN1-Lo
CLK, VIN = 0 V

−85
−120
ENA, VIN = 5 V

85
120
IIN3-Hi
R/W, VIN = 5 V

15
25
IIN3-Lo
R/W, VIN = 0 V

−85
−120
IIN4-Hi
ON/OFF, VIN = 5 V

85
120
IIN2-Hi
1
Test Condition
3
Unit
V
µA
2003-10-07
TA8496FL
Read Block (unless otherwise is specified, VCC = 5 V, VBAT = 3 V, Ta = 25°°C)
Characteristics
Test
Circuit
Symbol
ICCR
2
ICCO
Head amp
GH
Amp 2
G2
Amp 3
G3
―
Output Offset
Voltage
Amp 3 Output
Voltage Range
Amp 3 Output
Current
VACOM
Head amp
VHOS
Amp 2
V2OS
Amp 3
V3OS
Low
V3OL
High
V3OH
Output
I3OUT
Input
Max
Unit

3.2
4.6
mA

0
1
µA


40



40



30

Rg = 0 Ω, fc = 19 kHz

0.33
(0.64)*
Rg = 0 Ω, fc = 1.7 kHz

0.15
(0.26)*
When chip disabled
3
En2
Reference Voltage
Typ.
(on/off = low or open)
En1
Head Amp Input Conversion Noise
Min
When read block in operation
Current Dissipation
Gain
Characteristics
Test Condition

3
2.0
2.1

−0.1
±0.25

+0.7
±1.1

+0.1
±0.25

0.2


4.1


2.0



0.1
0.2
0.3

3
4
1.9
RL = 10 kΩ
4
I3IN
dB
µVrms
V
V
V
mA
*: Guaranteed by design. Determined at design and does not change at manufacturing. Test not conducted.
Write Block (unless otherwise is specified, VCC = 5 V, VBAT = 3 V, Ta = 25°°C)
Characteristics
Symbol
Test
Circuit
Test Condition

3.7
5.2
ICCe
When write enabled

1.9
2.8
ICCB
When write in break

4.4
6.1

1.4
1.8
Ibat
2
(RWR = 5 kΩ)
IbaB
When write in break

1.0
1.6
Ibar
During read

0
1

0
1
When chip disabled
IOC
(on/off = low or open)
5
ENA Output Transfer Time
IOC = 10 mA
VBAT = 2.0 V
8
10
12
(at VBAT = 2.0 V)
VBAT = 5.0 V

11
13

0.1

0 to 90%
(Note1)

0.5

TpHL1
0 to 10%
(Note1)

0.1

TpHL2
0 to 90%
(Note1)

0.5

TpZH1
0 to 10%
(Note1)

0.3

6
0 to 90%
(Note1)

0.5

TpHZ1
0 to 10%
(Note1)

0.3

TpHZ2
0 to 90%
(Note1)

0.5

TpZH2
6
mA
mA
(Note1)
TpLH2
Unit
µA
0 to 10%
TpLH1
CLK Output Transfer Time
Max
During write, CLK = Low/High
Ibao
Set Output Current
Typ.
ICCw
During write, reactive current
Current Dissipation
Min
µs
µs
Note 1: Load RL = 36 Ω, CL = 10 pF
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TA8496FL
Input/Output Circuit
•
CLK pin
VREF
1 kΩ
50 kΩ
R/W 6
GND
GND
•
ON/OFF pin
VREF
AOUT3 pin
VCC
13 AOUT3
50 kΩ
200 µA
50 kΩ
GND
Secondly L.P.F characteristics (amp 2)
30
Cut-off frequency (kHz)
(−3 dB)
GND
1.0 V
1.0 V
GND
ON/OFF 7
1 kΩ
ENA 5
50 kΩ
CLK 4
•
R/W pin
VREF
50 kΩ
VREF
•
ENA pin
50 kΩ
•
10
3
1
0.3
0.1
1
3
10
30
100
Control resistance (kΩ)
(FCNT)
5
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TA8496FL
Test Circuit
5V
IIN4
4 CLK
A
5 ENA
10 kΩ
2
19
18
17
VBAT HDFB HDOUT AIN2
12
15
14
FCNT AOUT2 AIN3
ACOM 20
AHDIN 21
TA8496FL
A
6 R/W
A
7 ON/OFF
HDIN 22
COM 23
RDGND CFIL
11
10
RL = 120 Ω
IIN3
A
0.1 µF
WRCNT WRGND
3
1
RWR = 5 kΩ
IIN2
9
VCC
0.1 µF
IIN1
820 pF 0.1 µF
3V
5V
1. Input Current (IIN1, IIN2, IIN3, IIN4)
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TA8496FL
2. Current Consumption (ICCR, ICCO, ICCW, ICCe, ICCB, Ibat, IbaB, Ibar, Ibao)
3V
5V
9
VCC
A
0.1 µF
10 kΩ
820 pF 0.1 µF
A
2
19
18
17
VBAT HDFB HDOUT AIN2
12
15
14
FCNT AOUT2 AIN3
ACOM 20
5V
4 CLK
AHDIN 21
TA8496FL
SW.
6 R/W
HDIN 22
7 ON/OFF
COM 23
WRCNT WRGND
3
1
0.1 µF
RWR = 3.9 kΩ
RDGND CFIL
11
10
RL = 120 Ω
5 ENA
Input Sequence (H = 5 V, L = 0 V)
Current Consumption
(VCC, VBAT)
ON/OFF
R/W
ENA
CLK
ICCR
H
H
L
H
ICCO
L/OPEN
H
H/L
H
ICCW
H
L
H
H/L
ICCe
H
L
L
H
ICCB
H
L
L
L
Ibat (Note2)
H
L
H
H/L
IbaB
H
L
L
L
Ibar
H
H
H/L
H/L
Ibao
L/OPEN
H/L
H/L
H/L
Note 2: SW. OFF
7
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TA8496FL
9
VCC
V
10 kΩ
SW.
2
19
18
17
VBAT HDFB HDOUT AIN2
VAOUT2
VIN3
VHDOUT
VIN2
V
820 pF
3V
5V
3. Gain Characteristics (GH, G2, G3), Power Off-Set Voltage (VHOS, V2OS, V3OS)
SW.
12
15
14
FCNT AOUT2 AIN3
6 R/W
AOUT3 13
V
VAOUT3
SW.
TA8496FL
AHDIN 21
5V
7 ON/OFF
WRCNT WRGND
3
1
RWR = 5 kΩ
0.1 µF
VHDOUT
, G2 = 20 log
VHDIN
V
VAOUT2
, G3 = 20 log
VIN2
VACOM
ACOM 20
RDGND CFIL
11
10
GH = 20 log
VHDIN
VAOUT3
VIN3
When off-set voltage is measured, SW turns ON.
VHOS = |VHDOUT|, V2OS = |VAOUT2|, V3OS = |VAOUT3|
4. Amp 3 Output Voltage Range (V3OL, V3OH), Amp 3 Output Current (I3OUT, I3IN)
100 µA
V
I3IN
VIO
7 ON/OFF
5V
TA8496FL
V
V
V30H
AOUT3 13 A
(Note3)
10 kΩ
6 R/W
12
15
14
FCNT AOUT2 AIN3
V30L
2
19
18
17
VBAT HDFB HDOUT AIN2
0.1 µF
2 mA
9
VCC
10 kΩ
820 pF 0.1 µF
3V
5V
VCC
AHDIN 21
ACOM 20
WRGND
1
0.1 µF
RDGND CFIL
11
10
Note 3: I3OUT must be measured on condition in VIO >
= 4.0 V
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TA8496FL
5V
2 V/5 V
Set Output Current (IOC)
9
VCC
2
VBAT
4 CLK
HDIN 22
5 ENA
TA8496FL
6 R/W
A
IOC
RL = 120 Ω
5V
COM 23
7 ON/OFF
RDGND
11
WRCNT WRGND
3
1
RWR
5.
Set RWR so that IOC = 10 mA (at VBAT = 2 V).
At this time, due to fluctuation in samples, IOC fluctuates in the range of 8 to 12 mA. Also, IOC fluctuates
depending on the power supply (VBAT) as follows: IOC = 10 mA (at VBAT = 2 V) → IOC ∼
− 13 mA (at VBAT =
5 V).
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TA8496FL
CLK, ENA Output Propagation Time (TpLH1/2, TpHL1/2, TpZH1/2, TpHZ1/2)
9
VCC
0.1 µF
10 kΩ
820 pF 0.1 µF
3V
5V
6.
2
19
18
17
VBAT HDFB HDOUT AIN2
12
15
14
FCNT AOUT2 AIN3
4 CLK
ACOM 20
5 ENA
AHDIN 21
Current probe
HDIN 22
7 ON/OFF
COM 23
RDGND CFIL
11
10
CL = 10 pF
WRCNT WRGND
3
1
RWR
0.1 µF
5V
6 R/W
RL = 36 Ω
TA8496FL
RWR: IOC is set 10 mA.
CLK Input Voltage Waveform
Output Current Waveform
50%
50%
90%
10%
90%
10%
TpLH1
TpLH2
ENA Input Voltage Waveform
+10 mA
GND
−10 mA
TpHL1
TpHL2
50%
50%
TpZH2
TpHZ2
TpHZ1
90%
TpZH1
90%
10%
90%
10%
90%
10%
GND
10%
TpHZ1
TpHZ2
+10 mA
−10 mA
TpZH1
TpZH2
10
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TA8496FL
100 kΩ
COMIN
24
VCC − VF − 0.3 V
30 kΩ
100 Ω
VREF
100 kΩ
316 kΩ
10 kΩ
40 dB
20 dB
AD
20 dB
30 dB
13
AMP2
HEAD-AMP
8
AMP3
21
20
COM-AMP
2
ON/OFF
CPU
R/W
ENA
AHDIN
ACOM
VBAT
7
Control block
6
22
23
5
High-switch control
block
4
0.25 V (typ.)
CLK
AOUT3
3
1
WRCNT
WRGND
1.8 to 7.0 V
10 kΩ
Filter
10 kΩ
10
0.1 µF
HDFB HDOUT AIN2
T1
FCNT AOUT2 AIN3
19
18
17
16
12
15
14
VCC
9
10 kΩ
CFIL
820 pF 0.1 µF
30 kΩ
0.1 µF
3.5 to 7.0 V
Example of Application Circuit
HDIN
COM
HEAD
11
RDGND
Note 4: Operating supply voltage range
VCC = 3.5 to 7.0 V, VBAT = 1.8 to 7.0 V
However, set VCC so that VACOM ≤ VBAT + 0.5 V. VCC ≥ VBAT.
(VACOM = (VCC − VF − 0.3)/2)
By connecting a resistor to the COMIN pin, VACOM can be varied.
Note 5: The IC may be damaged by shorts between pins, to the power supply, or to ground. Take great care when designing lines.
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TA8496FL
Requests Concerning Use of QON
Outline Drawing of Package
(Upper surface)
(Lower surface)
When using QON, please take into account the following items.
Caution
(1)
(2)
Do not carry out soldering on the island section in the four corners of the package (the section shown
on the lower surface drawing with diagonal lines) with the aim of increasing mechanical strength.
The island section exposed on the package surface (the section shown on the upper surface drawing
with diagonal lines) must be used as (Note 6) below while electrically insulated from outside.
Note 6: Ensure that the island section (the section shown on the lower surface drawing with diagonal
lines) does not come into contact with solder from through-holes on the board layout.
•
When mounting or soldering, take care to ensure that neither static electricity nor electrical
overstress is applied to the IC (measures to prevent anti-static, leaks, etc.).
•
When incorporating into a set, adopt a set design that does not apply voltage directly to the island
section.
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TA8496FL
Package Dimensions
Weight: 0.05 g (typ.)
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TA8496FL
RESTRICTIONS ON PRODUCT USE
030619EBA
• The information contained herein is subject to change without notice.
• The information contained herein is presented only as a guide for the applications of our products. No
responsibility is assumed by TOSHIBA for any infringements of patents or other rights of the third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of
TOSHIBA or others.
• TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor
devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical
stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of
safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of
such TOSHIBA products could cause loss of human life, bodily injury or damage to property.
In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as
set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and
conditions set forth in the “Handling Guide for Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability
Handbook” etc..
• The TOSHIBA products listed in this document are intended for usage in general electronics applications
(computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances,
etc.). These TOSHIBA products are neither intended nor warranted for usage in equipment that requires
extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or
bodily injury (“Unintended Usage”). Unintended Usage include atomic energy control instruments, airplane or
spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments,
medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this
document shall be made at the customer’s own risk.
• The products described in this document are subject to the foreign exchange and foreign trade laws.
• TOSHIBA products should not be embedded to the downstream products which are prohibited to be produced
and sold, under any law and regulations.
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