TK10Q60W
MOSFETs
Silicon N-Channel MOS (DTMOS)
TK10Q60W
1. Applications
•
Switching Voltage Regulators
2. Features
(1)
Low drain-source on-resistance: RDS(ON) = 0.327 Ω (typ.)
by used to Super Junction Structure : DTMOS
(2)
Easy to control Gate switching
(3)
Enhancement mode: Vth = 2.7 to 3.7 V (VDS = 10 V, ID = 0.5 mA)
3. Packaging and Internal Circuit
1: Gate
2: Drain (Heatsink)
3: Source
IPAK
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TK10Q60W
unless otherwise specified)
4. Absolute Maximum Ratings (Note) (Ta = 25
25
Characteristics
Symbol
Rating
Unit
Drain-source voltage
VDSS
600
V
Gate-source voltage
VGSS
±30
Drain current (DC)
(Note 1)
ID
9.7
Drain current (pulsed)
(Note 1)
IDP
38.8
PD
80
W
(Note 2)
EAS
121
mJ
IAR
2.5
A
Reverse drain current (DC)
(Note 1)
IDR
9.7
Reverse drain current (pulsed)
(Note 1)
Power dissipation
(Tc = 25)
Single-pulse avalanche energy
Avalanche current
A
IDRP
38.8
Channel temperature
Tch
150
Storage temperature
Tstg
-55 to 150
Note:
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
("Handling Precautions"/"Derating Concept and Methods") and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
5. Thermal Characteristics
Characteristics
Symbol
Max
Unit
Channel-to-case thermal resistance
Rth(ch-c)
1.57
/W
Channel-to-ambient thermal resistance
Rth(ch-a)
125
Note 1: Ensure that the channel temperature does not exceed 150.
Note 2: VDD = 90 V, Tch = 25 (initial), L = 33.9 mH, RG = 25 Ω, IAR = 2.5 A
Note:
This transistor is sensitive to electrostatic discharge and should be handled with care.
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6. Electrical Characteristics
unless otherwise specified)
6.1. Static Characteristics (Ta = 25
25
Characteristics
Gate leakage current
Drain cut-off current
Drain-source breakdown voltage
Gate threshold voltage
Drain-source on-resistance
Symbol
Test Condition
IGSS
VGS = ±30 V, VDS = 0 V
IDSS
VDS = 600 V, VGS = 0 V
V(BR)DSS
Vth
RDS(ON)
Min
Typ.
Max
Unit
±1
µA
10
ID = 10 mA, VGS = 0 V
600
VDS = 10 V, ID = 0.5 mA
2.7
3.7
VGS = 10 V, ID = 4.9 A
0.327
0.43
Ω
Min
Typ.
Max
Unit
700
pF
V
unless otherwise specified)
6.2. Dynamic Characteristics (Ta = 25
25
Characteristics
Input capacitance
Symbol
Ciss
Test Condition
VDS = 300 V, VGS = 0 V, f = 1 MHz
Reverse transfer capacitance
Crss
2.3
Output capacitance
Coss
20
Effective output capacitance
Co(er)
VDS = 0 to 400 V, VGS = 0 V
35
rg
VDS = OPEN, f = 1 MHz
7.5
Ω
Switching time (rise time)
tr
See Figure 6.2.1
22
ns
Switching time (turn-on time)
ton
45
tf
5.5
toff
75
50
V/ns
Min
Typ.
Max
Unit
20
nC
Gate resistance
Switching time (fall time)
Switching time (turn-off time)
MOSFET dv/dt ruggedness
dv/dt
VDD = 0 to 400 V, ID = 4.9 A
Fig. 6.2.1 Switching Time Test Circuit
unless otherwise specified)
25
6.3. Gate Charge Characteristics (Ta = 25
Characteristics
Total gate charge (gate-source plus
gate-drain)
Symbol
Qg
Test Condition
VDD ≈ 400 V, VGS = 10 V, ID = 9.7 A
Gate-source charge 1
Qgs1
4.5
Gate-drain charge
Qgd
9.5
6.4. Source-Drain Characteristics (Ta = 25
unless otherwise specified)
25
Characteristics
Symbol
Test Condition
Min
Typ.
Max
Unit
Diode forward voltage
VDSF
IDR = 9.7 A, VGS = 0 V
-1.7
V
Reverse recovery time
trr
250
ns
Reverse recovery charge
Qrr
IDR = 4.9 A, VGS = 0 V
-dIDR/dt = 100 A/µs
2.2
µC
Peak reverse recovery current
Irr
19
A
15
V/ns
Diode dv/dt ruggedness
dv/dt
IDR = 4.9 A, VGS = 0 V, VDD = 400 V
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7. Marking
Fig. 7.1 Marking
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8. Characteristics Curves (Note)
Fig. 8.1 ID - VDS
Fig. 8.2 ID - VDS
Fig. 8.3 ID - VGS
Fig. 8.4 VDS - VGS
Fig. 8.5 VDSS - Ta
Fig. 8.6 RDS(ON) - ID
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Fig. 8.7 RDS(ON) - Ta
Fig. 8.8 IDR - VDS
Fig. 8.9 C - VDS
Fig. 8.10 EOSS - VDS
Fig. 8.11 Vth - Ta
Fig. 8.12 Dynamic Input/Output Characteristics
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Fig. 8.13 rth - tw
(Guaranteed Maximum)
Fig. 8.14 EAS - Tch
(Guaranteed Maximum)
Fig. 8.15 PD - Tc
(Guaranteed Maximum)
Fig. 8.16 Test Circuit/Waveform
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Fig. 8.17 Safe Operating Area
(Guaranteed Maximum)
Note:
The above characteristics curves are presented for reference only and not guaranteed by production test,
unless otherwise noted.
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Package Dimensions
Unit: mm
Weight: 0.337 g (typ.)
Package Name(s)
TOSHIBA: 2-7L1A
Nickname: IPAK
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