TOSHIBA TK40A10N1

TK40A10N1
MOSFETs
Silicon N-channel MOS (U-MOS-H)
TK40A10N1
1. Applications
•
Switching Voltage Regulators
2. Features
(1)
Low drain-source on-resistance: RDS(ON) = 6.8 mΩ (typ.) (VGS = 10 V)
(2)
Low leakage current: IDSS = 10 µA (max) (VDS = 100 V)
(3)
Enhancement mode: Vth = 2.0 to 4.0 V (VDS = 10 V, ID = 0.5 mA)
3. Packaging and Internal Circuit
1: Gate
2: Drain
3: Source
TO-220SIS
 unless otherwise specified)
25
4. Absolute Maximum Ratings (Note) (Ta = 25
Characteristics
Symbol
Rating
Unit
Drain-source voltage
VDSS
100
V
Gate-source voltage
VGSS
±20
Drain current (DC)
(Silicon limit)
(Note 1,2)
ID
90
Drain current (DC)
(Tc = 25)
(Note 1)
ID
40
(t = 1 ms)
(Note 1)
IDP
171
PD
35
W
EAS
74
mJ
IAR
40
A

Drain current (pulsed)
Power dissipation
(Tc = 25)
Single-pulse avalanche energy
(Note 3)
Avalanche current
A
Channel temperature
Tch
150
Storage temperature
Tstg
-55 to 150
Note:
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
("Handling Precautions"/"Derating Concept and Methods") and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
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Rev.2.0
TK40A10N1
5. Thermal Characteristics
Characteristics
Symbol
Max
Unit
Channel-to-case thermal resistance
Rth(ch-c)
3.57
/W
Channel-to-ambient thermal resistance
Rth(ch-a)
62.5
Note 1: Ensure that the channel temperature does not exceed 150.
Note 2: Limited by silicon chip capability.
Note 3: VDD = 80 V, Tch = 25 (initial), L = 35.9 µH, RG = 1.2 Ω, IAR = 40 A
Note:
This transistor is sensitive to electrostatic discharge and should be handled with care.
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6. Electrical Characteristics
 unless otherwise specified)
6.1. Static Characteristics (Ta = 25
25
Characteristics
Symbol
Gate leakage current
IGSS
VGS = ±20 V, VDS = 0 V
IDSS
VDS = 100 V, VGS = 0 V
Drain cut-off current
Drain-source breakdown voltage
Drain-source breakdown voltage
(Note 4)
Typ.
Max
Unit


±0.1
µA


10


ID = 10 mA, VGS = -20 V
65


VDS = 10 V, ID = 0.5 mA
2.0

4.0
VGS = 10 V, ID = 20 A

6.8
8.2
ID = 10 mA, VGS = 0 V
V(BR)DSX
Vth
RDS(ON)
Min
100
V(BR)DSS
Gate threshold voltage
Drain-source on-resistance
Test Condition
V
mΩ
Note 4: If a reverse bias is applied between gate and source, this device enters V(BR)DSX mode. Note that the drainsource breakdown voltage is lowered in this mode.
 unless otherwise specified)
6.2. Dynamic Characteristics (Ta = 25
25
Characteristics
Input capacitance
Symbol
Ciss
Test Condition
VDS = 50 V, VGS = 0 V, f = 1 MHz
Min
Typ.
Max
Unit

3000

pF
Reverse transfer capacitance
Crss

29

Output capacitance
Coss

520


2.8

Ω

14

ns
Gate resistance
rg
Switching time (rise time)
tr
Switching time (turn-on time)
ton

35

tf

21

toff

57

Min
Typ.
Max
Unit

49

nC
Switching time (fall time)
Switching time (turn-off time)

See Figure 6.2.1
Fig. 6.2.1 Switching Time Test Circuit
 unless otherwise specified)
25
6.3. Gate Charge Characteristics (Ta = 25
Characteristics
Total gate charge (gate-source plus
gate-drain)
Symbol
Qg
Test Condition
VDD ≈ 80 V, VGS = 10 V, ID = 40 A
Gate-source charge 1
Qgs1

18

Gate-drain charge
Qgd

14

Gate switch charge
QSW

21

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TK40A10N1
 unless otherwise specified)
6.4. Source-Drain Characteristics (Ta = 25
25
Characteristics
Symbol
Test Condition
Min
Typ.
Max
Unit
A
Reverse drain current (DC)
(Note 5)
IDR



40
Reverse drain current (pulsed)
(Note 5)
IDRP



171

-1.2
Diode forward voltage
VDSF
IDR = 40 A, VGS = 0 V

IDR = 40 A, VGS = 0 V
-dIDR/dt = 100 A/µs

67

ns

130

nC
Reverse recovery time
(Note 6)
trr
Reverse recovery charge
(Note 6)
Qrr
V
Note 5: Ensure that the channel temperature does not exceed 150.
Note 6: Ensure that VDS peak does not exceed VDSS.
7. Marking (Note)
Fig. 7.1 Marking
Note:
A line under a Lot No. identifies the indication of product Labels.
Not underlined: [[Pb]]/INCLUDES > MCV
Underlined: [[G]]/RoHS COMPATIBLE or [[G]]/RoHS [[Pb]]
Please contact your TOSHIBA sales representative for details as to environmental matters such as the RoHS
compatibility of Product.
The RoHS is the Directive 2002/95/EC of the European Parliament and of the Council of 27 January 2003 on
the restriction of the use of certain hazardous substances in electrical and electronic equipment.
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TK40A10N1
8. Characteristics Curves (Note)
Fig. 8.1 ID - VDS
Fig. 8.2 ID - VDS
Fig. 8.3 ID - VGS
Fig. 8.4 VDS - VGS
Fig. 8.5 RDS(ON) - ID
Fig. 8.6 RDS(ON) - Ta
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TK40A10N1
Fig. 8.7 IDR - VDS
Fig. 8.8 Capacitance - VDS
Fig. 8.9 Vth - Ta
Fig. 8.10 Dynamic Input/Output Characteristics
Fig. 8.11 PD - Tc
(Guaranteed Maximum)
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TK40A10N1
Fig. 8.12 rth/Rth(ch-c) - tw
(Guaranteed Maximum)
Fig. 8.13 Safe Operating Area
(Guaranteed Maximum)
Fig. 8.14 EAS - Tch
(Guaranteed Maximum)
Fig. 8.15 Test Circuit/Waveform
Note:
The above characteristics curves are presented for reference only and not guaranteed by production test,
unless otherwise noted.
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Rev.2.0
TK40A10N1
Package Dimensions
Unit: mm
Weight: 1.7 g (typ.)
Package Name(s)
JEITA: SC-67
TOSHIBA: 2-10U1S
Nickname: TO-220SIS
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TK40A10N1
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information, including without limitation, this document, the specifications, the data sheets and application notes for Product and the
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noncompliance with applicable laws and regulations.
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Rev.2.0