TC74LCX652FS TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74LCX652FS Low-Voltage Octal Bus Transceiver/Register with 5-V Tolerant Inputs and Outputs The TC74LCX652FS is a high-performance CMOS octal bus transceiver/register. Designed for use in 3.3-V systems, it achieves high-speed operation while maintaining the CMOS low power dissipation. This device is designed for low-voltage (3.3 V) VCC applications, but it could be used to interface to 5-V supply environment for both inputs and outputs. This device is bus transceiver with 3-state outputs, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the internal registers. All inputs are equipped with protection circuits against static discharge. Weight: 0.14 g (typ.) Features • Low-voltage operation: VCC = 2.0 to 3.6 V • High-speed operation: tpd = 7.0 ns (max) (VCC = 3.0 to 3.6 V) • Output current: |IOH|/IOL = 24 mA (min) (VCC = 3.0 V) • Latch-up performance: −500 mA • Available in SSOP • Bidirectional interface between 5 V and 3.3 V signals • Power-down protection provided on all inputs and outputs • Pin and function compatible with the 74 series (74AC/F/ALS/LS etc.) 652 type Note 1: Do not apply a signal to any bus pins when it is in the output mode. Damage may result. All floating (high impedance) bus pins must have their input levels fixed by means of pull-up or pull-down resistors. 1 2007-10-19 TC74LCX652FS Pin Assignment (top view) IEC Logic Symbol CAB 1 24 VCC SAB 2 23 CBA OEAB 3 22 SBA A1 4 21 OEBA A2 5 20 B1 OEBA OEAB CBA SBA CAB SAB A1 A3 6 19 B2 A4 7 18 B3 A5 8 17 B4 A2 A6 9 16 B5 A3 A7 10 15 B6 A8 11 14 B7 GND 12 13 B8 A4 A5 A6 A7 A8 2 21 3 EN1 [BA] EN2 [AB] 23 22 1 2 4 5 C4 G5 C6 G7 > 1 5 1 5 6D 7 > 1 7 4D 1 1 2 20 19 6 18 7 17 8 16 9 15 10 14 11 13 B1 B2 B3 B4 B5 B6 B7 B8 2007-10-19 TC74LCX652FS Truth Table Control Inputs OEAB L OEBA CAB CBA SAB SBA X* X* X X X X H X* H X* X X* L X X* H X X* X* X* X* H X X L X L X H X H L X* X* X* H L H X* L Bus L X* X* H H A B Input Input Z Z X X Input Output L L H H L L H H X Qn L L H H Output Input L L H H L L H H Qn X L L H H Output Output Qn Qn Function The output functions of A and B busses are disabled. Both A and B busses are used as inputs to the internal flip-flops. Data on the bus will be stored on the rising edge of the Clock. The data on the A bus are displayed on the B bus. The data on the A bus are displayed on the B bus, and are stored into the A storage flip-flops on the rising edge of CAB. The data in the A storage flop-flops are displayed on the B bus. The data on the A bus are stored into the A storage flip-flops on the rising edge of CAB, and the stored data propagate directly onto the B bus. The data on the B bus are displayed on the A bus. The data on the B bus are displayed on the A bus, and are stored into the B storage flip-flops on the rising edge of CBA. The data in the B storage flip-flops are displayed on the A bus. The data on the B bus are stored into the B storage flip-flops on the rising edge of CBA, and the stored data propagate directly onto the A bus. The data in the A storage flop-flops are displayed on the B bus, and the data in the B storage flop-flops are displayed on the A. X: Don’t care Z: High impedance Qn: The data stored into the internal flip-flops by most recent low to high transition of the clock inputs. *: The clocks are not internally gated with either OEAB or OEBA . Therefore, data on the A and/or B busses may be clocked into the storage flip-flops at any time. 3 2007-10-19 TC74LCX652FS System Diagram 3 OEAB 21 OEBA A1 φA 4 D Q φA CK φB φB Q 20 D B1 CK A8 CAB SAB 11 13 Same as above block 23 1 2 φA 22 φB φA B8 CBA SBA φB Timing Chart OEAB OEBA SAB SBA CAB CBA A B A: Input B: Output A: Output B: Input : Don’t care 4 2007-10-19 TC74LCX652FS Absolute Maximum Ratings (Note 1) Characteristics Symbol Rating Unit VCC −0.5 to 7.0 V VIN −0.5 to 7.0 V Power supply voltage DC input voltage (CAB, CBA, SAB, SBA, OEAB, OEBA ) −0.5 to 7.0 (Note 2) DC bus I/O voltage VI/O −0.5 to VCC + 0.5 V (Note 3) Input diode current IIK −50 Output diode current IOK ±50 DC output current IOUT ±50 mA Power dissipation PD 180 mW ICC/IGND ±100 mA Tstg −65 to 150 °C DC VCC/ground current Storage temperature mA (Note 4) mA Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction. Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Note 2: Output in OFF state Note 3: High or low state. IOUT absolute maximum rating must be observed. Note 4: VOUT < GND, VOUT > VCC Operating Ranges (Note 1) Characteristics Symbol Power supply voltage Rating 2.0 to 3.6 VCC Input voltage 1.5 to 3.6 VIN (CAB, CBA, SAB, SBA, OEAB, OEBA ) Bus I/O voltage VI/O Output current IOH/IOL Unit (Note 2) 0 to 5.5 V 0 to 5.5 (Note 3) 0 to VCC (Note 4) ±24 (Note 5) ±12 (Note 6) Operating temperature Topr −40 to 85 Input rise and fall time dt/dv 0 to 10 V V mA °C (Note 7) ns/V Note 1: The operating ranges must be maintained to ensure the normal operation of the device. Unused inputs must be tied to either VCC or GND. Note 2: Data retention only Note 3: Output in OFF state Note 4: High or low state Note 5: VCC = 3.0 to 3.6 V Note 6: VCC = 2.7 to 3.0 V Note 7: VIN = 0.8 to 2.0 V, VCC = 3.0 V 5 2007-10-19 TC74LCX652FS Electrical Characteristics DC Characteristics (Ta = −40 to 85°C) Characteristics Input voltage Symbol Test Condition H-level VIH ⎯ L-level VIL ⎯ H-level VOH VIN = VIH or VIL Output voltage VOL VIN = VIH or VIL Input leakage current IIN VIN = 0 to 5.5 V 3-state output OFF state current IOZ Power-off leakage current IOFF Quiescent supply current ICC Increase in Icc per input ΔICC L-level Min Max 2.7 to 3.6 2.0 ⎯ 2.7 to 3.6 ⎯ 0.8 IOH = −100 μA 2.7 to 3.6 VCC − 0.2 ⎯ IOH = −12 mA 2.7 2.2 ⎯ IOH = −18 mA 3.0 2.4 ⎯ IOH = −24 mA 3.0 2.2 ⎯ IOL = 100 μA 2.7 to 3.6 ⎯ 0.2 IOL = 12 mA 2.7 ⎯ 0.4 IOL = 16 mA 3.0 ⎯ 0.4 IOL = 24 mA VCC (V) Unit V V 3.0 ⎯ 0.55 2.7 to 3.6 ⎯ ±5.0 μA 2.7 to 3.6 ⎯ ±5.0 μA VIN/VOUT = 5.5 V 0 ⎯ 10.0 μA VIN = VCC or GND 2.7 to 3.6 ⎯ 10.0 VIN/VOUT = 3.6 to 5.5 V 2.7 to 3.6 ⎯ ±10.0 VIH = VCC − 0.6 V 2.7 to 3.6 ⎯ 500 VIN = VIH or VIL VOUT = 0 to 5.5 V 6 μA 2007-10-19 TC74LCX652FS AC Characteristics (Ta = −40 to 85°C) Characteristics Maximum clock frequency Propagation delay time (An, Bn-Bn, An) Propagation delay time (CAB, CBA-Bn, An) Propagation delay time (SAB, SBA-Bn, An) Output enable time (OEAB, OEBA -An, Bn) Output disable time (OEAB, OEBA -An, Bn) Minimum pulse width Symbol fmax tpLH tpHL tpLH tpHL tpLH tpHL tpZL tPZH tpLZ tpHZ tW (H) tW (L) Test Condition Figure 1, Figure 2 Figure 1, Figure 2 Figure 1, Figure 5 Figure 1, Figure 2 Figure 1, Figure 3, Figure 4 Figure 1, Figure 3, Figure 4 Figure 1, Figure 5 Minimum setup time ts Figure 1, Figure 5 Minimum hold time th Figure 1, Figure 5 Output to output skew Note: VCC (V) tosLH (Note) tosHL Min Max 2.7 ⎯ ⎯ 3.3 ± 0.3 150 ⎯ 2.7 ⎯ 8.0 3.3 ± 0.3 1.5 7.0 2.7 ⎯ 9.5 3.3 ± 0.3 1.5 8.5 2.7 ⎯ 9.5 3.3 ± 0.3 1.5 8.5 2.7 ⎯ 9.5 3.3 ± 0.3 1.5 8.5 2.7 ⎯ 9.5 3.3 ± 0.3 1.5 8.5 2.7 3.3 ⎯ 3.3 ± 0.3 3.3 ⎯ 2.7 2.5 ⎯ 3.3 ± 0.3 2.5 ⎯ 2.7 1.5 ⎯ 3.3 ± 0.3 1.5 ⎯ 2.7 ⎯ ⎯ 3.3 ± 0.3 ⎯ 1.0 Unit MHz ns ns ns ns ns ns ns ns ns Parameter guaranteed by design. (tosLH = |tpLHm − tpLHn|, tosHL = |tpHLm − tpHLn|) Dynamic Switching Characteristics (Ta = 25°C, input: tr = tf = 2.5 ns, CL = 50 pF, RL = 500 Ω) Characteristics Symbol Test Condition VCC (V) Typ. Unit Quiet output maximum dynamic VOL VOLP VIH = 3.3 V, VIL = 0 V (Note) 3.3 0.8 V Quiet output minimum dynamic VOL |VOLV| VIH = 3.3 V, VIL = 0 V (Note) 3.3 0.8 V Note: Characterized with 7 outputs switching from high-to-low or low-to- high. The remaining output is measured in the low state. Capacitive Characteristics (Ta = 25°C) Characteristics Input capacitance Symbol Test Condition CIN OEAB, OEBA , CAB, CBA, SAB, SBA Bus input capacitance CI/O An, Bn Power dissipation capacitance CPD fIN = 10 MHz Note: Typ. Unit 7 pF 3.3 8 pF 3.3 25 pF VCC (V) 3.3 (Note) CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC (opr) = CPD･VCC･fIN + ICC/8 (per bit) 7 2007-10-19 TC74LCX652FS AC Test Circuit RL Switch RL Measure CL Output Open 6.0 V GND CL = 50 pF RL = 500 Ω Parameter Switch tpLH, tpHL Open tpLZ, tpZL 6.0 V tpHZ, tpZH GND tw, ts, th, fmax Open Figure 1 AC Waveform tr 2.5 ns tf 2.5 ns 2.7 V 90% 1.5 V Input (An, Bn, SAB, SBA) 10% GND VOH Output (Bn, An) 1.5 V tpLH tpHL VOL Figure 2 tpLH, tpHL tf 2.5 ns tr 2.5 ns 2.7 V 90% 1.5 V Input ( OEBA ) 10% GND 3.0 V Output (An) 1.5 V VOL + 0.3 V tpZL Output (An) tpLZ VOH − 0.3 V 1.5 V tpZH tpHZ VOL VOH GND Figure 3 tpLZ, tpHZ, tpZL, tpZH 8 2007-10-19 TC74LCX652FS tf 2.5 ns tr 2.5 ns 2.7 V 90% 1.5 V Input (OEAB) 10% GND tpLZ Output (Bn) 3.0 V 1.5 V VOL + 0.3 V Output (Bn) tpHZ VOL tpZL VOH VOH − 0.3 V 1.5 V GND tpZH Figure 4 tpLZ, tpHZ, tpZL, tpZH tr 2.5 ns Input (CAB, CBA) 10% tf 2.5 ns 2.7 V 90% 1.5 V tW (H) tW (L) GND 2.7 V Input (An, Bn) 1.5 V ts (H) th (H) ts (L) th (L) GND VOH Output (Bn, An) 1.5 V tpHL VOL tpLH Figure 5 tpLH, tpHL, tw, ts, th 9 2007-10-19 TC74LCX652FS Package Dimensions Weight: 0.14 g (typ.) 10 2007-10-19 TC74LCX652FS RESTRICTIONS ON PRODUCT USE 20070701-EN GENERAL • The information contained herein is subject to change without notice. • TOSHIBA is continually working to improve the quality and reliability of its products. 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Toshiba assumes no liability for damage or losses occurring as a result of noncompliance with applicable laws and regulations. 11 2007-10-19