TC74VCXR162646FT TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74VCXR162646FT Low-Voltage 16-Bit Bus Transceiver/Register with 3.6-V Tolerant Inputs and Outputs The TC74VCXR162646FT is a high-performance CMOS 16-bit bus transceiver/register. Designed for use in 1.8-V, 2.5-V or 3.3-V systems, it achieves high-speed operation while maintaining the CMOS low power dissipation. It is also designed with overvoltage tolerant inputs and outputs up to 3.6 V. This device is bus transceiver with 3-state outputs, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the internal registers. The 26-Ω series resistor helps reducing output overshoot and undershoot without external resistor. All inputs are equipped with protection circuits against static discharge. Weight: 0.25 g (typ.) Features (Note) • 26-Ω series resistors on outputs • Low-voltage operation: VCC = 1.8 to 3.6 V • High-speed operation : tpd = 3.8 ns (max) (VCC = 3.0 to 3.6 V) : tpd = 4.9 ns (max) (VCC = 2.3 to 2.7 V) : tpd = 9.8 ns (max) (VCC = 1.8 V) • Output current : IOH/IOL = ±12 mA (min) (VCC = 3.0 V) : IOH/IOL = ±8 mA (min) (VCC = 2.3 V) : IOH/IOL = ±4 mA (min) (VCC = 1.8 V) • Latch-up performance: −300 mA • ESD performance: Machine model ≥ ±200 V Human body model ≥ ±2000 V • Package: TSSOP • Bidirectional interface between 2.5 V and 3.3 V signals. • 3.6-V tolerant function and power-down protection provided on all inputs and outputs Note: Do not apply a signal to any bus pins when it is in the output mode. Damage may result. All floating (high impedance) bus pins must have their input level fixed by means of pull-up or pull-down resistors. 1 2007-10-19 TC74VCXR162646FT Pin Assignment (top view) IEC Logic Symbol 1DIR 1 56 1OE 1CAB 2 55 1CBA 1SAB 3 54 1SBA GND 4 53 GND 1A1 5 52 1B1 1A2 6 51 1B2 VCC 7 50 VCC 1A3 8 49 1B3 9 48 1B4 1A5 10 47 1B5 GND 11 46 GND 1A4 1A6 12 45 1B6 1A7 13 44 1B7 1A8 14 43 1B8 2A1 15 42 2B1 2A2 16 41 2B2 2A3 17 40 2B3 GND 18 39 GND 2A4 19 38 2B4 2A5 20 37 2B5 1OE 1DIR 1CBA 1SBA 1CAB 1SAB 2OE 2DIR 2CBA 2SBA 2CAB 2SAB 1A1 56 1 55 54 2 3 29 28 30 31 27 26 5 G3 3EN1 (BA) 3EN2 (AB) C4 G5 C6 G7 G10 10EN8 (BA) 10EN9 (AB) C11 G12 C13 G14 > 1 1 6D 1 1A2 1A3 1A4 1A5 1A6 1A7 1A8 2A1 2A6 21 36 2B6 VCC 22 35 VCC 2A7 23 34 2B7 2A8 24 33 2B8 GND 25 32 GND 2SAB 26 31 2SBA 2A4 2CAB 27 30 2CBA 2A5 2DIR 28 29 2OE 2A6 5 4D 5 7 > 1 7 2 52 1 6 51 8 49 9 48 10 47 12 45 13 44 14 43 15 > 1 8 12 1B1 11D 42 1B2 1B3 1B4 1B5 1B6 1B7 1B8 2B1 12 1 14 > 1 9 14 1 13D 2A2 2A3 2A7 2A8 2 16 41 17 40 19 38 20 37 21 36 23 34 24 33 2B2 2B3 2B4 2B5 2B6 2B7 2B8 2007-10-19 TC74VCXR162646FT Truth Table Control Inputs OE H DIR CAB CBA SAB SBA X* X* X X X X X X* L X* L X X* L X X* H X H X* X* X* X* X* L Bus H X X L X L X H X H L X* X* X* A B Input Input Z Z X X Input Output L L H H L L H H X Qn L L H H Output Input L L H H L L H H Qn X L L H H Function The output functions of A and B Busses are disabled. Both A and B Busses are used as inputs to the internal flip-flops. Data on the Bus will be stored on the rising edge of the Clock. The data on the A bus are displayed on the B bus. The data on the A bus are displayed on the B Bus, and are stored into the A storage flip-flops on the rising edge of CAB. The data in the A storage flop-flops are displayed on the B Bus. The data on the A Bus are stored into the A storage flip-flops on the rising edge of CAB, and the stored data propagate directly onto the B Bus. The data on the B Bus are displayed on the A bus. The data on the B Bus are displayed on the A Bus, and are stored into the B storage flip-flops on the rising edge of CBA. The data in the B storage flip-flops are displayed on the A Bus. The data on the B Bus are stored into the B storage flip-flops on the rising edge of CBA, and the stored data propagate directly onto the A Bus. X: Don’t care Z: High impedance Qn: The data stored into the internal flip-flops by most recent low to high transition of the clock inputs. *: The clocks are not internally with either OE or DIR. Thefore, data on the A and/or B busses may be clocked into the storage flip-flops at any time. 3 2007-10-19 TC74VCXR162646FT System Diagram 56 1OE 1 1DIR 1A1 φA 5 D Q φA CK φB Q φB D 52 1B1 CK 1A8 1CAB 1SAB 14 2 3 55 φA φB φA 2OE 2DIR 2A1 43 Same as above block 54 1B8 1CBA 1SBA φB 29 28 15 φA D Q φA CK φB Q φB D 42 2B1 CK 2A8 2CAB 2SAB 24 33 Same as above block 30 27 26 φA φB φA 31 2B8 2CBA 2SBA φB 4 2007-10-19 TC74VCXR162646FT Timing Chart OE DIR SAB SBA CAB CBA A B A: Input B: Output : Don’t care A: Output B: Input A: Z B: Z Z: High impedance 5 2007-10-19 TC74VCXR162646FT Absolute Maximum Ratings (Note 1) Characteristics Symbol Rating Unit VCC −0.5 to 4.6 V VIN −0.5 to 4.6 V Power supply voltage DC input voltage (DIR, OE , CAB, CBA, SAB, SBA) −0.5 to 4.6 (Note 2) DC bus I/O voltage VI/O −0.5 to VCC + 0.5 V (Note 3) IIK −50 Output diode current IOK ±50 DC output current IOUT ±50 mA Input diode current Power dissipation DC VCC/ground current per supply pin mA (Note 4) mA PD 400 mW ICC/IGND ±100 mA Tstg −65 to 150 °C Storage temperature Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction. Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Note 2: OFF state Note 3: High or low state. IOUT absolute maximum rating must be observed. Note 4: VOUT < GND, VOUT > VCC Operating Ranges (Note 1) Characteristics Power supply voltage Symbol VCC Input voltage VIN (DIR, OE , CAB, CBA, SAB, SBA) Rating Unit 1.8 to 3.6 1.2 to 3.6 (Note 2) −0.3 to 3.6 V V 0 to 3.6 (Note 3) Bus I/O voltage VI/O ±12 (Note 5) Output current IOH/IOL ±8 (Note 6) ±4 (Note 7) Operating temperature Topr −40 to 85 Input rise and fall time dt/dv 0 to 10 0 to VCC (Note 4) V mA °C (Note 8) ns/V Note 1: The operating ranges must be maintained to ensure the normal operation of the device. Unused inputs must be tied to either VCC or GND. Note 2: Data retention only Note 3: OFF state Note 4: High or low state Note 5: VCC = 3.0 to 3.6 V Note 6: VCC = 2.3 to 2.7 V Note 7: VCC = 1.8 V Note 8: VIN = 0.8 to 2.0 V, VCC = 3.0 V 6 2007-10-19 TC74VCXR162646FT Electrical Characteristics DC Characteristics (Ta = −40 to 85°C, 2.7 V < VCC =< 3.6 V) Characteristics Input voltage Min Max 2.7 to 3.6 2.0 ⎯ 2.7 to 3.6 ⎯ 0.8 2.7 to 3.6 VCC − 0.2 ⎯ IOH = −6 mA 2.7 2.2 ⎯ IOH = −8 mA 3.0 2.4 ⎯ IOH = −12 mA 3.0 2.2 ⎯ IOL = 100 μA Symbol Test Condition H-level VIH ⎯ L-level VIL ⎯ IOH = −100 μA H-level VOH VIN = VIH or VIL Output voltage L-level VOL Input leakage current IIN 3-state output OFF state current IOZ Power-off leakage current IOFF Quiescent supply current ICC Increase in ICC per input ΔICC VCC (V) Unit V V 2.7 to 3.6 ⎯ 0.2 IOL = 6 mA 2.7 ⎯ 0.4 IOL = 8 mA 3.0 ⎯ 0.55 IOL = 12 mA 3.0 ⎯ 0.8 2.7 to 3.6 ⎯ ±5.0 μA 2.7 to 3.6 ⎯ ±10.0 μA 0 ⎯ 10.0 μA VIN = VCC or GND 2.7 to 3.6 ⎯ 20.0 VCC < = (VIN, VOUT) < = 3.6 V 2.7 to 3.6 ⎯ ±20.0 VIH = VCC − 0.6 V 2.7 to 3.6 ⎯ 750 Min Max VIN = VIH or VIL VIN = 0 to 3.6 V VIN = VIH or VIL VOUT = 0 to 3.6 V VIN, VOUT = 0 to 3.6 V μA DC Characteristics (Ta = −40 to 85°C, 2.3 V =< VCC =< 2.7 V) Characteristics Input voltage Unit Symbol Test Condition H-level VIH ⎯ 2.3 to 2.7 1.6 ⎯ L-level VIL ⎯ 2.3 to 2.7 ⎯ 0.7 2.3 to 2.7 VCC − 0.2 ⎯ IOH = −4 mA 2.3 2.0 ⎯ IOH = −6 mA 2.3 1.8 ⎯ IOH = −8 mA 2.3 1.7 ⎯ IOL = 100 μA 2.3 to 2.7 ⎯ 0.2 IOL = 6 mA 2.3 ⎯ 0.4 IOL = 8 mA 2.3 ⎯ 0.6 2.3 to 2.7 ⎯ ±5.0 μA 2.3 to 2.7 ⎯ ±10.0 μA 0 ⎯ 10.0 μA IOH = −100 μA H-level VOH VIN = VIH or VIL Output voltage L-level VOL Input leakage current IIN 3-state output OFF state current IOZ Power-off leakage current IOFF Quiescent supply current ICC VIN = VIH or VIL VIN = 0 to 3.6 V VIN = VIH or VIL VOUT = 0 to 3.6 V VIN, VOUT = 0 to 3.6 V VCC (V) VIN = VCC or GND 2.3 to 2.7 ⎯ 20.0 VCC < = (VIN, VOUT) < = 3.6 V 2.3 to 2.7 ⎯ ±20.0 7 V V μA 2007-10-19 TC74VCXR162646FT DC Characteristics (Ta = −40 to 85°C, 1.8 V =< VCC < 2.3 V) Characteristics Min Max 1.8 to 2.3 0.7 × VCC ⎯ 1.8 to 2.3 ⎯ 0.2 × VCC IOH = −100 μA 1.8 VCC − 0.2 ⎯ IOH = −4 mA 1.8 1.4 ⎯ IOL = 100 μA 1.8 ⎯ 0.2 IOL = 4 mA 1.8 ⎯ 0.3 1.8 ⎯ ±5.0 μA 1.8 ⎯ ±10.0 μA 0 ⎯ 10.0 μA VIN = VCC or GND 1.8 ⎯ 20.0 VCC < = (VIN, VOUT) < = 3.6 V 1.8 ⎯ ±20.0 Symbol Test Condition H-level VIH ⎯ L-level VIL ⎯ H-level VOH VCC (V) Input voltage VIN = VIH or VIL Output voltage VOL VIN = VIH or VIL Input leakage current IIN VIN = 0 to 3.6 V 3-state output OFF state current IOZ Power-off leakage current IOFF Quiescent supply current ICC L-level VIN = VIH or VIL VOUT = 0 to 3.6 V VIN, VOUT = 0 to 3.6 V 8 Unit V V μA 2007-10-19 TC74VCXR162646FT AC Characteristics (Ta = −40 to 85°C, input: tr = tf = 2.0 ns, CL = 30 pF, RL = 500 Ω) (Note 1) Characteristics Maximum clock frequency Propagation delay time (An, Bn-Bn, An) Propagation delay time (CAB, CBA-Bn, An) Propagation delay time (SAB, SBA-Bn, An) Output enable time ( OE , DIR-An, Bn) Output disable time ( OE , DIR-An, Bn) Minimum pulse width Minimum setup time Minimum hold time Output to output skew Symbol fmax tpLH tpHL tpLH tpHL tpLH tpHL tpZL tpZH tpLZ tpHZ tw (H) tw (L) ts th Test Condition Figure 1, Figure 3 Figure 1, Figure 2 Figure 1, Figure 3 Figure 1, Figure 2 Figure 1, Figure 4, Figure 5 Figure 1, Figure 4, Figure 5 Figure 1, Figure 3 Figure 1, Figure 3 Figure 1, Figure 3 tosLH tosHL Min Max 1.8 100 ⎯ 2.5 ± 0.2 200 ⎯ 3.3 ± 0.3 250 ⎯ 1.8 1.5 9.8 2.5 ± 0.2 0.8 4.9 3.3 ± 0.3 0.6 3.8 1.8 1.5 9.8 2.5 ± 0.2 0.8 5.8 3.3 ± 0.3 0.6 4.1 1.8 1.5 9.8 2.5 ± 0.2 0.8 5.8 3.3 ± 0.3 0.6 4.4 1.8 1.5 9.8 2.5 ± 0.2 0.8 5.9 3.3 ± 0.3 0.6 4.3 1.8 1.5 8.8 2.5 ± 0.2 0.8 4.9 3.3 ± 0.3 0.6 4.3 VCC (V) 1.8 4.0 ― 2.5 ± 0.2 1.5 ⎯ 3.3 ± 0.3 1.5 ⎯ 1.8 2.5 ⎯ 2.5 ± 0.2 1.5 ⎯ 3.3 ± 0.3 1.5 ⎯ 1.8 1.0 ⎯ 2.5 ± 0.2 1.0 ⎯ 3.3 ± 0.3 1.0 ⎯ 1.8 ⎯ 0.5 (Note 2) 2.5 ± 0.2 ⎯ 0.5 3.3 ± 0.3 ⎯ 0.5 Unit MHz ns ns ns ns ns ns ns ns ns Note 1: For CL = 50 pF, add approximately 300 ps to the AC maximum specification. Note 2: Parameter guaranteed by design. (tosLH = |tpLHm − tpLHn|, tosHL = |tpHLm − tpHLn|) 9 2007-10-19 TC74VCXR162646FT Dynamic Switching Characteristics (Ta = 25°C, input: tr = tf = 2.0 ns, CL = 30 pF, RL = 500 Ω) Characteristics Quiet output maximum dynamic VOL Quiet output minimum dynamic VOL Quiet output minimum dynamic VOH Note: Symbol VOLP VOLV VOHV Test Condition VCC (V) Typ. VIH = 1.8 V, VIL = 0 V (Note) 1.8 0.15 VIH = 2.5 V, VIL = 0 V (Note) 2.5 0.25 VIH = 3.3 V, VIL = 0 V (Note) 3.3 0.35 VIH = 1.8 V, VIL = 0 V (Note) 1.8 −0.15 VIH = 2.5 V, VIL = 0 V (Note) 2.5 −0.25 VIH = 3.3 V, VIL = 0 V (Note) 3.3 −0.35 VIH = 1.8 V, VIL = 0 V (Note) 1.8 1.55 VIH = 2.5 V, VIL = 0 V (Note) 2.5 2.05 VIH = 3.3 V, VIL = 0 V (Note) 3.3 2.65 Unit V V V Parameter guaranteed by design. Capacitive Characteristics (Ta = 25°C) Characteristics Input capacitance Symbol CIN Bus I/O capacitance CI/O Power dissipation capacitance CPD Note: Test Condition (DIR, OE , CAB, CBA, SAB, SBA) Unit 6 pF 1.8, 2.5, 3.3 7 pF 1.8, 2.5, 3.3 20 pF 1.8, 2.5, 3.3 ⎯ fIN = 10 MHz Typ. VCC (V) (Note) CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC (opr) = CPD･VCC･fIN + ICC/16 (per bit) 10 2007-10-19 TC74VCXR162646FT AC Test Circuit 6.0 V or VCC × 2 Open GND RL Switch Switch tpLH, tpHL Open RL Measure CL Output Parameter tpLZ, tpZL CL = 30 pF RL = 500 Ω 6.0 V VCC × 2 tpHZ, tpZH @VCC = 3.3 ± 0.3 V @VCC = 2.5 ± 0.2 V @VCC = 1.8 V GND Figure 1 AC Waveform tf 2.0 ns tr 2.0 ns Input (An, Bn, SAB, SBA) 90% VM VIH 10% GND VOH Output (Bn, An) VM VOL tpHL tpLH Figure 2 tpLH, tpHL tr 2.0 ns Input (CAB, CBA) 10% tf 2.0 ns VIH 90% VM GND tr 2.0 ns tf 2.0 ns tw (H) VIH 90% Input (An, Bn) 10% tw (L) VM ts (H) th (H) ts (L) th (L) GND VOH Output (Bn, An) VM tpHL tpLH VOL Figure 3 tpLH, tpHL, tw, ts, th 11 2007-10-19 TC74VCXR162646FT tr 2.0 ns tf 2.0 ns 90% VM Output Disable ( OE ) VIH 10% tpLZ GND tpZL 3.0 V or VCC Output (An, Bn) Low to Off to Low VM tpHZ VX VOL tpZH VOH VY Output (An, Bn) High to Off to High VM GND Outputs enabled Outputs disabled Outputs enabled Figure 4 tpLZ, tpHZ, tpZL, tpZH tf 2.0 ns tr 2.0 ns VIN 90% Input (DIR) 10% VM GND 3.0 V or VCC Output (An) VM VX tpZL Output (An) VOL tpLZ VOH VY VM tpZH GND tpHZ tpLZ Output (Bn) 3.0 V or VCC VM VX Output (Bn) tpHZ VOL tpZL VOH VY VM GND tpZH Figure 5 tpLZ, tpHZ, tpZL, tpZH Symbol VCC 3.3 ± 0.3 V 2.5 ± 0.2 V 1.8 V VIH 2.7 V VCC VCC VM 1.5 V VCC/2 VCC/2 VX VOL + 0.3 V VOL + 0.15 V VOL + 0.15 V VY VOH − 0.3 V VOH − 0.15 V VOH − 0.15 V 12 2007-10-19 TC74VCXR162646FT Package Dimensions Weight: 0.25 g (typ.) 13 2007-10-19 TC74VCXR162646FT RESTRICTIONS ON PRODUCT USE 20070701-EN GENERAL • The information contained herein is subject to change without notice. • TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the “Handling Guide for Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability Handbook” etc. • The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.).These TOSHIBA products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury (“Unintended Usage”). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. 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Toshiba assumes no liability for damage or losses occurring as a result of noncompliance with applicable laws and regulations. 14 2007-10-19