SLVS304A − SEPTEMBER 2000 − REVISED AUGUST 2002
D
D
D
D
D
D
D
D PACKAGE
(TOP VIEW)
Complete PWM Power Control
3.6-V to 40-V Operation
Internal Undervoltage-Lockout Circuit
Oscillator Frequency . . . 20 kHz to 500 kHz
Variable Dead Time Provides Control Over
Total Range
Ideal Controller for DDR Memory
Application
Uncommitted Error Amplifier Inputs
OUT
VCC
COMP
INV
1
8
2
7
3
6
4
5
GND
RT
DTC
NI
description
The TL5002 incorporates on a single monolithic chip all the functions required for a pulse-width-modulation
(PWM) control circuit. Designed primarily for power-supply control, the TL5002 contains an error amplifier, a
regulator, an oscillator, a PWM comparator with a dead-time-control input, undervoltage lockout (UVLO), and
an open-collector output transistor.
The error-amplifier input common-mode voltage ranges from 0.9 V to 1.5 V. Dead-time control (DTC) can be
set to provide 0% to 100% dead time by connecting an external resistor between DTC and GND. The oscillator
frequency is set by terminating RT with an external resistor to GND. During low VCC conditions, the UVLO circuit
turns the output off until VCC recovers to its normal operating range.
The TL5002 is characterized for operation from − 40°C to 85°C.
AVAILABLE OPTIONS
TA
SMALL OUTLINE
(D)
−20°C to 85°C
TL5002CD
−40°C to 85°C
TL5002ID
The D package is available taped and reeled. Add the suffix R
to the device type (e.g., TL5002CDR).
functional block diagram
VCC
2
DTC
6
RT
7
OUT
1
UVLO
IDT
5
NI
INV
COMP
4
Error
Amplifier
Reference
Voltage
2.5 V
+
OSC
−
PWM/DTC
Comparator
3
8
GND
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2002, Texas Instruments Incorporated
!" #!$% &"'
&! #" #" (" " ") !"
&& *+' &! #", &" ""%+ %!&"
", %% #""'
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SLVS304A − SEPTEMBER 2000 − REVISED AUGUST 2002
detailed description
voltage reference
A 2.5-V regulator operating from VCC is used to power the internal circuitry of the TL5002.
error amplifier
The error amplifier compares a sample of the dc-to-dc converter output voltage to an external reference voltage
and generates an error signal for the PWM comparator. The dc-to-dc converter output voltage is set by selecting
the error-amplifier gain (see Figure 1), using the following expression:
VO = (1 + R1/R2) (1 V)
Compensation
Network
R1
VI(FB)
R2
Vref
3
COMP
4
INV
5
NI
TL5002
−
+
To PWM
Comparator
8 GND
Figure 1. Error-Amplifier Gain Setting
The error-amplifier output is brought out as COMP for use in compensating the dc-to-dc converter control loop
for stability. Because the amplifier can only source 45 µA, the total dc load resistance should be 100 kΩ or more.
oscillator/PWM
The oscillator frequency (fosc) can be set between 20 kHz and 500 kHz by connecting a resistor between RT
and GND. Acceptable resistor values range from 15 kΩ to 250 kΩ. The oscillator frequency can be determined
by using the graph shown in Figure 5.
The oscillator output is a triangular wave with a minimum value of approximately 0.7 V and a maximum value
of approximately 1.3 V. The PWM comparator compares the error-amplifier output voltage and the DTC input
voltage to the triangular wave and turns the output transistor off whenever the triangular wave is greater than
the lesser of the two inputs.
dead-time control (DTC)
DTC provides a means of limiting the output-switch duty cycle to a value less than 100 %, which is critical for
boost and flyback converters. A current source generates a reference current (IDT) at DTC that is nominally
equal to the current at the oscillator timing terminal, RT. Connecting a resistor between DTC and GND generates
a dead-time reference voltage (VDT), which the PWM/DTC comparator compares to the oscillator triangle wave
as described in the previous section. Nominally, the maximum duty cycle is 0% when VDT is 0.7 V or less and
100 % when VDT is 1.3 V or greater. Because the triangle wave amplitude is a function of frequency and the
source impedance of RT is relatively high (1250 Ω), choosing RDT for a specific maximum duty cycle, D, is
accomplished using the following equation and the voltage limits for the frequency in question as found in
Figure 11 (Voscmax and Voscmin are the maximum and minimum oscillator levels):
2
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SLVS304A − SEPTEMBER 2000 − REVISED AUGUST 2002
dead-time control (DTC) (continued)
R
DT
ǒ
Ǔ ƪDǒVoscmax – VoscminǓ ) Voscminƫ
+ R t ) 1250
Where
RDT and Rt are in ohms, D in decimal
Soft start can be implemented by paralleling the DTC resistor with a capacitor (CDT) as shown in Figure 2. During
soft start, the voltage at DTC is derived by the following equation:
V
DT
[I
R
DT DT
ǒ
1– e
ǒ–tńR DTC DTǓ
Ǔ
6 DTC
CDT
TL5002
RDT
Figure 2. Soft-Start Circuit
If the dc-to-dc converter must be in regulation within a specified period of time, the time constant, RDTCDT,
should be t0/3 to t0/5. The TL5002 remains off until VDT ≈ 0.7 V, the minimum ramp value. CDT is discharged
every time UVLO becomes active.
undervoltage-lockout (UVLO) protection
The undervoltage-lockout circuit turns the output transistor off whenever the supply voltage drops too low
(approximately 3 V at 25°C) for proper operation. A hysteresis voltage of 200 mV eliminates false triggering on
noise and chattering.
output transistor
The output of the TL5002 is an open-collector transistor with a maximum collector current rating of 21 mA and
a voltage rating of 51 V. The output is turned on under the following conditions: the oscillator triangle wave is
lower than both the DTC voltage and the error-amplifier output voltage, and the UVLO circuit is inactive.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
SLVS304A − SEPTEMBER 2000 − REVISED AUGUST 2002
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 V
Amplifier input voltage, VI(INV), VI(NI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 V
Output voltage, VO, OUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 V
Output current, IO, OUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 mA
Output peak current, IO(peak), OUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating ambient temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 85°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltage values are with respect to network ground terminal.
DISSIPATION RATING TABLE
PACKAGE
TA ≤ 25°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
TA = 125°C
POWER RATING
D
725 mW
5.8 mW/°C
464 mW
377 mW
145 mW
recommended operating conditions
MIN
MAX
Supply voltage, VCC
3.6
40
UNIT
V
Amplifier input voltage, VI(INV), VI(NI)
0.9
1.5
V
Output voltage, VO, OUT
50
V
Output current, IO, OUT
20
mA
COMP source current
45
µA
COMP dc load resistance
100
Oscillator timing resistor, Rt
Oscillator frequency, fosc
Operating ambient temperature, TA
4
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
kΩ
15
250
kΩ
20
500
kHz
−40
85
°C
SLVS304A − SEPTEMBER 2000 − REVISED AUGUST 2002
electrical characteristics over recommended operating free-air temperature range, VCC = 6 V,
fosc = 100 kHz (unless otherwise noted)
undervoltage lockout
PARAMETER
TEST CONDITIONS
Upper threshold voltage
TL5002C
MIN TYP†
MAX
TA = 25°C
TA = 25°C
Lower threshold voltage
Hysteresis
† All typical values are at TA = 25°C.
3
UNIT
V
2.8
V
TA = 25°C
100
200
mV
TEST CONDITIONS
TL5002C
MIN TYP†
MAX
UNIT
100
kHz
15
kHz
oscillator
PARAMETER
Frequency
Rt = 100 kΩ
Standard deviation of frequency
Frequency change with voltage
VCC = 3.6 V to 40 V
TA = − 40°C to 25°C
1
TA = − 20°C to 25°C
TA = 25°C to 85°C
Frequency change with temperature
kHz
−4
−0.4
4
kHz
−4
−0.4
4
kHz
−4
−0.2
4
kHz
Voltage at RT
† All typical values are at TA = 25°C.
1
V
dead-time control
PARAMETER
Output (source) current
TEST CONDITIONS
TL5002
Input threshold voltage
V(DT) = 1.5 V
Duty cycle = 0%
MIN
TL5002C
TYP†
0.9 × IRT‡
MAX
1.2 × IRT
0.5
0.7
Duty cycle = 100%
1.3
1.5
UNIT
µA
V
† All typical values are at TA = 25°C.
‡ Output source current at RT
error amplifier
PARAMETER
TEST CONDITIONS
Input voltage
VCC = 3.6 V to 40 V
MIN
0.3
Input bias current
−160
Positive
Output voltage swing
TL5002C
TYP†
MAX
1.5
Negative
Unity-gain bandwidth
Output (sink) current
VI(INV) = 1.2 V,
VI(INV) = 0.8 V,
Output (source) current
† All typical values are at TA = 25°C.
POST OFFICE BOX 655303
1.5
V
−500
nA
2.3
0.3
Open-loop voltage amplification
UNIT
V
0.4
V
80
dB
1.5
MHz
COMP = 1 V
100
600
µA
COMP = 1 V
−45
−70
µA
• DALLAS, TEXAS 75265
5
SLVS304A − SEPTEMBER 2000 − REVISED AUGUST 2002
electrical characteristics over recommended operating free-air temperature range, VCC = 6 V,
fosc = 100 kHz (unless otherwise noted) (continued)
output
PARAMETER
TEST CONDITIONS
Output saturation voltage
IO = 10 mA
VO = 50 V,
Off-state current
TL5002C
MIN TYP†
MAX
UNIT
1.5
V
VCC = 0
10
VO = 50 V
VO = 6 V
Short-circuit output current
† All typical values are at TA = 25°C.
2
10
40
µA
A
mA
total device
PARAMETER
Standby supply current
TEST CONDITIONS
Off state
Average supply current
† All typical values are at TA = 25°C.
Rt = 100 kΩ
PARAMETER MEASUREMENT INFORMATION
COMP
DTC
OSC
PWM/DTC
Comparator
OUT
VCC
3V
Figure 3. PWM Timing Diagram
6
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MIN
TL5002C
TYP†
MAX
UNIT
1
1.5
mA
1.4
2.1
mA
SLVS304A − SEPTEMBER 2000 − REVISED AUGUST 2002
TYPICAL CHARACTERISTICS
OSCILLATION FREQUENCY
vs
AMBIENT TEMPERATURE
OSCILLATOR FREQUENCY
vs
TIMING RESISTANCE
100
VCC = 6 V
DT Resistance = Rt
TA = 25°C
fosc − Oscillation Frequency − kHz
fosc − Oscillator Frequency − Hz
1M
100 k
10 k
10 k
100 k
98
96
94
92
90
88
− 50
1M
VCC = 6 V
Rt = 100 kΩ
DT Resistance = 100 kΩ
− 25
0
50
75
100
TA − Ambient Temperature − °C
Rt − Timing Resistance − Ω
Figure 5
Figure 4
AVERAGE SUPPLY CURRENT
vs
POWER-SUPPLY VOLTAGE
AVERAGE SUPPLY CURRENT
vs
AMBIENT TEMPERATURE
2
1.3
I CC − Average Supply Current − mA
Rt = 100 kΩ
TA = 25 °C
I CC − Average Supply Current − mA
25
1.5
1
0.5
0
0
10
20
30
40
VCC = 6 V
Rt = 100 kΩ
DT Resistance = 100 kΩ
1.2
1.1
1
0.9
0.8
0
− 50
− 25
0
25
50
75
100
TA − Ambient Temperature − °C
VCC − Power-Supply Voltage − V
Figure 6
Figure 7
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• DALLAS, TEXAS 75265
7
SLVS304A − SEPTEMBER 2000 − REVISED AUGUST 2002
TYPICAL CHARACTERISTICS
ERROR AMPLIFIER OUTPUT VOLTAGE
vs
OUTPUT (SINK) CURRENT
PWM TRIANGLE WAVE AMPLITUDE VOLTAGE
vs
OSCILLATOR FREQUENCY
3
VCC = 6 V
TA = 25 °C
VO − Error Amplifier Output Voltage − V
PWM Triangle Wave Amplitude Voltage − V
1.8
1.5
Voscmax (100% duty cycle)
1.2
0.9
Voscmin (zero duty cycle)
0.6
0.3
0
10 k
VCC = 6 V
VI(INV) = 1.2 V
VI(NI) = 1 V
TA = 25 °C
2.5
2
1.5
1
0.5
0
100 k
1M
fosc − Oscillator Frequency − Hz
0
10 M
0.2
Figure 8
ERROR AMPLIFIER OUTPUT VOLTAGE
vs
AMBIENT TEMPERATURE
2.46
VO − Error Amplifier Output Voltage − V
3
VO − Error Amplifier Output Voltage − V
0.6
Figure 9
ERROR AMPLIFIER OUTPUT VOLTAGE
vs
OUTPUT (SOURCE) CURRENT
2.5
2
1.5
1
VCC = 6 V
VI(INV) = 0.8 V
VI(NI) = 1 V
TA = 25 °C
0.5
0
0
60
80
100
20
40
IO − Output (Source) Current − µA
120
2.45
VCC = 6 V
VI(INV) = 0.8 V
VI(NI) = 1 V
No Load
2.44
2.43
2.42
2.41
2.40
− 50
25
50
75
− 25
0
TA − Ambient Temperature − °C
Figure 11
Figure 10
8
0.4
IO − Output (Sink) Current − mA
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100
SLVS304A − SEPTEMBER 2000 − REVISED AUGUST 2002
TYPICAL CHARACTERISTICS
OUTPUT DUTY CYCLE
vs
DTC VOLTAGE
ERROR AMPLIFIER OUTPUT VOLTAGE
vs
AMBIENT TEMPERATURE
120
200
180
160
80
60
40
20
140
0
− 25
0
25
50
75
TA − Ambient Temperature − °C
0
100
0.5
Figure 12
1
DTC Voltage − V
1.5
2
Figure 13
ERROR AMPLIFIER CLOSED-LOOP GAIN AND
PHASE SHIFT
vs
FREQUENCY
40
VCC = 6 V
TA = 25 °C
−180°
30
−210°
20
−240°
AV
−270°
10
0
φ
−330°
− 10
− 20
10 k
−300°
φ − Phase Shift
120
− 50
VCC = 6 V
Rt = 100 kΩ
TA = 25 °C
100
Output Duty Cycle − %
220
VCC = 6 V
VI(INV) = 1.2 V
VI(NI) = 1 V
No Load
AV− Error Amplifier Closed-Loop Gain and Phase Shift − dB
VO − Error Amplifier Output Voltage − mV
240
100 k
1M
−360°
10 M
f − Frequency − Hz
Figure 14
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• DALLAS, TEXAS 75265
9
SLVS304A − SEPTEMBER 2000 − REVISED AUGUST 2002
TYPICAL CHARACTERISTICS
OUTPUT SATURATION VOLTAGE
vs
OUTPUT (SINK) CURRENT
DTC OUTPUT CURRENT
vs
RT OUTPUT CURRENT
2
− 60
VCC = 6 V
TA = 25 °C
− 50
VCE − Output Saturation Voltage − V
IO(DT) − DTC Output Current − µ A
DT Voltage = 1.3 V
TA = 25 °C
− 40
− 30
− 20
− 10
0
1.5
1
0.5
0
0
− 10
− 20
− 30
− 40
− 50
− 60
0
IO − RT Output Current − µA
Figure 15
10
5
10
15
IO − Output (Sink) Current − mA
Figure 16
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• DALLAS, TEXAS 75265
20
SLVS304A − SEPTEMBER 2000 − REVISED AUGUST 2002
4
INV
7
RT
8
GND
NI
5
OUT COMP
2
3
DTC
JP1
+
4 VCC
1
8
BOOT
7
HIGHDR
6
BOOTLO
3
2 PGND
DT
5
1 IN
LOWDR
VCC
6
+
+
VTT
GND
APPLICATION INFORMATION
Figure 17. DDRI Application
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
11
SLVS304A − SEPTEMBER 2000 − REVISED AUGUST 2002
APPLICATION INFORMATION
PARTIAL BILL OF MATERIALS
QUANTITY
12
REF DES
PART NUMBER
DESCRIPTION
MANUFACTURER
SIZE
1
C1
UUD1C471MNR1GS
Capacitor, aluminum
Nichicon
0.327 x 0.327
6
C2 − C6, C13
EMK325BJ106MN−B
Capacitor, ceramic
Taiyo Yuden
1210
3
C7, C8, C20
GRM40X7R105K16PT
Capacitor, ceramic, jumper
Murata
805
2
C9, C10
EEF−CD0D101R
Capacitor, aluminum
Panasonic
7343
1
C14
08055A102JAT2A
Capacitor, ceramic
AVX
805
1
C15
GRM39X7R104K016D
Capacitor, ceramic
Murata
603
1
C16
NMC0805X7R224K16TR
Capacitor, ceramic
NIP
603
1
C17
VJ0603Y222KXANT
Capacitor, ceramic
Murata
603
1
C18
C0603C223J3RACTU
Capacitor, ceramic
Kemet
603
1
C19
GRM39X7R223K16
Capacitor, ceramic
Murata
603
1
D1
1SMB5919BT3
Diode, zener, 5.6 V
On Semi
SMB
2
J1, J2
ED1609
Terminal block, 2-pin
OST
1
J3
PTC36SAAN
Header, 4-pin
Sullins
1
JP1
PTC36SAAN
Header, 2-pin
Sullins
1
L1
UP2B−1R0
Inductor, SMT
Coiltronics
1
L2
UP4B−2R2
Inductor, SMT
Coiltronics
4
Q1 − Q4
IRF7811
MOSFET, N−ch, 30 V
IR
SO8
3
R1, R2, R4
Std
Resistor, chip, 4.7 Ω
Std
603
1
R3
Std
Resistor, chip, 2.49 KΩ
Std
603
2
R5, R6
Std
Resistor, chip, 0 Ω
Std
603
1
R7
Std
Resistor, chip, 20 KΩ
Std
603
1
R8
Std
Resistor, chip, 162 KΩ
Std
603
1
R9
Std
Resistor, chip, 1.74 KΩ
Std
603
1
R10
Std
Resistor, chip, 7.32 KΩ
Std
603
1
R11
Std
Open
Std
603
1
R12
Std
Resistor, chip, 15 KΩ
Std
603
1
R13
Std
Resistor, chip, 10 Ω
Std
603
1
R14
Std
Resistor, chip, 10 KΩ
Std
603
4
TP1 − TP3, TP5
240-345
Test point, red, 1 mm
Farnell
0.038
1
TP4
131-4244-00 or 131-5031-00
Adaptor, 3.5 mm probe
Tektronix
0.200
1
TP6
1045-3-17-15-30-14-02-0
Post, wirewrap
Mill-Max
0.043
1
U1
TPS2837D
IC, MOSFET driver
Texas Instruments
SO8
1
U2
TL5002D
IC, low-cost PMW
Texas Instruments
SO8
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
0.55 x 0.41
PACKAGE OPTION ADDENDUM
www.ti.com
18-Jul-2006
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
TL5002CD
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL5002CDG4
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL5002CDR
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL5002CDRG4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL5002ID
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL5002IDG4
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL5002IDR
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL5002IDRG4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
19-Mar-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
Diameter Width
(mm) W1 (mm)
A0 (mm)
B0 (mm)
K0 (mm)
P1
(mm)
W
Pin1
(mm) Quadrant
TL5002CDR
SOIC
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
TL5002IDR
SOIC
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
19-Mar-2008
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TL5002CDR
SOIC
D
8
2500
340.5
338.1
20.6
TL5002IDR
SOIC
D
8
2500
340.5
338.1
20.6
Pack Materials-Page 2
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