FAIRCHILD 74F583

Revised March 1999
74F583
4-Bit BCD Adder
General Description
Features
The ’F583 high-speed 4-bit, BCD full adder with internal
carry lookahead accepts two 4-bit decimal numbers (A0–
A3, B0–B3) and a Carry Input (Cn). It generates the decimal
sum outputs (S0–S3), and a Carry Output (Cn+4) if the sum
is greater than 9. The 'F583 is the functional equivalent of
the 82S83.
■ Adds two decimal numbers
■ Full internal lookahead
■ Fast ripple carry for economical expansion
■ Sum output delay time 16.5 ns max
■ Ripple carry delay time 8.5 ns max
■ Input to ripple delay time 14.0 ns max
■ Supply current 60 mA max
Ordering Code:
Order Number
Package Number
Package Description
74F583SC
M16B
16-Lead Small Outline Intergrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74F583PC
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Logic Symbols
Connection Diagram
IEEE/IEC
Unit Loading/Fan Out
74F
Pin
Names
© 1999 Fairchild Semiconductor Corporation
DS009570.prf
Description
Input IIH/IIL
U.L.
HIGH/LOW Output IOH/IOL
20 µA/−1.2 mA
A0–A3
A Operand Inputs
1.0/2.0
B0–B3
B Operand Inputs
1.0/2.0
20 µA/−1.2 mA
Cn
Carry Input
1.0/1.0
20 µA/−0.6 mA
S0–S3
Sum Outputs
50/33.3
−1 mA/20 mA
Cn+4
Carry Output
50/33.3
−1 mA/20 mA
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74F583 4-Bit BCD Adder
April 1988
74F583
Functional Description
For input values larger than 9, the number is converted
from binary to BCD. Binary to BCD conversion occurs by
grounding one set of inputs, An or Bn, and applying any 4bit binary number to the other set of inputs. If the input is
between 0 and 9, a BCD number occurs at the output. If
the binary input falls between 10 and 15, a carry term is
generated. Both the carry term and the sum are the BCD
equivalent of the binary input. Converting binary numbers
greater than 16 may be achieved through cascading
'F583s.
The ’F583 4-bit binary coded (BCD) full adder performs the
addition of two decimal numbers (A0–A3, B0–B3). The lookahead generates the BCD carry terms internally, allowing
the 'F583 to then do BCD addition correctly. For BCD numbers 0 through 9 at A and B inputs, the BCD sum forms at
the output. In the addition of two BCD numbers totalling a
number greater than 9, a valid BCD number and a carry will
result.
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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2
Storage Temperature
−65°C to +150°C
Ambient Temperature under Bias
−55°C to +125°C
Junction Temperature under Bias
−55°C to +175°C
Recommended Operating
Conditions
Free Air Ambient Temperature
0°C to +70°C
Commercial
−55°C to +150°C
Plastic
Supply Voltage
VCCPin Potential to
+4.5V to +5.5V
Commercial
−0.5V to +7.0V
Ground Pin
Input Voltage (Note 2)
−0.5V to +7.0V
Input Current (Note 2)
−30 mA to +5.0 mA
74F583
Absolute Maximum Ratings(Note 1)
Note 1: Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
Voltage Applied to Output
in HIGH State (with VCC = 0V)
Standard Output
−0.5V to VCC
3-STATE Output
−0.5V to +5.5V
Current Applied to Output
in LOW State (Max)
twice the rated IOL (mA)
DC Electrical Characteristics
Symbol
74F
Parameter
Min
VIH
Input HIGH Voltage
VIL
Input LOW Voltage
VCD
Input Clamp Diode Voltage
VOH
Output HIGH
74F 10% VCC
2.5
Voltage
74F 5% VCC
2.7
VOL
Output LOW
74F 10% VCC
Units
Typ
VCC
Conditions
Max
2.0
V
Recognized as a HIGH Signal
0.8
V
Recognized as a LOW Signal
−1.2
V
Min
IIN = −18 mA
V
Min
IOH = −1 mA
0.5
V
Min
IOL = 20 mA
IOH = −1 mA
Voltage
IIH
Input HIGH Current
20
µA
Max
VIN = 2.7V
IBVI
Input HIGH Current
100
µA
Max
VIN = 7.0V
−0.6
mA
Max
Breakdown Test
IIL
Input LOW Current
−1.2
IOS
Output Short-Circuit Current
ICEX
Output HIGH Leakage Current
ICCL
Power Supply Current
−60
VIN = 0.5V (Cn)
VIN = 0.5V (An, Bn)
−150
mA
Max
VOUT = 0V
250
µA
Max
VOUT = VCC
60
mA
Max
VO = LOW
40
AC Electrical Characteristics
Symbol
Parameter
74F
74F
TA = +25°C
TA, VCC = Com
VCC = +5.0V
CL = 50 pF
Units
CL = 50 pF
Min
Typ
Max
Min
Max
tPLH
Propagation Delay
2.5
13.0
16.5
2.5
17.5
tPHL
An or Bn to Sn
2.5
11.0
14.0
2.5
15.0
tPLH
Propagation Delay
2.5
6.5
8.5
2.5
9.5
tPHL
Cn to Cn+4
2.5
5.0
6.5
2.5
7.5
tPLH
Propagation Delay
4.0
11.0
14.0
4.0
15.0
tPHL
An or Bn to Cn+4
4.0
8.0
10.5
4.0
11.5
3
ns
ns
ns
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74F583
Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Small Outline Intergrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
Package Number M16B
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N16E
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4
74F583 4-Bit BCD Adder
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
1. Life support devices or systems are devices or systems
device or system whose failure to perform can be reawhich, (a) are intended for surgical implant into the
sonably expected to cause the failure of the life support
body, or (b) support or sustain life, and (c) whose failure
device or system, or to affect its safety or effectiveness.
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
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user.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.