To all our customers Regarding the change of names mentioned in the document, such as Mitsubishi Electric and Mitsubishi XX, to Renesas Technology Corp. The semiconductor operations of Hitachi and Mitsubishi Electric were transferred to Renesas Technology Corporation on April 1st 2003. These operations include microcomputer, logic, analog and discrete devices, and memory chips other than DRAMs (flash memory, SRAMs etc.) Accordingly, although Mitsubishi Electric, Mitsubishi Electric Corporation, Mitsubishi Semiconductors, and other Mitsubishi brand names are mentioned in the document, these names have in fact all been changed to Renesas Technology Corp. Thank you for your understanding. Except for our corporate trademark, logo and corporate statement, no changes whatsoever have been made to the contents of the document, and these changes do not constitute any alteration to the contents of the document itself. Note : Mitsubishi Electric will continue the business operations of high frequency & optical devices and power devices. Renesas Technology Corp. Customer Support Dept. April 1, 2003 MITSUBISHI MICROCOMPUTERS M35054-XXXFP/M35055-XXXFP SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS DESCRIPTION PIN CONFIGURATION (TOP VIEW) CP1 TESTA CS SCK SIN AC • Screen composition .............................. 24 characters ✕ 10 lines, • • • • • • • • • • • • • • • • 32 characters ✕ 7 lines Number of characters displayed .................................. 240 (Max.) Character composition ..................................... 12 ✕ 18 dot matrix Characters available ............................. 128 characters (M35054) ............................. 256 characters (M35055) Character sizes available .................... 4 (horizontal) ✕ 4 (vertical) Display locations available Horizontal direction ............................................... 240 locations Vertical direction ................................................... 256 locations Blinking ................................................................. Character units Cycle : approximately 1 second, or approximately 0.5 seconds Duty : 25%, 50%, or 75% Data input .............................. By the serial input function (16 bits) Coloring Background coloring (composite video signal) Blanking Total blanking (14 ✕ 18 dots) Border size blanking Character size blanking Synchronizing signal Composite synchronizing signal generation (PAL, NTSC, M-PAL) 2 output ports (1 digital line) Oscillation stop function It is possible to stop the oscillation for synchronizing signal generation Built-in half-tone display function Built-in reversed character display function Built-in synchronous correction circuit Built-in synchronous separation circuit APPLICATION TV, VCR, Movie REV.1.2 → → → → CVIDEO CVIN 1 20 2 19 3 18 4 5 6 7 VDD2 LECHA FEATURES ← ← → → M35054-XXXFP M35055-XXXFP The M35054-XXXFP and M35055-XXXFP are TV screen display control IC which can be used to display information such as number of channels, the date and messages and program schedules on the TV screen. In particular, owing to the built-in SYNC-SEP (synchronous separation) circuit, the synchronous correction circuit, external circuits can be decrease and character turbulence that occurs when superimposing can be reduced. The processor is suitable for AV systems such as VTRs, LDs, and so on. It is a silicon gate CMOS process and M35054-XXXFP and M35055XXXFP are housed in a 20-pin shrink SOP package. For M35054-001FP/M35055-001FP that are a standard ROM versions of M35054-XXXFP/M35055-XXXFP respectively, the character pattern is also mentioned. 17 VDD1 ← → ← 16 15 14 HOR CP2 OSCIN VSS → → P1 P0 8 13 TESTB 9 12 TESTC 10 11 VSS Outline 20P2Q-A MITSUBISHI MICROCOMPUTERS M35054-XXXFP/M35055-XXXFP SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS PIN DESCRIPTION Symbol Pin name OSC1 Clock input TESTA Test pin input Input/ Output Input — Function This is the filter output pin 1. This is the pin for test. Connect this pin to GND during normal operation. __ CS Chip select input Input This is the chip select pin, and when serial data transmission is being carried out, it goes to “L”. Hysteresis input. Built-in pull-up resistor. SCK Serial clock input Input When CS pin is “L”, SIN serial data is taken in when SCK rises. Hysteresis input. Built-in pull-up resistor. SIN Serial data input Input This is the pin for serial input of data and addresses for the display control register and the display data memory. Hysteresis input. Built-in pull-up resistor. AC Auto-clear input Input When “L”, this pin resets the internal IC circuit. Hysteresis input. Built-in pull-up resistor. VDD2 Power pin CVIDEO Composite video signal output LECHA Character level input Input This is the input pin which determines the “white” character color level in the composite video signal. CVIN Composite video signal input Input This is the input pin for external composite video signals. In superimpose mode, character output etc. is superimposed on these external composite video signals. VSS Earthing pin — Please connect to GND using circuit earthing pin. TESTC Test pin output — This is the pin for test. Open this pin during normal operation. TESTB Test pin input — This is the pin for test. Connect this pin to GND during normal operation. P0 Port P0 output Output This pin outputs the port output or BLNK1 (character background) signal. P1 Port P1 output Output This pin outputs the port output or CO1(character) signal. VSS Earthing pin OSCIN fSC input pin for synchronous signal generation CP2 Filter output HOR Horizontal synchronizing signal input VDD1 Power pin __ __ 2 — Output — Input Output Input — Please connect to +5V with the analog circuit power pin. This is the output pin for composite video signals. It outputs 2VP-P composite video signals. In superimpose mode, character output etc. is superimposed on the external composite video signals from CVIN. Please connect to GND using circuit earthing pin (Analog side). This is the input pin for the sub-carrier frequency (fSC) for generating a synchronous signal. A frequency of 3.580MHz is needed for NTSC, and a frequency of 4.434MHz in needed for PAL and 3.576MHz is needed for M-PAL. Filter output pin 2. This is the input pin for external composite video signals. This pin inputs the external video signal clamped sync-chip to 1.5V, and internally carries out synchronous separation. Please connect to +5V with the digital circuit power pin. 3 13 TESTB 6 11 16 7 AC VSS VSS VDD2 VDD1 20 2 TESTA SIN 5 SCK 4 CS I/O control circuit BLOCK DIAGRAM Display character ROM Display RAM Address control circuit Display control register Data control circuit Timing generator CP1 Blinking circuit Clock oscillation circuit 1 Shift register Display control circuit Reading address control circuit Display location detection circuit H counter Port output circuit NTSC PAL M-PAL video output circuit Timing generator Oscillation circuit for synchronizing signal generation SYNC-SEP circuit 19 HOR P0 P1 15 TESTC 14 12 LECHA CVIN 10 9 CVIDEO CP2 OSCIN 8 18 17 3.580MHz(NTSC) 4.434MHz(PAL) 3.576MHz(M-PAL) MITSUBISHI MICROCOMPUTERS M35054-XXXFP/M35055-XXXFP SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS 3 MITSUBISHI MICROCOMPUTERS M35054-XXXFP/M35055-XXXFP SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS MEMORY CONSTITUTION Address 0016 to EF16 are assigned to the display RAM, address F016 to F816 are assigned to the display control registers. The internal circuit is reset and all display control registers (address F016 to F816) are set to “0” __ and display RAM (address 0016 to EF16) are RAM erased when the AC pin level is “L”. When using M35054-XXXFP, set “0” in any of DA7, DAD through DAF of addresses 0016 through EF16, and of DAE and DAF of ad- DA F DA E DA D DA C DA B DA A DA 9 DA 8 DA 7 DA 6 DA 5 DA 4 DA 3 DA 2 DA 1 DA 0 0 0 0 REV BLINK B G R 0 C6 C5 C4 C3 C2 C1 C0 EF16 F016 F116 F216 F316 F416 F516 F616 F716 F816 Display control register Display RAM Address 0016 dresses F016 through F816. Setting the blank code “FF16” as a character code is an exception. When using M35055-XXXFP, set “0” in any of DAD through DAF of addresses 0016 through EF16, and of DAE and DAF of addresses F016 through F816. TESTn (n : a number) is MITSUBISHI test memory, so be sure to observe the setting conditions. Character color Reverse Blinking Character code B G R 0 0 REV BLINK C6 C5 TEST15 TEST14 TEST13 TEST12 TEST11 TEST10 SYSEP1 SYSEP0 SEPV1 TEST21 TEST20 TEST19 TEST18 TEST17 TEST16 HP7 HP6 HP5 0 0 0 0 0 0 0 0 0 0 TEST27 TEST26 TEST25 TEST24 TEST23 TEST22 VP7 TEST33 TEST32 TEST31 TEST30 TEST29 TEST28 VSZ21 0 0 TEST36 TEST35 TEST34 SPACE 0 0 TEST42 TEST41 TEST40 TEST39 TEST38 TEST37 0 0 0 0 0 0 TEST43 TEST2 TEST1 TEST0 LBLACK LIN24/32 BLKHF BB BG BR LEVEL0 PHASE2 PHASE1 PHASE0 TEST46 TEST45 RGBON TEST44 CL17/18 CBLINK CURS7 CURS6 CURS5 CURS4 CURS3 CURS2 CURS1 CURS0 LEVEL1 TEST51 TEST50 TEST49 TEST48 TEST47 RAMERS DSPON STOP1 STOPIN SCOR EX BLK1 BLK0 DSP9 DSP8 C4 C3 C2 C1 C0 SEPV0 PTD1 PTD0 PTC1 PTC0 HP0 HP4 HP3 HP2 HP1 VP6 VP5 VP4 VP3 VP2 VP1 VP0 VSZ20 VSZ11 VSZ10 HSZ21 HSZ20 HSZ11 HSZ10 DSP2 DSP1 DSP0 DSP7 DSP6 DSP5 DSP4 DSP3 EQP PALH MPAL INT/NON N/P BLINK2 BLINK1 BLINK0 Fig. 1 Memory constitution (M35054-XXXFP) EF16 F016 F116 F216 F316 F416 F516 F616 F716 F816 Display control register 0016 DA F DA E DA D DA C DA B DA A DA 9 DA 8 DA 7 DA 6 DA 5 DA 4 DA 3 DA 2 DA 1 DA 0 0 0 0 REV BLINK B G R C7 C6 C5 C4 C3 C2 C1 C0 Display RAM Address Reverse Blinking B G R C7 0 REV BLINK C6 C5 TEST15 TEST14 TEST13 TEST12 TEST11 TEST10 SYSEP1 SYSEP0 SEPV1 HP7 HP6 HP5 TEST21 TEST20 TEST19 TEST18 TEST17 TEST16 0 0 0 0 0 0 0 0 0 0 VP7 TEST27 TEST26 TEST25 TEST24 TEST23 TEST22 TEST33 TEST32 TEST31 TEST30 TEST29 TEST28 VSZ21 0 0 TEST36 TEST35 TEST34 SPACE 0 0 TEST42 TEST41 TEST40 TEST39 TEST38 TEST37 0 0 0 0 0 0 BB BG BR LEVEL0 PHASE2 PHASE1 PHASE0 TEST43 TEST2 TEST1 TEST0 LBLACK LIN24/32 BLKHF TEST46 TEST45 RGBON TEST44 CL17/18 CBLINK CURS7 CURS6 CURS5 CURS4 CURS3 CURS2 CURS1 CURS0 EX BLK1 BLK0 LEVEL1 TEST51 TEST50 TEST49 TEST48 TEST47 RAMERS DSPON STOP1 STOPIN SCOR Fig. 2 Memory constitution (M35055-XXXFP) 4 Character code Character color DSP9 DSP8 C4 C3 C2 C1 C0 SEPV0 PTD1 PTD0 PTC1 PTC0 HP0 HP4 HP3 HP2 HP1 VP6 VP5 VP4 VP3 VP2 VP1 VP0 VSZ20 VSZ11 VSZ10 HSZ21 HSZ20 HSZ11 HSZ10 DSP2 DSP1 DSP0 DSP7 DSP6 DSP5 DSP4 DSP3 EQP PALH MPAL INT/NON N/P BLINK2 BLINK1 BLINK0 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 A816 A916 AA16 AB16 AC16 AD16 AE16 AF16 B016 B116 B216 B316 B416 B516 B616 B716 B816 B916 BA16 BB16 BC16 BD16 BE16 BF16 C016 C116 C216 C316 C416 C516 C616 C716 C816 C916 CA16 CB16 CC16 CD16 CE16 CF16 D016 D116 D216 D316 D416 D516 D616 D716 7 8 9 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 Fig. 4 Screen constitution (32 characters ✕ 7 lines) Notes 1. The hexadecimal numbers in the boxes show the display RAM address. Notes 2. When 32 characters × 7 lines are displayed, set blank code “FF16” to character code of addresses E016 to EF16. A016 A116 A216 A316 A416 A516 A616 A716 A816 A916 AA16 AB16 AC16 AD16 AE16 AF16 B016 B116 B216 B316 B416 B516 B616 B716 B816 B916 BA16 BB16 BC16 BD16 BE16 BF16 14 C016 C116 C216 C316 C416 C516 C616 C716 C816 C916 CA16 CB16 CC16 CD16 CE16 CF16 D016 D116 D216 D316 D416 D516 D616 D716 D816 D916 DA16 DB16 DC16 DD16 DE16 DF16 13 7 12 6 11 8016 8116 8216 8316 8416 8516 8616 8716 8816 8916 8A16 8B16 8C16 8D16 8E16 8F16 9016 9116 9216 9316 9416 9516 9616 9716 9816 9916 9A16 9B16 9C16 9D16 9E16 9F16 10 6016 6116 6216 6316 6416 6516 6616 6716 6816 6916 6A16 6B16 6C16 6D16 6E16 6F16 7016 7116 7216 7316 7416 7516 7616 7716 7816 7916 7A16 7B16 7C16 7D16 7E16 7F16 9 5 8 4 7 4016 4116 4216 4316 4416 4516 4616 4716 4816 4916 4A16 4B16 4C16 4D16 4E16 4F16 5016 5116 5216 5316 5416 5516 5616 5716 5816 5916 5A16 5B16 5C16 5D16 5E16 5F16 6 2016 2116 2216 2316 2416 2516 2616 2716 2816 2916 2A16 2B16 2C16 2D16 2E16 2F16 3016 3116 3216 3316 3416 3516 3616 3716 3816 3916 3A16 3B16 3C16 3D16 3E16 3F16 5 3 4 2 3 0016 0116 0216 0316 0416 0516 0616 0716 0816 0916 0A16 0B16 0C16 0D16 0E16 0F16 1016 1116 1216 1316 1416 1516 1616 1716 1816 1916 1A16 1B16 1C16 1D16 1E16 1F16 2 1 1 The screen lines and rows are determined from each address of the display RAM. The screen consitution (24 characters ✕ 10 lines) is shown in Figure 3 the screen constitution (32 characters ✕ 7 lines) is shown in 4. Lines Rows Fig. 3 Screen constitution (24 characters ✕ 10 lines) Note : The hexadecimal numbers in the boxes show the display RAM address. 10 D816 D916 DA16 DB16 DC16 DD16 DE16 DF16 E016 E116 E216 E316 E416 E516 E616 E716 E816 E916 EA16 EB16 EC16 ED16 EE16 EF16 7816 7916 7A16 7B16 7C16 7D16 7E16 7F16 8016 8116 8216 8316 8416 8516 8616 8716 8816 8916 8A16 8B16 8C16 8D16 8E16 8F16 9016 9116 9216 9316 9416 9516 9616 9716 9816 9916 9A16 9B16 9C16 9D16 9E16 9F16 A016 A116 A216 A316 A416 A516 A616 A716 6 6016 6116 6216 6316 6416 6516 6616 6716 6816 6916 6A16 6B16 6C16 6D16 6E16 6F16 7016 7116 7216 7316 7416 7516 7616 7716 9 4816 4916 4A16 4B16 4C16 4D16 4E16 4F16 5016 5116 5216 5316 5416 5516 5616 5716 5816 5916 5A16 5B16 5C16 5D16 5E16 5F16 8 5 7 4 6 3016 3116 3216 3316 3416 3516 3616 3716 3816 3916 3A16 3B16 3C16 3D16 3E16 3F16 4016 4116 4216 4316 4416 4516 4616 4716 5 1816 1916 1A16 1B16 1C16 1D16 1E16 1F16 2016 2116 2216 2316 2416 2516 2616 2716 2816 2916 2A16 2B16 2C16 2D16 2E16 2F16 4 3 3 2 2 0016 0116 0216 0316 0416 0516 0616 0716 0816 0916 0A16 0B16 0C16 0D16 0E16 0F16 1016 1116 1216 1316 1416 1516 1616 1716 1 1 Lines Rows MITSUBISHI MICROCOMPUTERS M35054-XXXFP/M35055-XXXFP SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS SCREEN CONSTITUTION 5 MITSUBISHI MICROCOMPUTERS M35054-XXXFP/M35055-XXXFP SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS Display RAM DESCRIPTION Display RAM Address 0016 to EF16 DA 0 1 Contents Name Status Function C0 0 (LSB) 1 Set ROM-held character code of a character needed to display. 0~C Remarks 0 C1 1 2 0 C2 1 3 0 C3 1 4 0 C4 1 5 0 C5 1 6 7 8 C6 0 (MSB) 1 — R 0 Set to “0” during normal operation 1 Can not be used 0 When RGBON=1, set background color by character unit. Refer to supplemental explanation (3). 0 No blinking 1 Blinking Refer to BLINK2 to 0 (address F516) 0 Normal character 1 Reversed character 1 9 (Note 2) 0 G 1 A 0 B 1 B C BLINK REV __ Notes 1. Resetting at the AC pin RAM-erases the display RAM, and the status turns as indicated by the mark 2. Set to “1” only when setting a blank code. When using M35055-XXXFP, DA7 is C7 (MSB). 6 around in the status column. MITSUBISHI MICROCOMPUTERS M35054-XXXFP/M35055-XXXFP SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS Display control register (1) Address F016 DA 0 1 2 3 4 5 6 Contents Register 0~D Status PTC0 PTC1 PTD0 PTD1 SEPV0 SEPV1 SYSEP0 0 P0 output (port 0) 1 BLNK1 output 0 P1 output (port 1) 1 CO1 output Refer to supplemental explanation (4). 0 It is negative polarity at P0 output “L”, BLINK1 output. Control the port data 1 It is positive polarity at P0 output “H”, BLINK1 output. 0 It is negative polarity at P01 output “L”, CO1 output. 1 It is positive polarity at P01 output “H”, CO1 output. Refer to supplemental explanation (4). 0 It should be fixed to “0”. 1 Can not be used. Specifies the vertical synchronous separation criterion 0 It should be fixed to “0”. 1 Can not be used. 0 1 7 SYSEP1 0 1 8 9 A B TEST10 TEST11 TEST12 TEST13 Remarks Function SYSEP1 0 0 1 1 Port output control Refer to supplemental explanation (1). SYSEP0 0 1 0 1 0 It should be fixed to “0”. 1 Can not be used. 0 It should be fixed to “0”. 1 Can not be used. 0 Can not be used. 1 It should be fixed to “1”. 0 It should be fixed to “0”. 1 Can not be used. Bias potential Can not be used. Can not be used. 1.75V Can not be used. Specifies the sync-bias potential It should be fixed to “0”. 0 C TEST14 1 D TEST15 Can not be used. 0 It should be fixed to “0”. 1 Can not be used. __ Note: The mark Notes around the status value means the reset status by the “L” level is input to AC pin. 7 MITSUBISHI MICROCOMPUTERS M35054-XXXFP/M35055-XXXFP SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS (2) Address F116 DA 0~D 0 Register Contents Status HP0 0 (LSB) 1 Remarks Function Let horizontal display start position be HS, 7 1 HP1 0 HS = T ✕ (Σ 2nHPn+6) n=0 1 2 HP2 HOR Set the horizontal display start position by use of HP7 through HP0. HP7 to HP0 = (00000000) to (00001111) setting is forbidden. 0 1 3 HP3 0 1 HP4 1 5 HP5 0 VS VERT 4 0 HS 1 6 HP6 0 1 7 8 9 A B C D 8 HP7 0 (MSB) 1 TEST16 TEST17 TEST18 TEST19 TEST20 TEST21 Character displaying area T : The oscillation cycle of display clock 0 Can not be used. 1 It should be fixed to “1”. 0 Can not be used. 1 It should be fixed to “1”. 0 Can not be used. 1 It should be fixed to “1”. 0 Can not be used. 1 It should be fixed to “1”. 0 Can not be used. 1 It should be fixed to “1”. 0 It should be fixed to “0”. 1 Can not be used. It can be set this up to 240 steps in increments of one T. MITSUBISHI MICROCOMPUTERS M35054-XXXFP/M35055-XXXFP SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS (3) Address F216 DA 0~D 0 1 Contents Register Status VP0 0 (LSB) 1 VP1 0 Let vertical display start position be VS, 7 VS = H ✕ n=0 Σ 2nVPnVS 1 2 VP2 Remarks Function HOR 0 It can be set this up to 249 steps in increments of one H. 1 3 VP3 0 1 VP4 0 1 5 VP5 0 VS VERT 4 HS 1 6 VP6 8 9 A B C D VP7 0 (MSB) 1 TEST22 TEST23 TEST24 TEST25 TEST26 TEST27 VP7 to VP0 = (00000000) to (00100011) setting is forbidden. Character displaying area 0 1 7 Set the vertical display start position by use of VP7 through VP0. VP7 to VP0 = (00000000) to (00000110) setting is forbidden. H : The oscillation cycle of horizontal synchronous signal 0 Can not be used. 1 It should be fixed to “1”. 0 Can not be used. 1 It should be fixed to “1”. 0 Can not be used. 1 It should be fixed to “1”. 0 Can not be used. 1 It should be fixed to “1”. 0 Can not be used. 1 It should be fixed to “1”. 0 It should be fixed to “0”. 1 Can not be used. 9 MITSUBISHI MICROCOMPUTERS M35054-XXXFP/M35055-XXXFP SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS (4) Address F316 DA Status 0~D 0 1 2 3 4 5 6 7 8 9 A B C D 10 Contents Register HSZ10 HSZ11 HSZ20 HSZ21 VSZ10 VSZ11 VSZ20 VSZ21 TEST28 TEST29 TEST30 TEST31 TEST32 TEST33 Remarks Function 0 HSZ11 HSZ10 Horizontal direction size 1 0 0 1T/dot 0 1 2T/dot 0 1 0 3T/dot 1 1 1 4T/dot 0 HSZ21 HSZ20 Horizontal direction size 1 0 0 1T/dot 0 1 2T/dot 0 1 0 3T/dot 1 1 1 4T/dot 0 VSZ11 VSZ10 Vertical direction size 1 0 0 1H/dot 0 1 2H/dot 0 1 0 3H/dot 1 1 1 4H/dot 0 VSZ21 VSZ20 Vertical direction size 1 0 0 1H/dot 0 1 2H/dot 0 1 0 3H/dot 1 1 1 4H/dot 0 It should be fixed to “0”. 1 Can not be used. 0 It should be fixed to “0”. 1 Can not be used. 0 It should be fixed to “0”. 1 Can not be used. 0 It should be fixed to “0”. 1 Can not be used. 0 It should be fixed to “0”. 1 Can not be used. 0 It should be fixed to “0”. 1 Can not be used. Character size setting in the horizontal direction for the first line. Character size setting in the horizontal direction for the 2nd line to 10th line. Character size setting in the vertical direction for the first line. Character size setting in the vertical direction for the 2nd line to 10th line. MITSUBISHI MICROCOMPUTERS M35054-XXXFP/M35055-XXXFP SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS (5) Address F416 DA 0~D 0 Contents Register Status DSP0 Remarks Function 0 Set the display mode of line 1. 1 1 DSP1 0 1 2 DSP2 0 1 3 DSP3 0 1 4 DSP4 0 BLK1 BLK0 DSPn= “1” DSPn= “0” 0 0 Matrix-outline border size Matrix-outline size 0 1 1 0 Character size Border size Matrix-outline size Border size 1 1 Character size Matrix-outline size Depends on BLK0 and BLK1 (address F816) DSPn in the generic name for DSP0 to DSP9. DSP0 to DSP9 are each controlled independently. Set the display mode of line 2. Set the display mode of line 3. Set the display mode of line 4. Set the display mode of line 5. 1 5 DSP5 Set the display mode of line 6. 0 1 6 DSP6 0 Set the display mode of line 7. 1 7 DSP7 0 Set the display mode of line 8. 1 8 DSP8 Set the display mode of line 9. 0 1 9 DSP9 0 Set the display mode of line 10. 1 A 0 Normal display 1 Put a space line between line 2 and line 3, and between line 8 and line 9. 0 It should be fixed to “0”. 1 Can not be used. 0 It should be fixed to “0”. 1 Can not be used. 0 It should be fixed to “0”. 1 Can not be used. SPACE B TEST34 C TEST35 D TEST36 Put a space line between line 2 and line 3 in displaying 32 characters. 11 MITSUBISHI MICROCOMPUTERS M35054-XXXFP/M35055-XXXFP SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS (6) Address F516 DA 0~D 0 1 2 BLINK0 BLINK1 ______________________ 4 0 BLINK0 BLINK1 Duty 1 0 0 Blinking off 0 1 25% 0 1 0 50% 1 1 1 75% 0 Division of vertical synchronizing signal into 1/64. Cycle approximately 1 second. 1 Division of vertical synchronizing signal into 1/32. Cycle approximately 0.5 second. 0 NTSC, M-PAL mode 1 PAL mode 0 Interlace 1 Non interlace BLINK2 N/P INT/NON Remarks Function Status _____ 3 Contents Register 5 MPAL 1 Scanning lines control (only in internal synchronization) N/P MPAL Synchronous mode 0 0 NTSC 0 1 M-PAL 1 0 PAL 1 1 Not available INT/NON Number of scanning lines 0 625H lines 1 626H lines 0 627H lines 1 628H lines __ PALH 0 6 0 PALH 1 7 8 9 A B C D EQP TEST37 TEST38 TEST39 TEST40 TEST41 TEST42 1 0 Not include the equivalent pulse. 1 Include the equivalent pulse. 0 It should be fixed to “0”. 1 Can not be used. 0 It should be fixed to “0”. 1 Can not be used. 0 It should be fixed to “0”. 1 Can not be used. 0 It should be fixed to “0”. 1 Can not be used. 0 It should be fixed to “0”. 1 Can not be used. 0 It should be fixed to “0”. 1 Can not be used. Note. To blink a character, set 1 to DAB (the blinking bit) of the display RAM. 12 Blinking cycle can be altered. Refer to register MPAL _ 0 Blinking duty ratio can be altered. (Note) Synchronizing signal is selected _ with this register and N/P register. It should be fixed to “0” at NTSC Effective only at non-interlace MITSUBISHI MICROCOMPUTERS M35054-XXXFP/M35055-XXXFP SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS (7) Address F616 DA Contents Register 0~D 0 0 PHASE0 1 0 1 PHASE1 1 0 2 PHASE2 1 3 LEVEL0 4 BG 1 0 BB 1 7 BLKHF __________ 8 9 A B C D LIN24/32 LBLACK TEST0 TEST1 TEST2 TEST43 0 Black 0 0 1 Red 0 1 0 Green 0 1 1 Yellow 1 0 0 Blue 1 0 1 Magenta 1 1 0 Cyan 1 1 1 White Internal bias on 0 6 0 1 BR Raster 0 Internal bias off 1 5 Raster color setting PHASE2 PHASE1 PHASE0 0 0 Remarks Function Status Refer to supplemental explanation (2) about video signal level Generates bias potential for composite video signals BB BG BR Character background color 0 0 0 Black 0 0 1 Red 0 1 0 Green 0 1 1 Yellow 1 0 0 Blue 1 0 1 Magenta 1 1 0 Cyan 1 1 1 White 0 The halftone displaying “OFF” in superimpose 1 The halftone displaying “ON” in superimpose 0 24 characters ✕ 10 lines display 1 32 characters ✕ 7 lines display 0 Blanking level I 2.3V 1 Blanking level II 2.1V 0 It should be fixed to “0”. 1 Can not be used. 0 It should be fixed to “0”. 1 Can not be used. 0 It should be fixed to “0”. 1 Can not be used. 0 Can not be used. 1 It should to be fixed to “1”. Character background color setting. Refer to supplemental explanation (2) about video signal level This register is available in the superimpose displaying only. (Note) Set a blackness level Note. It is neccessary to input the external composite video signal to the CVIN pin, and externally connect a 100 to 200Ω register in series. 13 MITSUBISHI MICROCOMPUTERS M35054-XXXFP/M35055-XXXFP SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS (8) Address F716 DA 0~D 0 Contents Register Function Status CUR0 0 Let cursor displaying address be CURS, 1 1 CUR1 0 7 1 2 CUR2 CURS = Σ 2nCURn n=0 0 CUR3 0 1 4 CUR4 CUR5 CUR7 to CUR0 (11110000) setting is forbidden under 24 characters display. Set CUR7 to CUR0 = (11111111) under cursor is not be displayed. 0 1 5 Set the cursor displaying address by use of CUR7 through CUR0. CUR7 to CUR0 (11100000) setting is forbidden under 32 characters display. 1 3 Remarks The cursor displaying address (CURS) is correspond to display construction. 0 1 6 CUR6 0 1 7 CUR7 0 1 8 CBLINK __________ 9 A B C D 14 CL17/18 TEST44 RGBON TEST45 TEST46 0 No blinking 1 Blinking 0 Cursor displaying at the 17th dot by vertical direction. 1 Cursor displaying at the 18th dot by vertical direction. 0 It should be fixed to “0”. 1 Can not be used. 0 Normal 1 Character background coloring 0 It should be fixed to “0”. 1 Can not be used. 0 It should be fixed to “0”. 1 Can not be used. The cursor blinking setting Refer to character construction. Refer to supplemental explanation (3). MITSUBISHI MICROCOMPUTERS M35054-XXXFP/M35055-XXXFP SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS (9) Address F816 DA Contents Register 0~D 0 0 BLK0 1 0 1 BLK1 Remarks Function Status BLK1 BLK0 DSPn= “1” 0 0 0 1 Border size Character size 1 0 Matrix-outline size Border size 1 1 Character size Matrix-outline size Matrix-outline border size DSPn= “0” Display mode (BLNK output) variable Matrix-outline size 1 2 3 4 5 6 7 8 9 A B C D EX SCOR STOPIN STOP1 DSPON RAMERS TEST47 TEST48 TEST49 TEST50 TEST51 LEVEL1 0 External synchronization 1 Internal synchronization 0 Superimpose monotone display 1 Superimpose coloring display (only NTSC) “1” setting is forbidden at internal synchronous or PAL, M-PAL mode displaying. 0 fSC input mode OSCIN oscillation control 1 Can not be used. 0 Oscillation VCO for display 1 Stop oscillation VCO for display 0 Display OFF 1 Display ON 0 RAM not erased 1 RAM erased 0 Can not be used. 1 It should be fixed to “1”. 0 Can not be used. 1 It should be fixed to “1”. 0 Can not be used. 1 It should be fixed to “1”. 0 Can not be used. 1 It should be fixed to “1”. 0 Can not be used. 1 It should be fixed to “1”. 0 Internal bias OFF Synchronizing signal switching (Note1) Control oscillation VCO for display This register does not exist (Note 3). Generates bias potential for synchronous separation. Internal bias ON 1 Notes 1. In dealing with the internal synchronization, cut off external video signals outside the IC. The leakage of external input video signals can be avoided. Notes 2. In displaying color superimposition, enter into the OSCIN pin the fSC signal that phase-synchronizes with the color burst of the composite video signals (input to the CVIN pin). Notes 3. Erases all the display RAM. The character code turns to blank-FF16, the encode data bit and the blinking bit turn to “1” respectively, and reversed character bit turns to “0”. 15 MITSUBISHI MICROCOMPUTERS M35054-XXXFP/M35055-XXXFP SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS Supplemental explanation about display control register (1) How to effect synchronous separation from composite video signals Synchronous separation is effected as follows depending on the width of L-level of the vertical synchronous period. 1. Less than 8.4µs ······ Not to be determined to be a vertical synchronous signal. 2. Equal to or higher than 8.4µs but less than 15.6µs ······ When two clocks continue, if take place, it is “L” period is determined to be a vertical synchronization signal. 3. Equal to or higher than 15.6µs ······ It is “L” period is determined to be a vertical synchronous signal with no condition. The determination is made at the timing indicated by V in Fig.4 either in case 2 or in case 3. Sequence of synchronizing pulse Composite video signal 8.4µs Equalizing pulse 8.4µs 15.6µs Vertical synchronous signal Fig. 5 The method of synchronous separation from composite video signal. 16 V MITSUBISHI MICROCOMPUTERS M35054-XXXFP/M35055-XXXFP SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS (2) Video signal level VDD : 5.0V, Ta : 25°C Phase angle (rad) Color Brightness level (V) Amplitude ratio (to color burst) NTSC method PAL, M-PAL method Min. Typ. Max. Min. Typ. Max. Sync-chip — — 1.3 1.5 1.7 — — — Pedestal — — 1.9 2.1 2.3 — — — ±4 /16 Color burst 0 1.9 2.1 2.3 — 1.0 — Black — — 2.1 2.3 2.5 — — — Red 7 /16 ± 2 /16 ± 7 /16 ± 2 /16 2.3 2.5 2.7 1.5 3.0 4.5 Green 27 16 ± 2 /16 5 /16 ± 2 /16 2.7 2.9 3.1 1.4 2.8 4.2 /16 ± 2 /16 ± /16 ± 2 /16 Yellow ± 3.1 3.3 3.5 1.0 2.0 3.0 Blue 17 /16 ± 2 /16 ± 15 /16 ± 2 /16 2.0 2.2 2.4 1.0 2.0 3.0 Magenta 11 /16 ± 2 /16 ± 11 /16 ± 2 /16 2.5 2.7 2.9 1.4 2.8 4.2 Cyan 23 /16 ± 2 /16 9 /16 ± 2 /16 2.9 3.1 3.3 1.5 3.0 4.5 White — — 3.1 3.3 3.5 — — — ± R-Y CB1 RS1 /4 CB B-Y - /4 CB2 RS2 CB Color burst under NTSC Color burst under PAL or M-PAL CB1,CB2 Color subcarrier under PAL or M-PAL RS1,RS2 Fig. 6 Bector phases (3) Setting RGBON (address F716) RGBON = “0” ..... Sets background colors depending on BB, BG, and BR (address F616), screen by screen. RGBON = “1” ..... Sets background colors depending on R, G, B (address 0016 to EF16), character by character. The color setting is shown below. Color Setting B G R Color 0 0 0 Black 0 0 1 Red 0 1 0 Green 0 1 1 Yellow 1 0 0 Blue 1 0 1 Magenta 1 1 0 Cyan 1 1 1 White 17 MITSUBISHI MICROCOMPUTERS M35054-XXXFP/M35055-XXXFP SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS (4) Port output and BLNK1, CO1 output PTD0 (PTD1) BLNK1 (CO1) PTC0 (PTC1) 1 1 Output 0 0 Polarity switching PTD0 (PTD1) Select PTD0, 1, PTC0, 1 (Address F016) Fig. 7 Example of port control (5) Setting conditions for oscillating or stopping the display clock at display clock operating at display clock stop STOP1 0 1 DSPON 1 0 CS pin L H STOP1, CDSPON (Address F816) (6) Setting condition at LEVEL0,1 Internal synchronous External synchronous Now-working condition (no characters are displayed) LEVEL0 1 1 0 LEVEL1 0 1 0 Operation state (Character display) LEVEL0 (address F616), LEVEL1 (address F816) 18 MITSUBISHI MICROCOMPUTERS M35054-XXXFP/M35055-XXXFP SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS DISPLAY FORMS M35054-XXXFP/M35055-XXXFP have the following four display forms as the blanking function, when CO1 and BLNK1 are output. (1) Character size : Blanking same as the character size. (2) Border size : Blanking the background as a size from character. (3) Matrix-outline size: Blanking the background as a size from all character font size. (4) Matrix-outline : Blanking the background as a size from all border size character font size. Border display. 12 dots 12 dots a a This display format allows each line to be controlled independently, so that two kinds of display formats can be combined on the same screen. 14 dots 14 dots Scanning line 18 dots CO1 ✽ BLNK1✽ CVIDEO a (1) Character size a (2) Border size (3) Matrix-outline size (4) Matrix-outline border size Note: In this case, the output polarity that CO1 ✽ and BLNK1 ✽ is positive. a: Background carrier color signal Fig. 8 Display forms at each display mode 19 MITSUBISHI MICROCOMPUTERS M35054-XXXFP/M35055-XXXFP SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS DATA INPUT EXAMPLE Data of display RAM and display control registers can be set by then serial input function. Owing to automatic address increment, not necessary to enter addresses for the second and subsequent data. In automatically, the next of address F816 is assigned to address 0016. Fig. 9 shows an example of data setting by the serial input function (M35054-XXXFP), Fig. 10 shows an example of data setting by the serial input function (M35055-XXXFP). NO. Data contewts Address/Data Spplemental explanation DA DA F E DA D DA C DA B DA A DA 9 DA 8 DA 7 DA 6 DA 5 DA 4 DA 3 DA 2 DA 1 DA 0 1 Address(F8 16) Address setting 0 0 0 0 0 0 0 0 1 1 1 1 1 0 0 0 2 Data(F8 16) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3 Data(00 16) 0 0 0 REV BLINK B G R 0 C6 C5 C4 C3 C2 C1 C0 4 Data(01 16) 0 0 0 REV BLINK B G R 0 C6 C5 C4 C3 C2 C1 C0 241 Data(EE 16) 0 0 0 REV BLINK B G R 0 C6 C5 C4 C3 C2 C1 C0 242 Data(EF 16) 0 0 0 REV BLINK B G R 0 C6 C5 C4 C3 C2 C1 C0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 1 1 1 HP 6 VP 6 VSZ 20 DSP 6 HP 5 VP 5 VSZ 11 DSP 5 HP 4 VP 4 VSZ 10 DSP 4 PTD 1 HP 3 VP 3 HSZ 21 DSP 3 PTD 0 HP 2 VP 2 HSZ 20 DSP 2 Display OFF Display RAM address 00 16 to EF16 setting 243 Data(F0 16) 244 Data(F1 16) 245 Data(F2 16) 0 0 0 1 1 1 246 Data(F3 16) 0 0 0 0 0 0 247 Data(F4 16) 0 0 0 0 0 SPACE 248 Data(F5 16) 0 0 0 0 0 0 249 Data(F6 16) 0 LIN TEST TESTTEST 1 2 1 0 LBLACK 24/32 BLKHF BB 250 251 Register address F0 16 to F716 setting 0 Data(F7 16) Data(F8 16) 0 Display ON 0 0 0 HP 7 VP 1 1 7 VSZ 0 0 21 DSP DSP DSP 9 8 7 1 1 0 0 0 0 RGBON 0 CL 17/18 LEVEL 1 1 1 1 1 Fig. 9 Example of data setting by the serial input function (M35054-XXXFP) 20 INT EQP PALH MPAL /NON N/P PTC PTC 1 0 HP HP 1 0 VP VP 1 0 HSZ HSZ 11 10 DSP DSP 1 0 BLINK BLINK BLINK 2 1 0 LEVEL PHASE PHASE PHASE BG BR 0 2 1 0 CURS CURS CURS CURS CURS CURS CURS CURS CBLINK 1 7 6 5 4 3 RAM STOP STOP SCOR DSPON ERS IN 1 2 EX 1 0 BLK BLK 0 1 MITSUBISHI MICROCOMPUTERS M35054-XXXFP/M35055-XXXFP SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS NO. Data couteuts Address/Data Supplemental explauation DA DA F E DA D DA C DA B DA A DA 9 DA 8 DA 7 DA 6 DA 5 DA 4 DA 3 DA 2 DA 1 DA 0 1 Address(F8 16) Address setting 0 0 0 0 0 0 0 0 1 1 1 1 1 0 0 0 Display OFF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 REV BLINK B G R C7 C6 C5 C4 C3 C2 C1 C0 0 0 0 REV BLINK B G R C7 C6 C5 C4 C3 C2 C1 C0 241 Data(EE 16) 0 0 REV BLINK B G R C7 C6 C5 C4 C3 C2 C1 C0 242 Data(EF 16) 0 0 0 REV BLINK B G R C7 C6 C5 C4 C3 C2 C1 C0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 1 1 1 245 Data(F2 16) 0 0 0 1 1 1 246 Data(F3 16) 0 0 0 0 0 0 247 Data(F4 16) 0 0 0 0 0 SPACE HP 6 VP 6 VSZ 20 DSP 6 HP 5 VP 5 VSZ 11 DSP 5 HP 4 VP 4 VSZ 10 DSP 4 PTD 1 HP 3 VP 3 HSZ 21 DSP 3 PTD 0 HP 2 VP 2 HSZ 20 DSP 2 248 Data(F5 16) 0 0 0 0 0 0 0 LIN TEST TEST TEST 1 2 1 0 LBLACK 24/32 BLKHF BB 2 Data(F8 16) 3 Data(00 16) 4 Data(01 16) 243 Data(F0 16) 244 Data(F1 16) Display RAM address 00 16 to EF 16 setting Register address F0 16 to F7 16 setting 249 Data(F6 16) 0 250 Data(F7 16) 251 Data(F8 16) 0 Display ON 0 0 0 0 LEVEL 1 0 1 RGBON 1 0 1 HP 7 VP 1 1 7 VSZ 0 0 21 DSP DSP DSP 9 8 7 1 1 0 0 CL 17/18 CBLINK 1 1 INT EQP PALH MPAL /NON N/P PTC PTC 1 0 HP HP 1 0 VP VP 1 0 HSZ HSZ 11 10 DSP DSP 1 0 BLINK BLINK BLINK 2 1 0 LEVEL PHASE PHASE PHASE BG BR 0 2 1 0 CURS CURS CURS CURS CURS CURS CURS CURS 7 6 5 4 3 STOP STOP RAM SCOR DSPON ERS IN 1 2 EX 1 0 BLK BLK 1 0 Fig. 10 Example of data setting by the serial input function (M35055-XXXFP) 21 MITSUBISHI MICROCOMPUTERS M35054-XXXFP/M35055-XXXFP SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS SERIAL DATA INPUT TIMING (1) The address consists of 16 bits. (2) The data consists of 16 bits. __ (3) The 16 bits in the SCK after the CS signal has fallen are the address, and for succeeding input data, the address is incremented every 16 bits. CS SCK SIN LSB MSB LSB Address (16 bit) Data N (16 bit) MSB LSB MSB Data N+1 (16 bit) N =1, 2, 3 Fig. 11 Serial input timing 22 MITSUBISHI MICROCOMPUTERS M35054-XXXFP/M35055-XXXFP SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS CHARACTER FONT Images are composed on a 12 ✕ 18 dot matrix, and characters can be linked vertically and horizontally with other characters to allow the display the continuous symbols. Character code “FF16” is so fixed as to be blank and to have no background, thus cannot assign a character font to this code. (1) Border display (set by register BLK0, 1 (address F816)) 12 dots 18 dots When the character extends to the top dot of the matrix, no border is left at the top. When the character extends to the bottom (18th) dot of the matrix, no border is left at the bottom. Note: Hatching represents border. (2) Cursor display (Border display) Character Note: When the cursor positioning at the bottom (18th) dot, no border is left at the bottom. Positioning the cursor at the 17th dot. Register CL17/18 (address F716) = “0” Positioning the cursor at the 18th dot. Register CL17/18 =“0” Fig. 12 Character font and border 23 24 470 Fig. 13 M35054-XXXFP/M35055-XXXFP example of peripheral circuit + 120 220 2.2k 47µ + 470P Note 3 Note 4 1µ + 0.22µ 1.5k 10 9 8 7 6 5 4 3 2 CVIN LECHA CVIDEO VDD2 AC SIN SCK CS TESTA CP1 1µ 100µ 1 + + +5.0V VSS TESTC TESTB P0 P1 VSS OSCIN CP2 HOR VDD1 Note 4: Construct integral circuit by built-in 30kΩ of AC pin and an external condenser. Attention to supply voltage rise time about this CR constant. Note 5: External loop filter 2 constant is provisional valve. Note 6: Connect fSC frequency. 0.3Vp-p VOSCIN 4.0Vp-p NTSC = 3.580MHz PAL= 4.434MHz M-PAL= 3.576MHz Note 7 1.50V Note 1 10k +5.0V Note 1: Clamp sync chip to 1.50V. Note 2: Set basic electric potential in consid eration of dynamic range of the transistor. Note 3: External loop filter 1 constant is provisional valve. 75 220µ +7.0V 150 +7.0V Composite video signal input 47 µ + Note 2 From microcomputer External composite video signal input 0.1µ 1k fsc 0.01µ 0.01µ Delay circuit 1µ + Note 5 Note 6 47P In displaying color superimposition, enter into the OSCIN pin the f SC signal that phase-synchronizes with the color burst of the composite video signals (input to the CVIN pin). Note 7: In dealing with the internal synchronization, cut off external video signals outside the IC. The leakage of external input video signals can be avoided. 11 12 13 14 15 16 17 18 19 20 100µ + +5.0V MITSUBISHI MICROCOMPUTERS M35054-XXXFP/M35055-XXXFP SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS M35054-XXXFP/M35055-XXXFP PERIPHERAL CIRCUIT MITSUBISHI MICROCOMPUTERS M35054-XXXFP/M35055-XXXFP SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS Precautions (1) Points to note in setting the display RAMs a) Be careful to the edges may sway depending on the combination of character’s background color and raster color. Edge sway Fig. 14 Example of display b) If what display exceeds the display area in dealing with external synchronization, (if use double - size characters), set the character code of the addresses lying outside that display area blank code – “FF16”. Outside of display area Outside of display area Inside of display Inside of display 0016 0B16 0C16 1716 1816 2316 2416 2F16 3016 4716 4816 5F16 C016 D716 D816 EF16 Numbers are adresses Set blank code “FF16” to character code of part. Fig. 15 Example of display 25 MITSUBISHI MICROCOMPUTERS M35054-XXXFP/M35055-XXXFP SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS (2) Before setting registers at the starting of system, be sure to reset __ the M35052-XXXSP/FP by applying “L” level to the AC pin. (3) Power supply noise When power supply noise is generated, the internal oscillator circuit does not stabilize, whereby causing horizontal jitters across the picture display. Therefore, connect a bypass capacitor between the power supply and GND. (4) Synchronous correction action When switching channel or in the special playback mode (quick playback, rewinding, and so on) of VTR, effect of synchronous correction becomes strong, and distortion of a character is apt to occur because the continuity of video signal is suddenly switched. When the continuity of video signal is out of order, erasure of displayed characters is recommended in a extreme short time to raise the quality of displayed characters. (5) Notes on fSC signal input This IC amplifies the subcarrier frequency (fSC) signal (NTSC, MPAL system: 3.58MHz, PAL system: 4.43MHz) input to the OSCIN pin (17-pin) and generates the composite video signal internally. The amplified fSC signal can be destabilized in the following cases. a) When the fSC signal is outside of recommended operating conditions. b) When the waveform of the fSC signal is distorted. c) When DC level in the fSC waveform fluctuates. When the amplified signal is unstable, the composite video signal generated inside the IC is also unstable in terms of synchronization with the subcarrier and phase. Consequently, this results in color flicker and lost synchronization when the composite video signal is generated. Make note of the fact that this may prevent a stable blue background from being formed. (6) Forbidding to stop entering the fSC signal This IC doesn’t properly work if the fSC signal is not entered into the OSCIN pin (pin 17), so don’t stop the fSC signal so as to work the IC. To stop the IC, turn the display off (set 0 in the register DSPON (address F816).) (7) Forbidding to set data during the period in which the internal oscillation circuit stabilizes a) To start entering the fSC signal when its input is stopped. b) To start oscillating the oscillation circuit for display when its oscillation is stopped. (to assign “1” to the register STOP1 (address F816) when it is assigned “0”, or the like.) c) To turn on the internal bias when it is turned off. (to assign “1” to the register LEVEL1 (address F816) when it is assigned “0”.) There can be instances in which data are not properly set in the registers until the internal oscillation circuit stabilizes, so follow the steps in sequence as given below. 1) Set “0” in the register DSPON (address F816). (the display is turned off) 2) Effect the settings a), b), and c) given above. 26 3) Wait 20 ms (the period necessary for the internal oscillation circuit to stabilize) before entering data. 4) Set necessary data in other registers, and make the display RAM ready. MITSUBISHI MICROCOMPUTERS M35054-XXXFP/M35055-XXXFP SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS TIMING REQUIREMENTS (Ta = –20°C to 70°C, VDD = 5±0.25V, unless otherwise noted) Symbol Limits Parameter tw(SCK) SCK width __ Unit Min. Typ. Max. 400 — — ns 200 — — ns 2 — — µs __ tsu(CS) CS setup time __ __ th(CS) CS hold time tsu(SIN) SIN setup time 200 — — ns th(SIN) SIN hold time 200 — — ns tword 1 word writing time 12.8 — — µs __ __ Note. When oscillation stop at register STOR1 (address F816), 1V (field term) or more of tSU(CS) and th(CS) are needed. tw(CS) 2µs (min.) CS tsu(CS) tw(SCK) tw(SCK) tsu(SIN) th(SIN) th(CS) SCK SIN CS tword SCK 1 2 3 14 15 16 1 2 3 14 15 16 Fig. 16 Serial input timing requirements 27 MITSUBISHI MICROCOMPUTERS M35054-XXXFP/M35055-XXXFP SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS ABSOLUTE MAXIMUM RATINGS (VDD = 5V, Ta = –20 to 70°C, unless otherwise noted) Symbol Parameter VDD Supply voltage VI Input voltage VO Output voltage Pd Power dissipation Topr Tstg Conditions Ratings Unit –0.3~6.0 V VSS–0.3≤VI≤VDD+0.3 V With respect to VSS VSS≤VO≤VDD V 300 mW Operating temperature –20~70 °C Storage temperature –40~125 °C Ta=25°C RECOMMENDED OPERATING CONDITIONS (VDD = 5V, Ta = –20 to 70°C, unless otherwise noted) Symbol VDD Limits Parameter Supply voltage ________ Typ. Max. 4.75 5.00 5.25 V 0.8✕VDD VDD VDD V 0 0 0.2✕VDD V – 2.0VP-P – V 0.3VP-P – 4.0VP-P V – MHz _______ VIH “H”level input voltage AC, CS, SIN, SCK, TESTA, TESTB VIL “L” level input voltage AC, CS, SIN, SCK, TESTA, TESTB VCVIN CVIN, HOR VOSCIN Input voltage OSCIN (Note) fOSCIN Synchronous signal oscillation frequency _________ Unit Min. __________ 3.580 – 4.434 24 characters✕10 lines – 480✕fH – MHz 32 characters✕7 lines – 640✕fH – MHz (Duty 40~60%) fOSC1 Display oscillation frequency fOSC2 3.576 Notes 1. Noise component is within 30mV. Notes 2. fH: Horizontal synchronous frequency (MHz). ELECTRICAL CHARACTERISTICS (VDD = 5V, Ta = 25°C, unless otherwise noted) Symbol Parameter Limits Test conditions Unit Min. Typ. Max. 4.75 5.00 5.25 V – 30 50 mA VDD Supply voltage Ta=–20~70°C IDD Supply current VDD=5.00V VOH “H”level output voltage P0, P1 VDD=4.75V, IOH=–0.4mA 3.75 – – V VOL “L” level output voltage P0, P1 VDD=4.75V, IOL=0.4mA – – 0.4 V RI __ VDD=5.00V 10 30 100 kΩ Pull-up resistance __ AC, CS, SCK, SIN, TESTB VIDEO SIGNAL INPUT CONDITIONS (VDD = 5V, Ta = –20 to 70°C, unless otherwise noted) Symbol VIN-SC 28 Parameter Composite video signal input clamp voltage Limits Test conditions Sync-chip voltage Unit Min. Typ. Max. – 1.5 – V MITSUBISHI MICROCOMPUTERS M35054-XXXFP/M35055-XXXFP SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS Note for Supplying Power __ (1) Timing of power supplying to AC pin The internal circuit of M35054-XXXFP/ M35055-XXXFP is reset __ when the level of the auto clear input pin AC is “L”. This pin is hysteresis input with the pull-up resistor. The timing about power __ supplying of AC pin is shown in Figure 16. t W is the interval after the supply voltage becomes 0.8 ✕ VDD or more and before the __ __ supply voltage to the AC pin (VAC) becomes 0.2 ✕ VDD or more. After supplying the power (V DD and VSS) to M35054-XXXFP/ M35055-XXXFP, the tW time must be reserved for 1ms or more. Before starting input from the microcomputer, the waiting time (ts) must be reserved for 500ms after the supply voltage to the __ AC pin becomes 0.8 ✕ VDD or more. (2) Timing of power supplying to VDD1 pin and VDD2 pin The power need to supply to VDD1 and VDD2 at a time, though it is separated perfectly between the VDD1 as the digital line and the VDD2 as the analog line. Voltage [V] VDD Supply voltage VAC 0.8✕VDD (AC pin input voltage) 0.2✕VDD tw ts Time t [s] __ Fig. 17 Timing of power supplying to AC pin PRECAUTION FOR USE ROM ORDERING METHOD Notes on noise and latch-up Connect a capacitor (approx. 0.1 ˚F) between pins VDD and VSS at the shortest distance using relatively thick wire to prevent noise and latch up. Please submit the information described below when ordering Mask ROM. (1) ROM Order Confirmation Form ................................................. 1 (2) Data to be written into mask ROM ................................ EPROM (three sets containing the identical data) (3) Mark Specification Form ............................................................ 1 (4) Program for character font generating + froppy disk in which character data is input 29 MITSUBISHI MICROCOMPUTERS M35054-XXXFP/M35055-XXXFP SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS STANDARD ROM TYPE : M35054-001FP M35054-001FP is a standard ROM type of M35054-XXXFP character patterns are fixed to the contents of Figure 18 to 19. 30 MITSUBISHI MICROCOMPUTERS M35054-XXXFP/M35055-XXXFP SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS 0016 0116 0216 0316 0416 0516 0616 0716 0816 0916 0A16 0B16 0C16 0D16 0E16 0F16 1016 1116 1216 1316 1416 1516 1616 1716 1816 1916 1A16 1B16 1C16 1D16 1E16 1F16 2016 2116 2216 2316 2416 2516 2616 2716 2816 2916 2A16 2B16 2C16 2D16 2E16 2F16 3016 3116 3216 3316 3416 3516 3616 3716 3816 3916 3A16 3B16 3C16 3D16 3E16 3F16 Fig. 18 M35054-001FP character pattern (1) 31 MITSUBISHI MICROCOMPUTERS M35054-XXXFP/M35055-XXXFP SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS 4016 4116 4216 4316 4416 4516 4616 4716 4816 4916 4A16 4B16 4C16 4D16 4E16 4F16 5016 5116 5216 5316 5416 5516 5616 5716 5816 5916 5A16 5B16 5C16 5D16 5E16 5F16 6016 6116 6216 6316 6416 6516 6616 6716 6816 6916 6A16 6B16 6C16 6D16 6E16 6F16 7016 7116 7216 7316 7416 7516 7616 7716 7816 7916 7A16 7B16 7C16 7D16 7E16 7F16 Fig. 19 M35054-001FP character pattern (2) 32 MITSUBISHI MICROCOMPUTERS M35054-XXXFP/M35055-XXXFP SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS STANDARD ROM TYPE : M35055-001FP M35055-001FP is a standard ROM type of M35055-XXXFP Character patterns are fixed to the contents of Figure 20 to 23. 33 MITSUBISHI MICROCOMPUTERS M35054-XXXFP/M35055-XXXFP SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS 0016 0116 0216 0316 0416 0516 0616 0716 0816 0916 0A16 0B16 0C16 0D16 0E16 0F16 1016 1116 1216 1316 1416 1516 1616 1716 1816 1916 1A16 1B16 1C16 1D16 1E16 1F16 2016 2116 2216 2316 2416 2516 2616 2716 2816 2916 2A16 2B16 2C16 2D16 2E16 2F16 3016 3116 3216 3316 3416 3516 3616 3716 3816 3916 3A16 3B16 3C16 3D16 3E16 3F16 Fig. 20 M35055-001FP character pattern (1) 34 MITSUBISHI MICROCOMPUTERS M35054-XXXFP/M35055-XXXFP SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS 4016 4116 4216 4316 4416 4516 4616 4716 4816 4916 4A16 4B16 4C16 4D16 4E16 4F16 5016 5116 5216 5316 5416 5516 5616 5716 5816 5916 5A16 5B16 5C16 5D16 5E16 5F16 6016 6116 6216 6316 6416 6516 6616 6716 6816 6916 6A16 6B16 6C16 6D16 6E16 6F16 7016 7116 7216 7316 7416 7516 7616 7716 7816 7916 7A16 7B16 7C16 7D16 7E16 7F16 Fig. 21 M35055-001FP character pattern (2) 35 MITSUBISHI MICROCOMPUTERS M35054-XXXFP/M35055-XXXFP SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS 8016 8116 8216 8316 8416 8516 8616 8716 8816 8916 8A16 8B16 8C16 8D16 8E16 8F16 9016 9116 9216 9316 9416 9516 9616 9716 9816 9916 9A16 9B16 9C16 9D16 9E16 9F16 A016 A116 A216 A316 A416 A516 A616 A716 A816 A916 AA16 AB16 AC16 AD16 AE16 AF16 B016 B116 B216 B316 B416 B516 B616 B716 B816 B916 BA16 BB16 BC16 BD16 BE16 BF16 Fig. 22 M35055-001FP character pattern (3) 36 MITSUBISHI MICROCOMPUTERS M35054-XXXFP/M35055-XXXFP SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS C016 C116 C216 C316 C416 C516 C616 C716 C816 C916 CA16 CB16 CC16 CD16 CE16 CF16 D016 D116 D216 D316 D416 D516 D616 D716 D816 D916 DA16 DB16 DC16 DD16 DE16 DF16 E016 E116 E216 E316 E416 E516 E616 E716 E816 E916 EA16 EB16 EC16 ED16 EE16 EF16 F016 F116 F216 F316 F416 F516 F616 F716 F816 F916 FA16 FB16 FC16 FD16 FE16 FF16 blank Fig. 23 M35055-001FP character pattern (4) 37 MITSUBISHI MICROCOMPUTERS M35054-XXXFP/M35055-XXXFP SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS PACKAGE OUTLINE 38 MITSUBISHI MICROCOMPUTERS M35054-XXXFP/M35055-XXXFP SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS Keep safety first in your circuit designs! • Mitsubishi Electric Corporation puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of non-flammable material or (iii) prevention against any malfunction or mishap. • These materials are intended as a reference to assist our customers in the selection of the Mitsubishi semiconductor product best suited to the customer’s application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Mitsubishi Electric Corporation or a third party. Mitsubishi Electric Corporation assumes no responsibility for any damage, or infringement of any third-party’s rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 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No. M35054-XXXFP/M35055-XXXFP DATA SHEET Revision Description Rev. date 1.0 First Edition 980402 1.1 P48 20P2Q-A (20-PIN SSOP) MARK SPECIFICATION FORM B: Note 4 added 000707 1.2 Delete Mask ROM ORDER CONFIRMATION FORM and MASK SPECIFICATION FORM 000829 (1/1)