VID - 97 - D001 JAN. 1998 SPECIFICATION for KS5520 SYSTEM LSI BUSINESS SAMSUNG ELECTRONICS CO. SPECIFICATION for KS5520 CONTENTS Important Notice • OUTLINE OF PRODUCT ------------- 3 • FUNCTIONS ----------------------------- 3 • FEATURES ------------------------------- 3 • OPTION CODE -------------------------- 3 • ORDERING INFORMATION --------- 3 • BLOCK DIAGRAM --------------------- 4 • PIN CONFIGURATION ---------------- 4 • ABSOLUTE MAXIMUM RATING -- 6 Copyright 1998 by SAMSUNG The information in this publication has been carefully checked and is believed to be accurate at the time of publication. Samsung assumes no responsibility, however, for possible errors or omissions, or for any consequences resulting from the use of the information contained herein. Samsung reserves the right to make changes in its products or product specifications with the intent to improve function or design at any time and without notice and is not required to update this documentation to reflect such changes. This publication does not convey to a purchaser of semiconductor devices described herein any license under the patent rights of Samsung or others. Samsung makes no warranty, representation, or guarantee regarding the suitability of its products for any particular purpose, nor does Samsung assume any liability arising out of the application or use of any product or circuit and specifically disclaims any liability, including without limitation any consequence or incidental damages. *Typical* parameters can and do vary in different applications. All operating parameters, including *Typicals,* must be validated for each customer application by the customer*s technical experts. Samsung products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, for other applications intended to support or sustain life, or for any other application in which the failure of the Samsung product could cause personal injury or death. Should the buyer purchase or use a Samsung product for any such unintended or unauthorized application, the buyer shall indemnify and hold Samsung and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, expenses, and reasonable attorney fees arising out of, either directly or indirectly, any claim of personal injury or death that may be associated with such unintended or unauthorized use, even if such claim alleges that Samsung was negligent regarding the design or manufacture or manufacture of said product. • ELECTRICAL CHARACTERISTICS - 7 • TIMING DIAGRAM ---------------------- 8 • MEMORY STRUCTURE --------------- 9 • SCREEN STRUCTURE --------------- 15 • BLANK MODE -------------------------- 15 • SCROLL/HALF-TONE FUNCTION - 16 • BOX DRAWING FUNCTION --------- 17 • APPLICATION CIRCUIT -------------- 18 • PACKAGE DIMENSIONS ------------ 20 KS5520-XX ON SCREEN DISPLAY PROCESSOR 1. OUTLINE OF PRODUCT The KS5520 is a single chip VLSI device which performs 24 - SDIP - 300 the on screen display function with sync seperation of video composite signal and AFC is proposed. It can choose total 256 characters and display up to 360 characters in a screen. It can also select various built-in functions such as character color select, inverse, etc. These functions are 24 - SOP - 375 compatible with all video systems including NTSC, PAL, SECAM. 2. FUNCTIONS • On screen display • Sync separator and sync detector • AFC 3. FEATURES 4.2 ORDERING INFORMATION • Screen structure : 360 ( 30 columns • Character structure : 12 á 18 dots á 12 rows) Device • Character types : 256 kinds of color characters KS5520-XX • Display position : 62 horizontal position á 4 times Operating Temprature 24-SDIP-300 KS5520D-XX 24-SOP-375 64 vertical position • Character size : 4 Package - 20 ~ + 70 - 20 ~ + 70 of normal in both vertical and horizontal directions • Blinking : controllable in character unit, blinking time also controllable • Blanking : controllable in line units, blanking mode change possible Blank color fill possible in character units (8 colors) • Background coloring : 8 colors • Character coloring : coloring of characters possible in blank mode • Inverse character display : controllable in character units • Synchronous ways : automatic selection of internal or external synchronization via MICOM control • Built-in clamp, horizontal/vertical sync separator & sync detector circuit • Sync detection sensitivity can be adjusted via MICOM control. • Built-in analog horizontal/vertical sync PLL circuit • Scroll & Box Drawing ability • Half-Tone function ability • NTSC / PAL / SECAM mode via MICOM control 4.1 OPTION CODE Code No. Remark English, Russian, German, French, Spanish, Italian, Polish, Portuguese, Swedish Denish, Dutch, Esperanto, Vietnamese, Indonesian, Czechoslovak KS5520D-04 English, Russian, German, French, Spanish, Italian, Polish, Portuguese, Swedish Denish, Dutch, Esperanto, Vietnamese, Indonesian, Czechoslovak, Greek KS5520-01 VID-97-D001 98-05-14 3 KS5520-XX ON SCREEN DISPLAY PROCESSOR 5. BLOCK DIAGRAM SCK 2 CSB 6 SIN 7 SERIAL INTERFACE RAM ROM 18 SCCR ADDRESS COUNTER HORIZONTAL CONTROL TIMING GENERATOR VERTICAL CONTROL PARALLEL IN SERIAL OUT MIXER ROM COLUMN DECODER BUFFER CLAMP 19 CVOUT 17 CVIN COLOR GENERATOR XTIN 21 XTOUT 22 HSYNC GENERATOR CSYNC GENERATOR VSYNC GENERATOR CLAMPIN 9 CLAMP SYNC SEPARATOR SYNC CONTROL 8 23 20 LPF CSYNC SYD 4 LC OSCILLATOR SYNC DELAY 5 OSC IN OSC OUT PLL 11 12 15 PD OUT VCO IN R CNTR 13 14 C N1 C N2 6. PIN CONFIGURATION & DESCRIPTION 6.1 PIN CONFIGURATION DGND 1 24 DVDD SCK 2 23 CSYNC RESETB 3 22 XTOUT OSCIN 4 21 XTIN OSCOUT 5 20 SYD CSB 6 SIN 7 KS5520 LPF 8 19 CVOUT 18 SCCR 17 CVIN CLAMPIN 9 16 AVDD AGND 10 15 R CNTR PD OUT 11 14 C NOD2 VCO IN 12 13 C NOD1 VID-97-D001 98-05-14 4 KS5520-XX ON SCREEN DISPLAY PROCESSOR 6.2 PIN DESCRIPTION Pin No. Symbol I/O Function 1 DGND - Digital Ground 2 SCK I Serial clock input. When CSB pin is low, then 16-bit serial data is inputted by controlling micom. Built-in pull-up resistor. 3 RESETB I Auto clear pin. If low, then all circuit is reset. Built-in pull-up resistor. 4 OSCIN I LC oscillation pin. Standard frequency is 9MHz & the horizontal start position and the horizontal size are controlled 5 OSCOUT O by the clock of oscillation block. 6 CSB I While pin 6 is low, serial data input is active. Built - in pull-up resistor 7 SIN I Serial data input pin. Built-in pull-up resistor 8 LPF I LPF gets rid of the color signal in a video input signal. 9 CLAMPIN I Clamp input pin of composite video signal of 2Vpp 10 AGND - Analog ground 11 PD OUT O Phase detect output of analog PLL. Loop filter is formed by PD OUT and VCO IN. 12 VCO IN I VCO input pin of PLL 13 C NOD1 O Capacitor node 1 of PLL VCO 14 C NOD2 O Capacitor node 2 of PLL VCO 15 R CNTR O Resistor node of PLL VCO 16 AVDD - 5V Analog VDD 17 CVIN I Composite video input pin 18 SCCR I When SECAM mode, color signal is mixed in the character level. 19 CVOUT O Composite video output pin VID-97-D001 98-05-14 5 KS5520-XX ON SCREEN DISPLAY PROCESSOR 6.2 PIN DESCRIPTION ( Continued ) Pin No. Symbol I/O Function 20 SYD O H-sync detect output pin. If sync exists, then high if not, low 21 XTIN I X-tal input / output pin 22 XTOUT O NTSC : 14.31818 MHz, PAL : 17.734475MHz 23 CSYNC O When external, C-sync separator output is out, when internal, then internal C-sync is outputted. 24 DVDD - 5V Digital VDD ) 7. ABSOLUTE MAXIMUM RATINGS ( Ta = 25 Characteristics Symbol Value Unit V Supply Voltage VDD 3.0 ~ 7.0 Input Voltage VIN Power Dissipation PD 200 Operating Temperature Topr - 20 ~ + 70 Storage Temperature Tstg - 40 ~ + 125 VSS - 0.3 VID-97-D001 98-05-14 þ VIN þ VDD + 0.3 V mW 6 KS5520-XX ON SCREEN DISPLAY PROCESSOR 8. ELECTRICAL CHARACTERISTICS ( Ta = 25 , AVDD = DVDD = 5V ) Characteristics Symbol Min Typ Operating Voltage VDD 4.75 5.00 5.25 V Operating Current Icc 20 40 60 mA Input High Voltage VIH 0.8VDD - - V Input Low Voltage VIL - - 0.2VDD V Output High Voltage (2 VOH 0.7VDD - - V VOL - - 0.3VDD V Pin8 LPF Voltage Vp8 2.15 2.35 2.55 V Pin9 Clamp Voltage Vp9 1.25 1.45 1.65 V Pin15 R_CNTR Voltage Vp15 2.35 2.50 2.65 V Pin17 Clamp Voltage Vp17 0.60 0.80 1.00 V Vp19G 1.80 2.00 2.20 V Fosc 8.0 9.0 10.0 MHz Fh_duty 250 550 850 nS Hsync Frequency H_fre 15.5 15.7 15.9 KHz X-tal Oscillation Frequency Fp22 14.1 14.3 14.5 MHz Sync Separation Voltage Vse 0.10 0.25 0.40 V Blueback Sync Tip Level Vbst 0.50 0.80 1.10 V Blueback Pedestal Level Vbpd 1.10 1.40 1.70 V Blueback Color Burst Level High Vcbh 1.40 1.70 2.00 V Blueback Color Burst Level Low Vcbl 0.80 1.10 1.40 V Blueback Color Level High Vbch 2.30 2.60 2.90 V Blueback Color Level Low Vbcl 1.30 1.60 1.90 V Blueback Blank Level High Vblkh 1.40 1.70 2.00 V Blueback Blank Level Low Vblk1 1.10 1.40 1.70 V Blueback Character Level High Vchh 2.40 2.70 3.00 V Blank Color Off Level Vbcof 1.10 1.40 1.70 V Box White Level Vbwl 2.20 2.50 2.80 V Box Black Level Vbbl 1.10 1.40 1.70 V HalfTone Level Vhalf 1.80 2.10 2.40 V VCO Input Voltage Vvco 2.30 2.50 2.70 V AFC Freerun Frequency Ffr 15.5 15.7 15.9 KHz AFC Lock Range High Falh 200 300 400 Hz AFC Lock Range Low Fall - - -500 Hz m drive) Output Low Voltage (2m drive) Buffer Gain LC Oscillation Frequency Hsync Duty Max Unit Note 1 : Specifications are subject to change without notice. VID-97-D001 98-05-14 7 KS5520-XX ON SCREEN DISPLAY PROCESSOR 9. TIMING DIAGRAM SCK CSB SIN Address (16Bits) Data N+1 (16Bits) Data N (16Bits) Tword Twtw Twcsb Tsetcsb Tholdcsb CSB Twsck Twsck SCK Tsetsin Tholdsin SIN ITEM LIMITS SYMBOL UNIT MIN TYP MAX SCK Width Twsck 200 - - nsec CSB Width Twcsb 1 - - usec CSB Setup Time Tsetcsb 200 - - nsec CSB Hold Time Tholdcsb 2 - - usec SIN Setup Time Tsetsin 200 - - nsec SIN Hold Time Tholdsin 200 - - nsec 1 Word Write Time Tword 10 - - usec Word To Word Time Twtw 1 - - usec VID-97-D001 98-05-14 8 KS5520-XX ON SCREEN DISPLAY PROCESSOR 10. MEMORY STRUCTURE It consists of 360*16 bits SRAM, 256 font ROM and 5 mode control register. 0 DAF DAE DAD Box_ Box Box Inv 1 0 DAC R DAB DAA B G DA8 DA9 Invert Blink DA1 DA0 DA7 DA6 DA5 DA4 DA3 DA2 C7 C6 C5 C4 C3 C2 C1 C0 1 2 3 . . . * . (Note) Character Code (ROM Address) * * * (Note) * (No te) (Note) (Note) . . 357 358 359 Box_ 360 Box Box Inv 1 0 0 0 0 363 364 0 0 Invert Blink C7 C6 C5 C4 C3 C2 C1 C0 HZ HZ HZ HP HP HP HP HP HP Time 21 20 11 10 5 4 3 2 1 0 Ext_ Blank_ Scroll_ Scroll_ Inter VZ VZ VZ VZ VP VP VP VP VP VP -nal 21 20 11 10 5 4 3 2 1 0 RAM_ Disp_ P626/ Inlace Secam NTSC/ Blk Blk Blk C_ R_ R_ R_ R_ R_ 0 Col 1 Level Time Erase On 0 0 Fll2 0 B HZ fsc 362 G Blink Blink_ Half_ Blink Tone 361 R On P628 /NonAll_ Fll1 0 DSP DSP PAL 1 DSP DSP DSP DSP Level Lev1 Lev0 Cntr2 Cntr1 Cntr0 DSP DSP DSP 3 Blank B A 9 8 7 6 5 4 Fll0 Flh3 Flh2 Flh1 Flh0 Fcl3 Fcl2 Fcl1 Fcl0 DSP DSP DSP 2 1 0 Fch3 Fch2 Fch1 Fch0 * (Note) : same as above. < Raster Color Level Control > (Control Register 362 (16AH)) Raster Color Level `H` Raster Color Level `L` Remark DA4(Lev 1) DA3(Lev 0) 0 0 2.6V 1.6V Level 0 0 1 2.2V 1.4V Level 1 1 0 2.2V 1.4V Level 1 1 1 2.0V 1.3V Level 2 VID-97-D001 98-05-14 9 KS5520-XX ON SCREEN DISPLAY PROCESSOR CONTROL REGISTER 1) Register 360 (168H) DA0 ~ DAD 0 ContentSs Register Remark HP0 0 1 1 HP1 0 1 2 HP2 0 1 3 Functions State HP3 ^ 4 * ê ( HPn * 2 ) + N ` Tc : osc. period ( 1/9 Ë = 111 nsec ) HS = Tc * 5 HP4 HP5 n HSZ10 HSZ21 HSZ20 0 0 9 0 Start n=o HSZ11 1 4 Horizontal 5 Position N 0 1 10 0 1 0 11 1 1 1 12 0 1 6 HZ10 0 1 7 HZ11 0 1 8 HZ20 0 1 9 HZ21 HZ10 HZ11 0 0 1 1X 2X 1 3X 4X HZ20 HZ21 0 0 1 1X 2X 1 3X 4X 0 1st line horizontal character size control 2nd ~ 12th line horizontal character size control 1 A B 0 Blink Time = 1 sec Time 1 Blink Time = 0.5 sec Blink 0 0 Blink0 Blink1 0 Off Duty 25% 1 Duty 50% Duty 75% 1 C Blink Time Control Blink Blink 1 0 0 1 Blinking Duty Control 1 D Half- 0 Half-tone Off tone 1 Half-tone On VID-97-D001 98-05-14 Half-tone On/Off 10 KS5520-XX ON SCREEN DISPLAY PROCESSOR 2) Register 361(169H) DA0 ~ DAE 0 Contents Register Remark State VP0 0 1 1 VP1 VP2 ^ 4 * ê ( VPn * 2 5 VS = H * 0 1 2 Functions n=o n )+ 3 ` Vertical Start Position H : horizontal synchronous pulse time 0 H-SYNC 1 3 VP3 0 V-SYNC VS 1 4 VP4 HS 0 1 5 VP5 0 1 6 VZ10 0 1 7 VZ11 0 1 8 VZ20 VZ21 0 1 0 1X 2X 1 3X 4X 0 1 0 1X 2X 1 3X 4X 0 1 9 VZ10 VZ11 VZ20 VZ21 0 1st line vertical character size control 2nd ~ 12th line vertical character size control 1 A B C D E 0 External SYNC 1 Internal SYNC Scroll 0 Scroll Off On 1 Scroll On Scroll 0 Scroll Time 0.5 sec Time 1 Scroll Time 1 sec Blank 0 Blank Low Level 0 (1.4V) L Level 1 Blank Low Level 1 (1.8V) Ext 0 External 4fsc X-TAL (Pin 21,22) fsc 1 External fsc input to Pin 21(*Only for IC Test) Internal VID-97-D001 98-05-14 External / Internal Mode Scroll Display Control Scroll Time Control Blank Color Low Level Control External fsc Clock Input 11 KS5520-XX ON SCREEN DISPLAY PROCESSOR 3) Register 362 (16AH) DA0 ~ DAE 0 Contents Register Remark R_cntr0 0 1 1 R_cntr1 0 1 2 R_cntr2 0 1 3 R_lev0 R_lev1 Cntr2 Cntr1 Cntr0 6 7 8 1 1 Lev 0 0 Red Blue B+G Yellow Orange Magenta Cyan Gray Red G+Y B+G Blue Magenta Yellow Green Gray 1 Level 0 Level 1 1 Level 1 Level 2 Character Level 1 (2.7V) 1 Character Level 2 (2.5V) Blank 0 Blank Color Off Color 1 Blank Color On BLK0 0 BLK1 PAL 0 0 C_level NTSC 0 Lev 1 1 5 0 1 0 1 0 1 0 1 0 0 1 1 0 0 0 0 0 0 1 1 1 1 0 1 4 Functions State 1 Blank Mode Select by Controlling the Data of 0 Register 363 (16BH) Raster Color Control Raster Color Level Control Character Level Control When SECAM, Blank Color Off is not used. 1 9 A B C D E NTSC 0 NTSC /PAL 1 PAL SECAM 0 NTSC or PAL 1 SECAM Interlace 0 Interlace /Non-I 1 Non-Interlace P626/ 0 PAL 1 Field = 626H P628 1 PAL 1 Field = 628H DSP ON 0 Display Off 1 Display On RAM 0 RAM is not erased. ERS 1 RAM is erased. Color System Select Scanning Type Control PAL Mode 1 Field Control Character Display Control VID-97-D001 98-05-14 12 KS5520-XX ON SCREEN DISPLAY PROCESSOR 4) Register 363 (16BH) DA0 ~ DAC Contents Register Remark State 0 DSP0 0 1 1 DSP1 DSP2 DSP3 DSP4 3th line BLANK mode select 0 1 4 2nd line BLANK mode select 0 1 3 1st line BLANK mode select 0 1 2 Functions 4th line BLANK mode select 0 5th line BLANK mode select BLK1 BLK0 1 5 DSP5 0 6th line BLANK mode select 0 1 6 DSP6 0 0 1 7th line BLANK mode select 1 7 DSP7 0 0 8th line BLANK mode select 1 8 DSP8 0 1 1 9th line BLANK mode select DSP9 0 DSPA 0 11th line BLANK mode select 1 B DSPB 0 0 Blank Off 1 O* 0 C* 1 O* 0 O* 1 R* 0 R* 1 C* All Blank 10th line BLANK mode select 1 A Blank Mode ALL BLK = 1 1 9 DSP C* Character Blank O* Outline Blank R* Raster Blank 12th line BLANK mode select 1 C All 0 Depend on BLK0, BLK1 BLK 1 All screen blank except character VID-97-D001 98-05-14 13 KS5520-XX ON SCREEN DISPLAY PROCESSOR 5) Register 364 (16CH) DA0 ~ DAE 0 Contents Register Remark State Fch0 Functions 0 1 1 Fch1 0 1 2 Fch2 0 ^ ê Fchn * 512 * 2 ` É Capture Range `H` = 15.36 Ê ~ 230.4 Ê Sync Detect Capture Range High Sensitity Control ^ ê Fchn * 64 * 2 ` É Capture Range `L` = 1.92 Ê ~ 28.8 Ê Sync Detect Capture Range Low Sensitity Control ^ ê Fchn * 512 * 2 ` É Locking Range `H` = 15.36 Ê ~ 230.4 Ê Sync Detect Locking Range High Sensitity Control ^ ê Fchn * 64 * 2 ` É Locking Range `L` = 1.92 Ê ~ 13.44 Ê Sync Detect Locking Range Low Sensitity Control 3 Fch = 30 * n n=o 1 3 Fch3 0 1 4 Fcl0 0 1 5 Fcl1 0 1 6 Fcl2 0 3 Fcl = 30 * n n=o 1 7 Fcl3 0 1 8 Flh0 0 1 9 Flh1 0 3 1 A Flh2 0 Flh = 30 * n n=o 1 B Flh3 0 1 C Fll0 0 1 D Fll1 0 1 E Fll2 2 Fll = 30 * n n=o 0 1 VID-97-D001 98-05-14 14 KS5520-XX ON SCREEN DISPLAY PROCESSOR 11. SCREEN STRUCTURE 30 columns 12 rows TV Screen 12. BLANK MODE Blank Off Raster Blank Character Blank VID-97-D001 98-05-14 Outline Blank 15 KS5520-XX ON SCREEN DISPLAY PROCESSOR 13. SCROLL FUNCTION When control register 361, scroll bit (DAB bit) is high, character display on/off from top to down slowly about 0.5 sec or 1 sec. (also controlled by register setting) 14. HALF-TONE FUNCTION §¡ §©¢ £§ µÀº ¨Ã¹ TV Screen When control register 360, half tone bit ( DAD bit ) is high, half luminance level and also display background screen. VID-97-D001 98-05-14 character display with 16 KS5520-XX ON SCREEN DISPLAY PROCESSOR 15. BOX DRAWING FUNCTION SAM SUNG OSD Box Drawing TV Screen It can draw rectangle box. If you want to concave display, top and left side of characters are drawn black color, bottom and right side of characters are drawn white color and also want to convex display, character colors are vice versa. It is all controlled by each RAM attribution bit, that is box1 (DAE), box0 (DAD) and box_inv (DAF). box0 box1 0 0 BOX OFF 1 S VID-97-D001 98-05-14 1 S S 17 KS5520-XX ON SCREEN DISPLAY PROCESSOR 16-1. APPLICATION CIRCUIT (OSD BLOCK) VCC (9V) Q116 5V C153 220 Ó+ KA78T05 OUT R177 75 IN VIDEO OUT Q115 A733 R176 430 L105 100uH VR1 C139 C146 100 Ó + 24 C140 R179 1 Ð TP2 C145 0.01 Vin : 2Vpp Vsync: > 0.3Vpp Ó Y101 23 22 21 XTOUT DVDD CSYNC Ó + TP1 20 XTIN C157 1 5Ï 19 R175 100 Ï17 18 SYD CVOUT SCCR C155 100 Ñ + C144 100 C143 104 16 CVIN Ó R180 22 Ï 15 AVDD 14 13 C NODE2 C NODE1 AGND PD OUT VCO IN 10 11 R CNTR KS5520 DGND SCK RESETB OSCIN 2 3 4 1 CSB SIN 6 7 5 L106 10uH C147 + Ó OSCOUT 1 C142 56p LPF CLAMPIN 8 C154 100 Ñ C141 56p 9 C137 4.7 Ó + R173 200K 12 R178 5 C149 0.01 Ï Ó R174 + 1K C150 0.47 Ó VIDEO IN 1 2 3 4 5 6 7 8 DGND AGND JP101 2 TO MICOM APPLICATION CIRCUIT or PC PARALLEL PORT The circuit drawn above is for Demo Board. • Y101 (4fsc X-TAL ) â NTSC : 14.31818MHz PAL : 17.734475MHz • C139 / C140 : The load CAP of X-TAL Y101 has a difference each according to its manufactures. Ñ typical (NTSC), 47Ñ typical (PAL) 27 VID-97-D001 98-05-14 18 KS5520-XX ON SCREEN DISPLAY PROCESSOR 16-2. APPLICATION CIRCUIT (CONTROLLER BLOCK) LCD MODULE RS RW EN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 +5V D201 1N4004 VDD (+5V) VR2 10 Ï C204 0.01 Ó 1 P0.7 2 P0.6 3 P0.5 4 P0.4 5 P0.3 6 P0.2 7 P0.1 8 P0.0 17 VDD2 22 P3.3 21 P3.4 20 P3.5 19 P3.6 18 P3.7 30 VDD1 64 P1.0 63 P1.1 62 P1.2 61 P1.3 60 P1.4 59 P1.5 58 P1.6 57 P1.7 56 RESET 55 KS88P0016N XOUT 51 XIN 50 VSS1 52 P6.5 32 VSS2 Ó C201 27 Ñ + C202 P5.3 47 P6.7 34 P6.6 33 P6.4 31 C205 47 + Ñ Ë Y102 27 11.0592 SW1 RESET C203 0.47 Ó 0 4 8 12 16 20 F3 F7 1 5 9 13 17 21 F4 F8 2 6 10 14 18 F1 F5 F9 3 7 11 15 19 F2 F6 F10 SW2 (5P) 1 SCK 2 3 4 5 6 7 8 JP101 CSB SIN VDD(+5V) GND 2 TO KS5520 APPLICATION CIRCUIT VID-97-D001 98-05-14 19 KS5520-XX ON SCREEN DISPLAY PROCESSOR 17. PACKAGE DIMENSIONS Dimensions in Milimeters 24-SDIP-300 VID-97-D001 98-05-14 20 KS5520-XX ON SCREEN DISPLAY PROCESSOR 17. PACKAGE DIMENSIONS (Continued) Dimensions in Milimeters 24-SOP-375 VID-97-D001 98-05-14 21 SPECIFICATION MEMO HEAD OFFICE : 8/11FL., SAMSUNG MAIN BLDG. 250, 2 - KA. TAEPYUNG - RO, CHUNG - KU, SEOUL, KOREA TEL ........ 2 - 727 - 7114 FAX ........ 2 - 753 - 0967 SEMICONDUCTOR BUSINESS SALES & MARKETING DIVISION : 15/16 FL., SEVERANCE BLDG., 84 - 11, 5 - KA, NAMDAEMOON - RO, CHUNG - KU SEOUL, KOREA TEL ...... 2 - 259 - 1114 FAX ...... 2 - 259 - 2468 SAMSUNG SEMICONDUCTOR INC. 3655 NORTH FIRST STREET, SAN JOSE, CA 95134, U.S.A TEL ..... 408 - 954 - 7000 FAX ..... 408 - 954 - 7873 SAMSUNG SEMICONDUCTOR EUROPE GMBH SAMSUNG HOUSE, AM KRONBERGER HANG 6, 65824 SCHWALBACH/TS TEL ..... 49 - 6196 - 663300 FAX ..... 49 - 6196 - 663311 SAMSUNG SEMICONDUCTOR EUROPE LTD. GREAT WEST HOUSE GREAT WEST ROAD, BRENTFORD, MIDDLESEX TW8 9DQ TEL ..... 181 - 380 - 7132 FAX ..... 181 - 380 - 7220 SAMSUNG ELECTRONICS JAPAN CO., LTD. HAMACHO CENTER BLDG., 31 - 1, NIHONBASHI - HAMACHO, 2 - CHOME, CHUO - KU, TOKYO 103, JAPAN TEL ..... 3 - 5641 - 9850 FAX ..... 3 - 5641 - 9851 SAMSUNG ELECTRONICS HONGKONG CO., LTD. 65TH FL., CENTRAL PLAZA, 18 HARBOUR ROAD, WANCHAI, HONG KONG TEL ....... 852 - 2862 - 6900 FAX ....... 852 - 2866 - 1343 SAMSUNG ELECTRONICS TAIWAN CO., LTD. 30FL., NO.333, KEELUNG RD., SEC1, TAIPEI, TAIWAN, R.O.C TEL ..... 886 - 2 - 757 - 7292 FAX ..... 886 - 2 - 757-7311 SAMSUNG ASIA PRIVATE LIMITED 80. ROBINSON ROAD, #20 - 01 SINGAPORE 068898 TEL ..... 65 - 535 - 2808 FAX ..... 65 - 227 - 2792 SAMSUNG ELECTRONICS CO., LTD. SEMICONDUCTOR BUSINESS BEIJING OFFICE 15FL., BRIGHT CHINA CHANG AN BLDG., NO.7, JIANGUOMEN, NEI AVENUE, BEIJING, CHINA 100005 TEL ..... 8610 - 6510 - 1234(0) FAX ..... 8610 - 6510 - 1545 VID-97-D001 SAMSUNG ELECTRONICS CO., LTD. SHANGHAI OFFICE 9F, SHANGHAI INTERNATIONAL TRADE CENTRE, NO.2200 YANAN(W) RD., SHANGHAI, CHINA 200335 TEL ..... 8621 - 6270 - 4168 FAX ..... 8621 - 6275 - 2975 JAN. 1998