Revised March 2000 DM74LS574 Octal D-Type Flip-Flop with 3-STATE Outputs General Description The DM74LS574 is a high speed low power octal flip-flop with a buffered common Clock (CP) and a buffered common Output Enable (OE). The information presented to the D inputs is stored in the flip-flops on the LOW-to-HIGH Clock (CP) transition. This device is functionally identical to the DM74LS374 except for the pinouts. Ordering Code: Order Number Package Number Package Description DM74LS574WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide DM74LS574N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol Connection Diagram VCC = Pin 20 GND = Pin 10 Truth Table Inputs Dn H L X Outputs CP X OE On L H L L H Z H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance = HIGH-to-LOW Clock (CP) transition © 2000 Fairchild Semiconductor Corporation DS009815 www.fairchildsemi.com DM74LS574 Octal D-Type Flip-Flop with 3-STATE Outputs March 1988 DM74LS574 Functional Description sition. With the Output Enable (OE) LOW, the contents of the eight flip-flops are available at the outputs. When the OE is HIGH, the outputs go to the high impedance state. Operation of the OE input does not affect the state of the flip-flops. The DM74LS574 consists of eight edge-triggered flip-flops with individual D-type inputs and 3-STATE true outputs. The buffered clock and buffered Outputs Enable are common to all flip-flops. The eight flip-flops will store the state of their individual D inputs that meet the setup and hold times requirements on the LOW-to-HIGH Clock (CP) tran- Logic Diagram www.fairchildsemi.com 2 Supply Voltage Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. 7V Input Voltage 7V 0°C to +70°C Operating Free Air Temperature Range −65°C to +150°C Storage Temperature Range Recommended Operating Conditions Symbol Parameter Min Nom Max Units 4.75 5 5.25 V LOW Level Input Voltage 0.8 V VCC Supply Voltage VIH HIGH Level Input Voltage VIL 2 V IOH HIGH Level Output Current −2.6 mA IOL LOW Level Output Current 24 mA TA Free Air Operating Temperature 0 70 °C tS (H) Setup Time HIGH or LOW 20 tS (L) Dn to CP 20 tH (H) Hold Time HIGH or LOW 0 tH (L) Dn to CP 0 tW (H) CP Pulse Width 15 tW (L) HIGH or LOW 15 ns ns ns Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted) Symbol Parameter Conditions VI Input Clamp Voltage VCC = Min, II = −18 mA VOH HIGH Level VCC = Min, IOH = Max, Output Voltage VIL = Max, VIH = Min LOW Level VCC = Min, IOL = Max, Output Voltage VIL = Max, VIH = Min VOL Min 2.4 IOL = 12 mA, VCC = Min Typ (Note 2) Max Units −1.5 V 3.3 V 0.35 0.5 0.25 0.4 V II Input Current @ Max Input Voltage VCC = Max, VI = 7V 0.1 mA IIH HIGH Level Input Current VCC = Max, VI = 2.7V 20 µA IIL LOW Level Input Current VCC = Max, VI = 0.4V −400 µA IOZH OFF-State Output Current with VCC = Max, VO = 2.4V HIGH Level Output Voltage Applied VIH = Min, VIL = Max 20 µA OFF-State Output Current with VCC = Max, VO = 0.4V LOW Level Output Voltage Applied VIH = Min, VIL = Max −20 µA −130 mA 45 mA IOZL IOS Short Circuit Output Current (Note 3) VCC = Max ICC Supply Current VCC = Max (Note 4) −30 Note 2: All typicals are at VCC = 5V, TA = 25°C. Note 3: Not more than one output should be shorted at a time, and the duration should not exceed one second. Note 4: ICC is measured with the DATA inputs grounded and the OUTPUT CONTROLS at 4.5V. 3 www.fairchildsemi.com DM74LS574 Absolute Maximum Ratings(Note 1) DM74LS574 Switching Characteristics VCC = +5.0V, TA = +25°C Symbol RL = 2 kΩ, CL = 45 pF Parameter Min Max fMAX Maximum Clock Frequency tPLH Propagation Delay 28 tPHL CP to On 28 tPZH Output Enable Time 28 35 MHz 28 tPZL tPHZ Output Disable Time 20 tPLZ www.fairchildsemi.com 25 4 Units ns ns ns DM74LS574 Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M20B 5 www.fairchildsemi.com DM74LS574 Octal D-Type Flip-Flop with 3-STATE Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N20A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com www.fairchildsemi.com 6