ZXM61P03F 30V P-CHANNEL ENHANCEMENT MODE MOSFET SUMMARY V(BR)DSS=-30V; RDS(ON)=0.35⍀; ID=-1.1A DESCRIPTION This new generation of high density MOSFETs from Zetex utilizes a unique structure that combines the benefits of low on-resistance with fast switching speed. This makes them ideal for high efficiency, low voltage, power management applications. FEATURES • Low on-resistance SOT23 • Fast switching speed • Low threshold • Low gate drive • SOT23 package APPLICATIONS • DC - DC converters • Power management functions • Disconnect switches • Motor control ORDERING INFORMATION DEVICE REEL SIZE (inches) TAPE WIDTH (mm) QUANTITY PER REEL ZXM61P03FTA 7 8 embossed 3,000 ZXM61P03FTC 13 8 embossed 10,000 Pin out DEVICE MARKING P03 Top view ISSUE 1 - OCTOBER 2005 1 SEMICONDUCTORS ZXM61P03F ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL LIMIT UNIT Drain-Source Voltage V DSS -30 V Gate- Source Voltage V GS ⫾20 V ID -1.1 -0.9 A Continuous Drain Current (VGS=-10V; (VGS=-10V; TA=25°C)(b) TA=70°C)(b) Pulsed Drain Current (c) I DM -4.3 A Continuous Source Current (Body Diode)(b) IS -0.88 A I SM -4.3 A Power Dissipation at T A =25°C (a) Linear Derating Factor Pulsed Source Current (Body Diode)(c) PD 625 5 mW mW/°C Power Dissipation at T A =25°C (b) Linear Derating Factor PD 806 6.4 mW mW/°C Operating and Storage Temperature Range T j :T stg -55 to +150 °C THERMAL RESISTANCE PARAMETER SYMBOL VALUE UNIT Junction to Ambient (a) R θJA 200 °C/W Junction to Ambient (b) R θJA 155 °C/W NOTES: (a) For a device surface mounted on 25mm x 25mm FR4 PCB with high coverage of single sided 1oz copper, in still air conditions (b) For a device surface mounted on FR4 PCB measured at t⭐5 secs. (c) Repetitive rating - pulse width limited by maximum junction temperature. Refer to Transient Thermal Impedance graph. ISSUE 1 - OCTOBER 2005 2 SEMICONDUCTORS ZXM61P03F CHARACTERISTICS ISSUE 1 - OCTOBER 2005 3 SEMICONDUCTORS ZXM61P03F ELECTRICAL CHARACTERISTICS (at Tamb = 25°C unless otherwise stated). PARAMETER SYMBOL MIN. Drain-Source Breakdown Voltage V (BR)DSS -30 Zero Gate Voltage Drain Current I DSS Gate-Body Leakage I GSS Gate-Source Threshold Voltage V GS(th) TYP. MAX. UNIT CONDITIONS. STATIC I D =-250µA, V GS =0V -1 µA V DS =-30V, V GS =0V ⫾100 nA -1.0 Static Drain-Source On-State Resistance (1) R DS(on) Forward Transconductance (3) V 0.35 0.55 0.44 g fs V GS =⫾20V, V DS =0V V I =-250µA, V DS = V GS Ω Ω V GS =-10V, I D =-0.6A V GS =-4.5V, I D =-0.3A S V DS =-10V,I D =-0.3A D DYNAMIC (3) Input Capacitance C iss 140 pF Output Capacitance C oss 45 pF Reverse Transfer Capacitance C rss 20 pF Turn-On Delay Time t d(on) 1.9 ns Rise Time tr 2.9 ns Turn-Off Delay Time t d(off) 8.9 ns Fall Time tf 5.0 ns Total Gate Charge Qg 4.8 nC Gate-Source Charge Q gs 0.62 nC Gate Drain Charge Q gd 1.3 nC Diode Forward Voltage (1) V SD -0.95 Reverse Recovery Time (3) t rr Reverse Recovery Charge(3) Q rr V DS =-25 V, V GS =0V, f=1MHz SWITCHING(2) (3) V DD =-15V, I D =-0.6A R G =6.2Ω, R D =25Ω (Refer to test circuit) V DS =-24V,V GS =-10V, I D =-0.6A (Refer to test circuit) SOURCE-DRAIN DIODE V T j =25°C, I S =-0.6A, V GS =0V 14.8 ns T j =25°C, I F =-0.6A, di/dt= 100A/µs 7.7 nC NOTES: (1) Measured under pulsed conditions. Width=300µs. Duty cycle ⱕ2%. (2) Switching characteristics are independent of operating junction temperature. (3) For design aid only, not subject to production testing. ISSUE 1 - OCTOBER 2005 4 SEMICONDUCTORS ZXM61P03F TYPICAL CHARACTERISTICS ISSUE 1 - OCTOBER 2005 5 SEMICONDUCTORS ZXM61P03F C - Capacitance (pF) 300 -VGS - Gate-Source Voltage (V) TYPICAL CHARACTERISTICS Vgs=0V f=1MHz 250 Ciss Coss Crss 200 150 100 50 0 0.1 1 10 100 14 ID=-0.6A 12 10 VDS=-24V 8 VDS=-15V 6 4 2 0 0 0.5 1 1.5 2 3 2.5 3.5 4 4.5 -VDS - Drain Source Voltage (V) Q -Charge (nC) Capacitance v Drain-Source Voltage Gate-Source Voltage v Gate Charge Current regulator QG 12V VG QGS 50k Same as D.U.T QGD VDS IG D.U.T ID VGS Charge Basic gate charge waveform Gate charge test circuit VDS 90% RD VGS VDS RG VCC 10% VGS tr td(off) t(on) tr td(on) t(on) Switching time waveforms Switching time test circuit ISSUE 1 - OCTOBER 2005 6 SEMICONDUCTORS ZXM61P03F PACKAGE DETAILS PAD LAYOUT DETAILS L 0.95 0.037 H N G D 3 leads 2.0 0.079 M 0.9 0.035 A B C K 0.8 0.031 F mm inches PACKAGE DIMENSIONS Millimeters DIM Inches Min Max Min Max A 2.67 3.05 0.105 0.120 B 1.20 1.40 0.047 0.055 Millimeters DIM Inches Min Max Max Max H 0.33 0.51 0.013 0.020 K 0.01 0.10 0.0004 0.004 C ᎏ 1.10 ᎏ 0.043 L 2.10 2.50 0.083 0.0985 D 0.37 0.53 0.015 0.021 M 0.45 0.64 0.018 0.025 F 0.085 0.15 0.0034 0.0059 N 0.95 NOM 0.0375 NOM ᎏ ᎏ ᎏ G 1.90 NOM 0.075 NOM © Zetex Semiconductors plc 2005 Europe Americas Asia Pacific Corporate Headquarters Zetex GmbH Streitfeldstraße 19 D-81673 München Germany Zetex Inc 700 Veterans Memorial Hwy Hauppauge, NY 11788 USA Zetex (Asia) Ltd 3701-04 Metroplaza Tower 1 Hing Fong Road, Kwai Fong Hong Kong Zetex Semiconductors plc Zetex Technology Park Chadderton, Oldham, OL9 9LL United Kingdom Telefon: (49) 89 45 49 49 0 Fax: (49) 89 45 49 49 49 [email protected] Telephone: (1) 631 360 2222 Fax: (1) 631 360 8222 [email protected] Telephone: (852) 26100 611 Fax: (852) 24250 494 [email protected] Telephone (44) 161 622 4444 Fax: (44) 161 622 4446 [email protected] These offices are supported by agents and distributors in major countries world-wide. This publication is issued to provide outline information only which (unless agreed by the Company in writing) may not be used, applied or reproduced for any purpose or form part of any order or contract or be regarded as a representation relating to the products or services concerned. The Company reserves the right to alter without notice the specification, design, price or conditions of supply of any product or service. For the latest product information, log on to www.zetex.com ISSUE 1 - OCTOBER 2005 7 SEMICONDUCTORS