IP4776CZ38 Fully integrated HDMI interface with level shifter, ESD and backdrive protection Rev. 04 — 12 June 2007 Product data sheet 1. General description The IP4776CZ38 is designed for HDMI host-interface protection. The IP4776CZ38 includes level shifting for the DDC channels and backdrive protection for HDMI as well as high-level ESD protection diodes for the TMDS signal lines. The level shifting function is required when the receiver operates at a supply voltage lower than the external devices to protect the I/Os against over voltages. The IP4776CZ38 contains four N-channel MOSFETs to provide this level shifting function. Furthermore, all TMDS intra-pairs are protected by a special diode configuration offering an ultra low line capacitance of 0.7 pF only. These diodes provide protection to downstream components from ESD voltages up to ±8 kV contact according to the IEC 61000-4-2, level 4 standard. 2. Features n Pb-free and RoHS compliant, Dark Green n Integrated high-level ESD protection, level shifting and backdrive protection n All TMDS lines with integrated rail-to-rail clamping diodes with downstream ESD protection of ±8 kV according to IEC 61000-4-2, level 4 standard n Matched 0.5 mm trace spacing n Bidirectional level shifting N-channel FETs provided for DDC clock and data channels n TMDS lines with ≤ 0.05 pF matching of capacitance between the TMDS pairs n Ultra low line capacitance of 0.7 pF per channel n HDMI 1.3 compliant n Backdrive protection n 38-pin TSSOP lead-free package 3. Applications n The IP4776CZ38 is designed for HDMI receiver and transmitter port protection, level shifting and backdrive protection e.g.: u TV u Graphics card u Set-top box u DVD u Digital media adapter u Game console IP4776CZ38 NXP Semiconductors Fully integrated HDMI interface with level shifter 4. Ordering information Table 1. Ordering information Type number IP4776CZ38 Package Name Description Version TSSOP38 plastic thin shrink small outline package; 38 leads; body width 4.4 mm; lead pitch 0.5 mm SOT510-1 5. Functional diagram TMDS_D2+ TMDS_D1+ TMDS_BIAS TMDS_D0+ TMDS_CLK+ VCC(5V0) TMDS_D2− TMDS_D1− TMDS_GND TMDS_D0− VCC(3V3) TMDS_BIAS DDC_CLK_IN VCC(3V3) TMDS_BIAS CEC_IN DDC_CLK_OUT VCC(3V3) TMDS_BIAS HOT_PLUG_DET_IN TMDS_CLK− CEC_OUT VCC(3V3) TMDS_BIAS HOT_PLUG_DET_OUT DDC_DAT_IN DDC_DAT_OUT 001aae863 Fig 1. Functional diagram IP4776CZ38_4 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 04 — 12 June 2007 2 of 13 IP4776CZ38 NXP Semiconductors Fully integrated HDMI interface with level shifter 6. Pinning information 6.1 Pinning VCC(5V0) 1 38 n.c. VCC(3V3) 2 37 TMDS_BIAS GND 3 36 GND TMDS_D2+ 4 35 n.c. TMDS_GND 5 34 TMDS_GND n.c. 6 33 TMDS_D2− TMDS_D1+ 7 32 n.c. TMDS_GND 8 31 TMDS_GND n.c. 9 TMDS_D0+ 10 30 TMDS_D1− IP4776CZ38 TMDS_GND 11 29 n.c. 28 TMDS_GND n.c. 12 27 TMDS_D0− TMDS_CLK+ 13 26 n.c. TMDS_GND 14 25 TMDS_GND n.c. 15 24 TMDS_CLK− CEC_IN 16 23 CEC_OUT DDC_CLK_IN 17 22 DDC_CLK_OUT DDC_DAT_IN 18 21 DDC_DAT_OUT HOT_PLUG_DET_IN 19 20 HOT_PLUG_DET_OUT 001aae862 Fig 2. Pin configuration 6.2 Pin description Table 2. Pin description Symbol Pin Description VCC(5V0) 1 supply voltage VCC(3V3) 2 bias supply voltage for the level shifters GND 3 ground reference[1] TMDS_D2+ 4 D2+ TMDS ESD protection[2] TMDS_GND 5 ground reference[1] n.c. 6 not connected[2] TMDS_D1+ 7 D1+ TMDS ESD protection[2] TMDS_GND 8 ground reference[1] n.c. 9 not connected[2] TMDS_D0+ 10 D0+ TMDS ESD protection[2] TMDS_GND 11 ground reference[1] n.c. 12 not connected[2] TMDS_CLK+ 13 CLK+ TMDS ESD protection[2] TMDS_GND 14 ground reference[1] n.c. 15 not connected[2] IP4776CZ38_4 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 04 — 12 June 2007 3 of 13 IP4776CZ38 NXP Semiconductors Fully integrated HDMI interface with level shifter Table 2. Pin description …continued Symbol Pin Description CEC_IN 16 CEC input[3] DDC_CLK_IN 17 DDC clock input[3] DDC_DAT_IN 18 DDC data input[3] HOT_PLUG_DET_IN 19 hot plug detection input[3] HOT_PLUG_DET_OUT 20 hot plug detection output[4] DDC_DAT_OUT 21 DDC data output[4] DDC_CLK_OUT 22 DDC clock output[4] CEC_OUT 23 CEC output[4] TMDS_CLK− 24 CLK− TMDS ESD protection[2] TMDS_GND 25 ground reference[1] n.c. 26 not connected[2] TMDS_D0− 27 D0− TMDS ESD protection[2] TMDS_GND 28 ground reference[1] n.c. 29 not connected[2] TMDS_D1− 30 D1− TMDS ESD protection[2] TMDS_GND 31 ground reference[1] n.c. 32 not connected[2] TMDS_D2− 33 D2− TMDS ESD protection[2] TMDS_GND 34 ground reference[1] n.c. 35 not connected[2] GND 36 ground reference[1] TMDS_BIAS 37 bias for TMDS ESD protection and bias for level shifter output ESD protection. This pin must be connected to a 0.1 µF capacitor. n.c. 38 not connected [1] Pins GND and TMDS_GND are internally connected. [2] This pin always has to be connected to the pin on the opposite location of the IC via a PCB track to guarantee correct functionality; see Figure 3, Figure 4 and Figure 5. [3] VCC(3V3) referenced logic level in. [4] VCC(5V0) referenced logic level out. IP4776CZ38_4 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 04 — 12 June 2007 4 of 13 IP4776CZ38 NXP Semiconductors Fully integrated HDMI interface with level shifter 7. Limiting values Table 3. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions VCC supply voltage VI input voltage at input pins VESD electrostatic discharge voltage signal pins; IEC 61000-4-2, level 4 Min Max Unit GND − 0.5 5.5 V GND − 0.5 5.5 V [1] contact [2] −8 +8 kV air discharge [2] −15 +15 kV contact −2 +2 kV air discharge −2 +2 kV −55 +125 °C all other pins; MIL-STD-883 Method 3015 (human body model) storage temperature Tstg [1] Signal pins: TMDS_D2+, TMDS_D2−, TMDS_D1+, TMDS_D1−, TMDS_D0+, TMDS_D0−, TMDS_CLK+, TMDS_CLK−, CEC_OUT, DDC_DAT_OUT, DDC_CLK_OUT, HOT_PLUG_DET_OUT. [2] This measurement is performed with a 0.1 µF external capacitor on pin TMDS_BIAS. 8. Recommended operating conditions Table 4. Recommended operating conditions Symbol Parameter Tamb ambient temperature Conditions Min Typ Max Unit −40 - +85 °C 9. Characteristics Table 5. Characteristics Tamb = 25 °C; unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit ICC(5V0) supply current (5.0 V) VCC(5V0) = 5.0 V - - 130 µA ICC(3V3) supply current (3.3 V) VCC(3V3) = 3.3 V - 1 5 µA - 0.1 0.5 µA [1] Ibck(out-VCC5V0) back current from output / TMDS pins to VCC(5V0) signal pins; powered down; VCC(5V0) < VO(ch) VBRzd Zener diode breakdown voltage I = 1 mA 6 - 9 V IL(r) reverse leakage current per TMDS channel; VI = 3.0 V - - 1 µA VF forward voltage - 0.7 - V - 0.7 - pF Cch(TMDS) TMDS channel capacitance VCC(5V0) = 5 V; f = 1 MHz; Vbias = 2.5 V IP4776CZ38_4 Product data sheet [2] © NXP B.V. 2007. All rights reserved. Rev. 04 — 12 June 2007 5 of 13 IP4776CZ38 NXP Semiconductors Fully integrated HDMI interface with level shifter Table 5. Characteristics …continued Tamb = 25 °C; unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit - 0.05 - pF ∆Cch(TMDS) TMDS channel capacitance difference VCC(5V0) = 5 V; f = 1 MHz; Vbias = 2.5 V [2] Cch(mutual) mutual channel capacitance between signal pin and pin n.c.; VCC(5V0) = 0 V; f = 1 MHz; Vbias = 2.5 V [2] - 0.07 - pF CI(ch-GND)(levsh) level shifting input capacitance from channel to ground VCC(5V0) = 0 V; f = 1 MHz; Vbias = 2.5 V [2] - 4 6 pF Rdyn I = 1 A; IEC 61000-4-5/9 - 2.4 - Ω dynamic resistance positive transient negative transient VCL(ch)trt(pos) positive transient channel clamping voltage VESD = 8 kV [3] ∆Von on-state voltage drop VCC(3V3) = 2.5 V; VS = GND; IDS = 3 mA [4] [1] Signal pins: TMDS_D2+, TMDS_D2−, TMDS_D1+, TMDS_D1−, TMDS_D0+, TMDS_D0−, TMDS_CLK+, TMDS_CLK−, CEC_OUT, DDC_DAT_OUT, DDC_CLK_OUT, HOT_PLUG_DET_OUT. [2] This parameter is guaranteed by design. [3] This measurement is performed with a 0.1 µF external capacitor on pin TMDS_BIAS. [4] For level shifting N-FET. IP4776CZ38_4 Product data sheet - 1.3 - Ω - 8 - V - 85 140 mV © NXP B.V. 2007. All rights reserved. Rev. 04 — 12 June 2007 6 of 13 IP4776CZ38 NXP Semiconductors Fully integrated HDMI interface with level shifter 10. Application information IP4776CZ38 VCC(5V0) VCC(3V3) GND 1 38 2 37 3 36 C_BYP 100 nF GND 35 n.c. TMDS_D2+ 4 TMDS_GND n.c. TMDS_BIAS TMDS_D2+ TMDS_GND TMDS_GND 5 34 6 33 TMDS_D2− TMDS_D2− 32 n.c. TMDS_D1+ n.c. TMDS_D1+ 7 TMDS_GND 31 TMDS_GND TMDS_GND 8 9 30 TMDS_D1− TMDS_D1− 29 n.c. TMDS_D0+ n.c. TMDS_D0+ 10 TMDS_GND HDMI TRANSMITTER TMDS_GND 11 28 12 27 TMDS_D0− TMDS_GND TMDS_D0− n.c. TMDS_CLK+ 13 TMDS_GND TMDS_CLK+ 26 n.c. TMDS_GND TMDS_GND 14 25 15 24 TMDS_CLK− TMDS_CLK− 16 23 HDMI CONNECTOR n.c. CEC_IN CEC_OUT CEC n.c. DDC_CLK_IN DDC_DAT_IN HOT_PLUG _DET_IN R_CEC 100 kΩ 17 22 18 21 19 20 DDC_CLK_OUT DDC_CLK DDC_DAT_OUT DDC_DAT HOT_PLUG_ DET_OUT R_Data 47 kΩ GND R_CEC 27 kΩ R_Clock 47 kΩ R_Data 1.5 kΩ +5 V HOT_ PLUG_DET R_Clock 1.5 kΩ R_PD 15 kΩ VCC(3V3) VCC(3V3) VCC(5V0) 001aae865 Use tapered tracks to connect adjacent TMDS+ and TMDS− pins with the opposite n.c. pins; see Figure 5. Use tapered tracks to connect adjacent TMDS+ and TMDS− pins with the HDMI connector; see Figure 5. Use tapered tracks to connect adjacent TMDS+ and TMDS− pins with the HDMI transmitter; see Figure 5. Fig 3. HDMI transmitter application layout diagram IP4776CZ38_4 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 04 — 12 June 2007 7 of 13 IP4776CZ38 NXP Semiconductors Fully integrated HDMI interface with level shifter IP4776CZ38 VCC(5V0) 38 1 VCC(3V3) 2 37 GND 3 36 C_BYP 100 nF GND 35 n.c. TMDS_D2+ 4 TMDS_GND n.c. TMDS_BIAS TMDS_D2+ TMDS_GND TMDS_GND 5 34 6 33 TMDS_D2− TMDS_D2− 32 n.c. TMDS_D1+ n.c. TMDS_D1+ 7 TMDS_GND 31 TMDS_GND 8 TMDS_GND 9 30 TMDS_D1− TMDS_D1− 29 n.c. TMDS_D0+ n.c. TMDS_D0+ 10 TMDS_GND HDMI RECEIVER TMDS_GND 11 28 12 27 TMDS_D0− TMDS_GND TMDS_D0− n.c. TMDS_GND TMDS_CLK+ 26 n.c. TMDS_CLK+ 13 TMDS_GND 14 25 15 24 TMDS_CLK− 16 23 HDMI CONNECTOR TMDS_GND TMDS_CLK− n.c. CEC_IN CEC_OUT CEC n.c. DDC_CLK_IN DDC_DAT_IN 17 22 18 21 HOT_PLUG _DET_IN 20 DDC_CLK_OUT DDC_CLK DDC_DAT_OUT DDC_DAT HOT_PLUG _DET_OUT GND +5 V R_Clock 47 kΩ R_CEC 100 kΩ R_Data 47 kΩ R_Clock 47 kΩ 1 2 3 8 EEPROM 4 R_CEC 27 kΩ HOT_PLUG _DET R_Data 47 kΩ R 10 kΩ 7 R_HP 1.0 kΩ 6 C_HP 100 nF 5 R_DDC 100 Ω VCC(3V3) 001aae961 VCC(3V3) VCC(5V0) Use tapered tracks to connect adjacent TMDS+ and TMDS− pins with the opposite n.c. pins; see Figure 5. Use tapered tracks to connect adjacent TMDS+ and TMDS− pins with the HDMI connector; see Figure 5. Use tapered tracks to connect adjacent TMDS+ and TMDS− pins with the HDMI receiver; see Figure 5. Fig 4. HDMI receiver application layout diagram IP4776CZ38_4 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 04 — 12 June 2007 8 of 13 IP4776CZ38 NXP Semiconductors D2+ D2− Fully integrated HDMI interface with level shifter D1+ CLK− CLK+ D0− TMDS_VDD 8 CB Z3 P C n 76 tio 47 ica IP p l Ap ug pl ta ot a H C_dlk D c D C_ D in D C_ E C D0+ Integrated Discretes IDs_boar d20_rev4 IDs 11/05 3 5V 3V C C C C GND V V D1− IP4776CZ38 001aae864 Fig 5. Layout proposal of printed-circuit board IP4776CZ38_4 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 04 — 12 June 2007 9 of 13 IP4776CZ38 NXP Semiconductors Fully integrated HDMI interface with level shifter 11. Package outline TSSOP38: plastic thin shrink small outline package; 38 leads; body width 4.4 mm; lead pitch 0.5 mm SOT510-1 E D A X c HE y v M A Z 20 38 A2 (A 3) A A1 pin 1 index θ Lp L 1 19 bp e detail X w M 2.5 0 5 mm scale DIMENSIONS (mm are the original dimensions). UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.85 0.25 0.27 0.17 0.20 0.09 9.8 9.6 4.5 4.3 0.5 6.4 1 0.7 0.5 0.2 0.08 0.08 0.49 0.21 8 o 0 o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT510-1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 03-02-18 05-11-02 MO-153 Fig 6. Package outline SOT510-1 (TSSOP38) IP4776CZ38_4 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 04 — 12 June 2007 10 of 13 IP4776CZ38 NXP Semiconductors Fully integrated HDMI interface with level shifter 12. Abbreviations Table 6. Abbreviations Acronym Description CEC Consumer Electronics Control DDC Data Display Channel DVD Digital Video Disk ESD ElectroStatic Discharge FET Field Effect Transistor HDM High-Definition Multimedia HDMI High-Definition Multimedia Interface MOSFET Metal Oxide Semiconductor Field Effect Transistor RoHS Restriction of the use of certain Hazardous Substances TMDS Transition Minimized Differential Signaling 13. Revision history Table 7. Revision history Document ID Release date Data sheet status Change notice Supersedes IP4776CZ38_4 20070612 Product data sheet - IP4776CZ38_3 Modifications: IP4776CZ38_3 Modifications: • • Section 2; update of first feature. Table 5; update of Max. value of back current from output / TMDS pins to VCC(5V0). 20070125 Product data sheet - IP4776CZ38_2 • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • • • Legal texts have been adapted to the new company name where appropriate. Table 5; update of supply current (5.0 V), Min and Typ values Update of Figure 3 and Figure 4 IP4776CZ38_2 20060918 Product data sheet - IP4776CZ38_1 IP4776CZ38_1 20060714 Product data sheet - - IP4776CZ38_4 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 04 — 12 June 2007 11 of 13 IP4776CZ38 NXP Semiconductors Fully integrated HDMI interface with level shifter 14. Legal information 14.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 14.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 14.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of a NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 14.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 15. Contact information For additional information, please visit: http://www.nxp.com For sales office addresses, send an email to: [email protected] IP4776CZ38_4 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 04 — 12 June 2007 12 of 13 IP4776CZ38 NXP Semiconductors Fully integrated HDMI interface with level shifter 16. Contents 1 2 3 4 5 6 6.1 6.2 7 8 9 10 11 12 13 14 14.1 14.2 14.3 14.4 15 16 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 Recommended operating conditions. . . . . . . . 5 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Application information. . . . . . . . . . . . . . . . . . . 7 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 11 Legal information. . . . . . . . . . . . . . . . . . . . . . . 12 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 12 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Contact information. . . . . . . . . . . . . . . . . . . . . 12 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2007. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 12 June 2007 Document identifier: IP4776CZ38_4