Order this document by TL081C/D These low–cost JFET input operational amplifiers combine two state–of– the–art linear technologies on a single monolithic integrated circuit. Each internally compensated operational amplifier has well matched high voltage JFET input devices for low input offset voltage. The BIFET technology provides wide bandwidths and fast slew rates with low input bias currents, input offset currents, and supply currents. These devices are available in single, dual and quad operational amplifiers which are pin–compatible with the industry standard MC1741, MC1458, and the MC3403/LM324 bipolar products. • Input Offset Voltage Options of 6.0 mV and 15 mV Max • • • • • • JFET INPUT OPERATIONAL AMPLIFIERS SEMICONDUCTOR TECHNICAL DATA Low Input Bias Current: 30 pA Low Input Offset Current: 5.0 pA 8 Wide Gain Bandwidth: 4.0 MHz 1 8 1 High Slew Rate: 13 V/µs P SUFFIX PLASTIC PACKAGE CASE 626 Low Supply Current: 1.4 mA per Amplifier High Input Impedance: 1012 Ω D SUFFIX PLASTIC PACKAGE CASE 751 (SO–8) PIN CONNECTIONS ORDERING INFORMATION Op Amp Function Device TL081CD Single TL082CD TL082ACP Quad SO–8 VEE 4 5 Offset Null TL081 (Top View) SO–8 Plastic DIP TA = 0° to +70°C TL084CN, ACN 7 VCC 6 Output + Noninvt Input 3 Plastic DIP TA = 0° to +70°C 8 NC Inv + Input 2 Package TA = 0° to +70°C TL081ACP Dual Offset Null 1 Operating Temperature Range Output A 1 Plastic DIP 8 2 Inputs A – + 3 – + VEE 4 VCC 7 Output B 6 Inputs B 5 TL082 (Top View) Representative Circuit Schematic (Each Amplifier) Output Q4 Q2 Q5 Q3 14 Q1 1 Q6 J1 – Inputs + N SUFFIX PLASTIC PACKAGE CASE 646 VCC J2 Q20 Q15 10 pF Q13 Output 1 1 24 Q21 Q10 J3 Q23 Q19 Q14 Q12 PIN CONNECTIONS 2.0 k Q17 Inputs 1 Q16 Q11 Q8 Q7 Q25 5 6 Q18 1.5 k – 1 4 + Bias Circuitry Common to All Amplifiers VEE 13 Inputs 4 12 11 VEE + – 2 3 + – Output 2 7 1.5 k 10 Inputs 3 9 8 Output 3 TL084 (Top View) Motorola, Inc. 1997 MOTOROLA ANALOG IC DEVICE DATA – + VCC 4 Q9 Inputs 2 Offset Null (TL081 only) 2 3 Q22 Q24 14 Output 4 Rev 1 1 TL081C,AC TL082C,AC TL084C,AC MAXIMUM RATINGS Symbol Value Unit Supply Voltage Rating VCC VEE 18 –18 V Differential Input Voltage VID ±30 V VIDR ±15 V tSC Continuous PD 1/θJA 680 10 mW mW/°C TA 0 to +70 °C Tstg –65 to +150 °C Input Voltage Range (Note 1) Output Short Circuit Duration (Note 2) Power Dissipation Plastic Package (N, P) Derate above TA = +47°C Operating Ambient Temperature Range Storage Temperature Range NOTES: 1. The magnitude of the input voltage must not exceed the magnitude of the supply voltage or 15 V, whichever is less. 2. The output may be shorted to ground or either supply. Temperature and/or supply voltages must be limited to ensure that power dissipation ratings are not exceeded. 3. ESD data available upon request. ELECTRICAL CHARACTERISTICS (VCC = 15 V, VEE = –15 V, TA = Tlow to Thigh [Note 1].) Characteristics Symbol Input Offset Voltage (RS ≤ 10 k, VCM = 0) TL081C, TL082C TL084C TL08_AC VIO Input Offset Current (VCM = 0) (Note 2) TL08_C TL08_AC IIO Input Bias Current (VCM = 0) (Note 2) TL08_C TL08_AC IIB Large–Signal Voltage Gain (VO= ±10 V,RL ≥ 2.0 k) TL08_C TL08_AC Output Voltage Swing (Peak–to–Peak) (RL ≥ 10 k) (RL ≥ 2.0 k) Min Typ Max – – – – – – 20 20 7.5 – – – – 5.0 3.0 – – – – 10 7.0 15 25 – – – – 24 20 – – – – Unit mV nA nA AVOL V/mV VO V NOTES: 1. Tlow = 0°C for TL081AC,C Thigh = 70°C for TL081AC 0°C for TL082AC,C +70°C for TL082AC,C 0°C for TL084AC,C +70°C for TL084AC,C 2. Input Bias currents of JFET input op amps approximately double for every 10°C rise in Junction Temperature as shown in Figure 3. To maintain junction temperature as close to ambient temperature as possible, pulse techniques must be used during testing. Figure 1. Unity Gain Voltage Follower Figure 2. Inverting Gain of 10 Amplifier 10 k 1.0 k – VO + Vin – VO + Vin RL = 2.0 k 2 CL = 100 pF RL CL = 100 pF MOTOROLA ANALOG IC DEVICE DATA TL081C,AC TL082C,AC TL084C,AC ELECTRICAL CHARACTERISTICS (VCC = 15 V, VEE = –15 V, TA = 25°C, unless otherwise noted.) Min Typ Max – – – 5.0 5.0 3.0 15 15 6.0 – 10 – – – 5.0 5.0 200 100 – – 30 30 400 200 – 1012 – ±10 ±11 15, –12 15, –12 – – 25 50 150 150 – – 24 28 – 70 80 100 100 – – 70 80 100 100 – – ID – 1.4 2.8 mA Unity Gain Bandwidth BW – 4.0 – MHz Slew Rate (See Figure 1) Vin = 10 V, RL = 2.0 k, CL = 100 pF SR – 13 – V/µs tr – 0.1 – µs Overshoot (Vin = 20 mV, RL = 2.0 k, CL = 100 pF) OS – 10 – % Equivalent Input Noise Voltage RS = 100 Ω, f = 1000 Hz en – 25 – nV/ √ Hz Channel Separation AV = 100 CS – 120 – dB Characteristics Input Offset Voltage (RS ≤ 10 k, VCM = 0) TL081C, TL082C TL084C TL08_AC Average Temperature Coefficient of Input Offset Voltage RS = 50 Ω, TA = Tlow to Thigh (Note 1) Symbol VIO ∆VIO/∆T Input Offset Current (VCM = 0) (Note 2) TL08_C TL08_AC IIO Input Bias Current (VCM = 0) (Note 2) TL08_C TL08_AC IIB Input Resistance ri Common Mode Input Voltage Range TL08_C TL08_AC VICR Large Signal Voltage Gain (VO = ±10 V, RL ≥ 2.0 k) TL08_C TL08_AC AVOL Output Voltage Swing (Peak–to–Peak) (RL = 10 k) VO Common Mode Rejection Ratio (RS ≤ 10 k) TL08_C TL08_AC CMRR Supply Voltage Rejection Ratio (RS ≤ 10 k) TL08_C TL08_AC PSRR Supply Current (Each Amplifier) Rise Time (See Figure 1) Unit mV µV/°C pA pA Ω V V/mV V dB dB NOTES: 1. Tlow = 0°C for TL081AC,C Thigh = 70°C for TL081AC 0°C for TL082AC,C +70°C for TL082AC,C 0°C for TL084AC,C +70°C for TL084AC,C 2. Input Bias currents of JFET input op amps approximately double for every 10°C rise in Junction Temperature as shown in Figure 3. To maintain junction temperature as close to ambient temperature as possible, pulse techniques must be used during testing. MOTOROLA ANALOG IC DEVICE DATA 3 TL081C,AC TL082C,AC TL084C,AC Figure 3. Input Bias Current versus Temperature Figure 4. Output Voltage Swing versus Frequency 35 10 VO, OUTPUT VOLTAGE SWING (Vpp ) IIB , INPUT BIAS CURRENT (nA) 100 VCC/VEE = ±15 V 1.0 0.1 0.01 –100 –75 –50 –25 0 25 50 75 100 5.0 1.0 k 10 k 100 k 1.0 M 10 M 40 VO, OUTPUT VOLTAGE SWING (Vpp ) VO, OUTPUT VOLTAGE SWING (Vpp ) VCC/VEE = ±15 V TA = 25°C (See Figure 2) 0.2 0.4 0.7 1.0 2.0 4.0 7.0 30 20 10 0 5.0 10 15 20 RL, LOAD RESISTANCE (kΩ) VCC, |VEE| , SUPPLY VOLTAGE (±V) Figure 7. Output Voltage Swing versus Temperature Figure 8. Supply Current per Amplifier versus Temperature VCC/VEE = ±15 V (See Figure 2) RL = 10 k 30 25 RL = 2.0 k 20 15 10 5.0 –50 RL = 2.0 k TA = 25°C 0 10 ID , SUPPLY DRAIN CURRENT (mA) VO, OUTPUT VOLTAGE SWING (Vpp ) ±5.0 V 10 Figure 6. Output Voltage Swing versus Supply Voltage 40 –25 0 25 50 75 TA, AMBIENT TEMPERATURE (°C) 4 15 Figure 5. Output Voltage Swing versus Load Resistance 5.0 0 –75 ±10 V 20 f, FREQUENCY (Hz) 10 35 25 TA, AMBIENT TEMPERATURE (°C) 20 0 0.1 RL = 2.0 k TA = 25°C (See Figure 2) VCC/VEE = ±15 V 0 100 125 150 40 30 30 100 125 2.0 1.8 VCC/VEE = ±15 V 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 –75 –50 –25 0 25 50 75 100 125 TA, AMBIENT TEMPERATURE (°C) MOTOROLA ANALOG IC DEVICE DATA TL081C,AC TL082C,AC TL084C,AC Figure 9. Large Signal Voltage Gain and Phase Shift versus Frequency Figure 10. Large Signal Voltage Gain versus Temperature 106 105 104 0° Gain 103 45° 102 90° Phase Shift 101 1.0 1.0 10 100 1.0 k 135° 10 k A VOL, OPEN–LOOP GAIN (V/m/v) 1000 VCC/VEE = ±15 V RL = 2.0 k TA = 25°C 107 PHASE SHIFT (DEGREES) A VOL, OPEN–LOOP GAIN (V/m/v) 108 180° 10 M 100 M 100 k 1.0 M VCC/VEE = ±15 V VO = ±10 V RL = 2.0 k 100 10 1.0 –100 –75 –50 f, FREQUENCY (Hz) NORMALIZED SLEW RATE 1.15 1.10 1.05 1.0 0.95 0.90 0.85 –25 0 25 50 75 100 125 TA, AMBIENT TEMPERATURE (°C) en, EQUIVALENT INPUT NOISE VOLTAGE ( nV/ √ Hz ) 1.20 –50 0 25 50 75 100 150 125 TA, AMBIENT TEMPERATURE (°C) Figure 11. Normalized Slew Rate versus Temperature 0.80 –75 –25 Figure 12. Equivalent Input Noise Voltage versus Frequency 70 VCC/VEE = ±15 V AV = 10 RS = 100 Ω TA = 25°C 60 50 40 30 20 10 0 0.01 0.05 0.1 0.5 1.0 5.0 10 50 100 f, FREQUENCY (Hz) THD, TOTAL HARMONIC DISTORTION (%) Figure 13. Total Harmonic Distortion versus Frequency 1.0 0.5 0.1 VCC/VEE = ±15 V AV = 1.0 VO = 6.0 V (RMS) TA = 25°C 0.05 0.01 0.005 0.001 0.1 0.5 1.0 5.0 10 50 100 f, FREQUENCY (Hz) MOTOROLA ANALOG IC DEVICE DATA 5 TL081C,AC TL082C,AC TL084C,AC Figure 14. Positive Peak Detector Figure 15. Voltage Controlled Current Source R3 1/2 TL082 – 1/2 TL082 Vin 1N914 + R1 Vin – R4 V If R1 through R4 > > R5 then Iout = in R5 Figure 16. Long Interval RC Timer Figure 17. Isolating Large Capacitive Loads R2 5.1 k R1 V1 R3 VR – TL081 R2 R4 R1 5.1 k Run *Polycarbonate or Polystyrene Capacitor ȏ Time (t) = R4 C n (VR/VR–VI), R3 = R4, R5 = 0.1 R6 If R1 = R2: t = 0.693 R4C – TL081 + 2.0 V 0 –2.0 V C* R5 CC 20 pF 6 + R6 Clear IO R2 *Polycarbonate or Polystyrene Capacitor Reset R5 – VO + * 1.0 µF + TL081 VO IO R3 10 RL 5.1 k CL 0.5 µF t • • • • Overshoot 10% ts = 10 µs When driving large CL, the VO slew rate is determined by CL and IO(max): DV O I O 0.02 V/µs = 0.04 V/µs (with C shown) L Dt 0.5 C L + ^ Design Example: 100 Second Timer VR = 10 V C = l.0 mF R3 = R4 = 144 M R6 = 20 k R5 = 2.0 k R1 = R2 = 1.0 k 6 MOTOROLA ANALOG IC DEVICE DATA TL081C,AC TL082C,AC TL084C,AC OUTLINE DIMENSIONS P SUFFIX PLASTIC PACKAGE CASE 626–05 ISSUE K 8 5 NOTES: 1. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 2. PACKAGE CONTOUR OPTIONAL (ROUND OR SQUARE CORNERS). 3. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. –B– 1 4 F DIM A B C D F G H J K L M N –A– NOTE 2 L C J –T– N SEATING PLANE D M K MILLIMETERS MIN MAX 9.40 10.16 6.10 6.60 3.94 4.45 0.38 0.51 1.02 1.78 2.54 BSC 0.76 1.27 0.20 0.30 2.92 3.43 7.62 BSC ––– 10_ 0.76 1.01 INCHES MIN MAX 0.370 0.400 0.240 0.260 0.155 0.175 0.015 0.020 0.040 0.070 0.100 BSC 0.030 0.050 0.008 0.012 0.115 0.135 0.300 BSC ––– 10_ 0.030 0.040 G H 0.13 (0.005) T A M M B M D SUFFIX PLASTIC PACKAGE CASE 751–05 (SO–8) ISSUE S D A NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. DIMENSIONS ARE IN MILLIMETERS. 3. DIMENSION D AND E DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE MOLD PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 TOTAL IN EXCESS OF THE B DIMENSION AT MAXIMUM MATERIAL CONDITION. C 8 5 0.25 H E M B M 1 4 h B e X 45 _ q A C SEATING PLANE L 0.10 A1 B 0.25 M C B S A S MOTOROLA ANALOG IC DEVICE DATA DIM A A1 B C D E e H h L q MILLIMETERS MIN MAX 1.35 1.75 0.10 0.25 0.35 0.49 0.18 0.25 4.80 5.00 3.80 4.00 1.27 BSC 5.80 6.20 0.25 0.50 0.40 1.25 0_ 7_ 7 TL081C,AC TL082C,AC TL084C,AC OUTLINE DIMENSIONS N SUFFIX PLASTIC PACKAGE CASE 646–06 ISSUE M 14 8 1 7 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. B A F L N C –T– SEATING PLANE J K H G D 14 PL 0.13 (0.005) M DIM A B C D F G H J K L M N INCHES MIN MAX 0.715 0.770 0.240 0.260 0.145 0.185 0.015 0.021 0.040 0.070 0.100 BSC 0.052 0.095 0.008 0.015 0.115 0.135 0.290 0.310 ––– 10_ 0.015 0.039 MILLIMETERS MIN MAX 18.16 18.80 6.10 6.60 3.69 4.69 0.38 0.53 1.02 1.78 2.54 BSC 1.32 2.41 0.20 0.38 2.92 3.43 7.37 7.87 ––– 10_ 0.38 1.01 M Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. 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