ONSEMI MC12026ADR2

MC12026A
1.1 GHz Dual Modulus
Prescaler
Description
The MC12026 is a high frequency, low voltage dual modulus
prescaler used in phase−locked loop (PLL) applications.
The MC12026A can be used with CMOS synthesizers requiring
positive edges to trigger internal counters in a PLL to provide tuning
signals up to 1.1 GHz in programmable frequency steps.
A Divide Ratio Control (SW) permits selection of an 8/9 or 16/17
divide ratio as desired.
The Modulus Control (MC) selects the proper divide number after
SW has been biased to select the desired divide ratio.
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MARKING
DIAGRAM
8
SOIC−8
D SUFFIX
CASE 751
8
1
1
Features
•
•
•
•
•
•
•
•
1.1 GHz Toggle Frequency
Supply Voltage 4.5 to 5.5 V
Low Power 4.0 mA Typical
Operating Temperature Range of −40 to 85°C
The MC12026 is Pin Compatible with the MC12022
Short Setup Time (tset ) 6.0 ns Typical @ 1.1 GHz
Modulus Control Input Level is Compatible with Standard CMOS
and TTL
Pb−Free Packages are Available
Table 1. FUNCTIONAL TABLE
SW
MC
H
8
H
L
9
L
H
16
L
L
17
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
PIN CONNECTIONS
IN
VCC
SW
OUT
Divide Ratio
H
A
L
Y
W
G
026A
ALYW
G
1
8
2
7
3
6
4
5
IN
NC
MC
GND
(Top View)
1. SW: H = VCC, L = Open. A logic L can also be applied by grounding this pin,
but this is not recommended due to increased power consumption.
2. MC: H = 2.0 V to VCC, L = GND to 0.8 V.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
Table 2. MAXIMUM RATINGS
Characteristics
Symbol
Value
Unit
VCC
−0.5 to 7.0
Vdc
Operating Temperature Range
TA
−40 to 85
°C
Storage Temperature Range
Tstg
−65 to 150
°C
Modulus Control Input, Pin 6
MC
−0.5 to 6.5
Vdc
IO
10.0
mA
Power Supply Voltage, Pin 2
Maximum Output Current, Pin 4
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
NOTE: ESD data available upon request.
© Semiconductor Components Industries, LLC, 2006
January, 2006 − Rev. 8
1
Publication Order Number:
MC12026A/D
MC12026A
Table 3. ELECTRICAL CHARACTERISTICS (VCC = 4.5 to 5.5; TA = −40 to 85°C, unless otherwise noted.)
Symbol
Min
Typ
Max
Unit
ft
0.1
1.4
1.1
GHz
Supply Current Output Unloaded (Pin 2)
ICC
−
4.0
5.3
mA
Modulus Control Input High (MC)
VIH1
2.0
−
VCC
V
Modulus Control Input Low (MC)
VIL1
GND
−
0.8
V
Divide Ratio Control Input High (SW)
VIH2
VCC − 0.5 V
VCC
VCC + 0.5 V
V
Divide Ratio Control Input Low (SW)
VIL2
OPEN
OPEN
OPEN
−
Output Voltage Swing
(RL = 560 W; IO = 5.5 mA) (Note 3)
(RL = 1.1 kW; IO = 2.9 mA) (Note 4)
Vout
1.0
1.6
−
Vpp
Modulus Setup Time MC to Out (Note 5)
tSET
−
6.0
9.0
ns
Input Voltage Sensitivity
100−250 MHz
250−1100 MHz
Vin
400
100
−
−
1000
1000
Characteristic
Toggle Frequency (Sin Wave)
3. Divide Ratio of ÷8/9 at 1.1 GHz, CL = 8.0 pF.
4. Divide Ratio of ÷16/17 at 1.1 GHz, CL = 8.0 pF.
5. Assuming RL = 560 W at 1.1 GHz.
In
In
D
Q
D
Q
C
QB
C
QB
D
Q
QB
C M
MC
1
D
QB
D
QB
C
Q
C
Q
0
SW
Out
Figure 1. Logic Diagram (MC12026A)
Prop. Delay
In
Out
MC Setup
MC Release
Modulus setup time MC to out is the MC
setup or MC release plus the prop delay.
Figure 2. Modulus Setup Time
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2
MC
mVpp
MC12026A
VCC = 4.5 to 5.5V
C3
SINE WAVE GENERATOR
C1
VCC
SW
IN
50 W
OUT
C2
RL
IN
MC
CL
GND
EXTERNAL COMPONENTS
C1 = C2 = 1000 pF
C3 = 0.1mF
CL = 8pF (Including Scope and Jig Capacitance)
RL = 560W (for ÷8/9 at 1.1GHz)
MC INPUT
Figure 3. AC Test Circuit
+15.0
+1257.40
ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ
+5.0
0
+397.64
+223.61
OPERATING
WINDOW
−5.0
−10.0
−15.0
−20.0
+125.74
+70.71
+39.76
+22.36
−25.0
+12.57
−30.0
+7.07
−35.0
+3.98
−40.0
+2.24
−45.0
+1.26
−50.0
0
200
400
600
800
1000
1200
1400
1600
+0.71
1800
FREQUENCY (MHz)
Divide Ratio = 8; VCC = 5.0 V; TA = 25°C
Figure 4. Input Signal Amplitude versus Input Frequency
2000
1600
1200
800
400
0
200
400
600
800
1000
1200
1400
FREQUENCY (MHz)
Figure 5. Output Amplitude versus Input Frequency
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3
1600
0
1800
mVpp
AMPLITUDE (dBm)
+707.11
mVrms
+10.0
MC12026A
5.88V
880mV
36.6ns
86.6ns
(÷8, 1.1 GHz Input Frequency, VCC = 5.0, TA = 25°C, Output Loaded With 8.0pF)
Figure 6. Typical Output Waveform
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4
MC12026A
200
150
100
R
MHz
50
0
−50
OHMS
−100
−150
−200
−250
−300
−350
−400
−450
jX
−500
−550
−600
−650
100
200
300
400
500
600
700
800
900
1000
1100
1200
Figure 7. Typical Input Impedance versus Input Frequency
ORDERING INFORMATION
Device
MC12026AD
Package
Shipping †
SOIC−8
98 Units / Rail
MC12026ADG
SOIC−8
(Pb−Free)
98 Units / Rail
MC12026ADR2
SOIC−8
2500 / Tape & Reel
SOIC−8
(Pb−Free)
2500 / Tape & Reel
MC12026ADR2G
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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5
MC12026A
PACKAGE DIMENSIONS
SOIC−8 NB
CASE 751−07
ISSUE AG
−X−
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
A
8
5
S
B
1
0.25 (0.010)
M
Y
M
4
−Y−
K
G
C
N
DIM
A
B
C
D
G
H
J
K
M
N
S
X 45 _
SEATING
PLANE
−Z−
0.10 (0.004)
H
D
0.25 (0.010)
M
Z Y
S
X
M
J
S
MILLIMETERS
MIN
MAX
4.80
5.00
3.80
4.00
1.35
1.75
0.33
0.51
1.27 BSC
0.10
0.25
0.19
0.25
0.40
1.27
0_
8_
0.25
0.50
5.80
6.20
INCHES
MIN
MAX
0.189
0.197
0.150
0.157
0.053
0.069
0.013
0.020
0.050 BSC
0.004
0.010
0.007
0.010
0.016
0.050
0 _
8 _
0.010
0.020
0.228
0.244
SOLDERING FOOTPRINT*
1.52
0.060
7.0
0.275
4.0
0.155
0.6
0.024
1.270
0.050
SCALE 6:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
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Literature Distribution Center for ON Semiconductor
USA/Canada
P.O. Box 61312, Phoenix, Arizona 85082−1312 USA
Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center
2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051
Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada
Phone: 81−3−5773−3850
Email: [email protected]
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For additional information, please contact your
local Sales Representative.
MC12026A/D