ONSEMI PZTA42T1

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SEMICONDUCTOR TECHNICAL DATA
Motorola Preferred Device
NPN Silicon
COLLECTOR 2,4
SOT–223 PACKAGE
NPN SILICON
HIGH VOLTAGE
TRANSISTOR
SURFACE MOUNT
BASE
1
EMITTER 3
MAXIMUM RATINGS
4
Rating
Symbol
Value
Unit
Collector-Emitter Voltage (Open Base)
VCEO
300
Vdc
Collector-Base Voltage (Open Emitter)
VCBO
300
Vdc
Emitter-Base Voltage (Open Collector)
VEBO
6.0
Vdc
Collector Current (DC)
IC
500
mAdc
Total Power Dissipation @ TA = 25°C(1)
PD
1.5
Watts
Storage Temperature Range
Tstg
– 65 to +150
°C
TJ
150
°C
Characteristic
Symbol
Max
Unit
Thermal Resistance, Junction-to-Ambient(1)
RθJA
83.3
°C/W
Junction Temperature
1
2
3
CASE 318E-04, STYLE 1
TO-261AA
DEVICE MARKING
P1D
THERMAL CHARACTERISTICS
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Characteristics
Symbol
Min
Max
Unit
Collector-Emitter Breakdown Voltage(2)
(IC = 1.0 mAdc, IB = 0)
V(BR)CEO
300
—
Vdc
Collector-Base Breakdown Voltage
(IC = 100 µAdc, IE = 0)
V(BR)CBO
300
—
Vdc
Emitter-Base Breakdown Voltage
(IE = 100 µAdc, IC = 0)
V(BR)EBO
6.0
—
Vdc
Collector-Base Cutoff Current
(VCB = 200 Vdc, IE = 0)
ICBO
—
0.1
µAdc
Emitter-Base Cutoff Current
(VBE = 6.0 Vdc, IC = 0)
IEBO
—
0.1
µAdc
OFF CHARACTERISTICS
1. Device mounted on a glass epoxy printed circuit board 1.575 in. x 1.575 in. x 0.059 in.; mounting pad for the collector lead min 0.93 in2.
2. Pulse Test Conditions, tp = 300 µs, δ = 0.02.
Preferred devices are Motorola recommended choices for future use and best overall value.
Thermal Clad is a trademark of the Bergquist Company
REV 3
Small–Signal
Motorola
Motorola, Inc.
1998
Transistors, FETs and Diodes Device Data
1
PZTA42T1
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) (Continued)
ON CHARACTERISTICS
DC Current Gain
(IC = 1.0 mAdc, VCE = 10 Vdc)
(IC = 10 mAdc, VCE = 10 Vdc)
(IC = 30 mAdc, VCE = 10 Vdc)
hFE
—
25
40
40
—
—
—
fT
50
—
MHz
Cre
—
3.0
pF
Collector-Emitter Saturation Voltage
(IC = 20 mAdc, IB = 2.0 mAdc)
VCE(sat)
—
0.5
Vdc
Base-Emitter Saturation Voltage
(IC = 20 mAdc, IB = 2.0 mAdc)
VBE(sat)
—
0.9
Vdc
DYNAMIC CHARACTERISTICS
Current-Gain — Bandwidth Product
(IC = 10 mAdc, VCE = 20 Vdc, f = 100 MHz)
Feedback Capacitance
(VCB = 20 Vdc, IE = 0, f = 1.0 MHz)
2
Motorola Small–Signal Transistors, FETs and Diodes Device Data
PZTA42T1
120
hFE , DC CURRENT GAIN
VCE = 10 Vdc
TJ = +125°C
100
80
25°C
60
40
–55°C
20
0
0.1
1.0
10
100
IC, COLLECTOR CURRENT (mA)
Figure 1. DC Current Gain
100
f T, CURRENT–GAIN — BANDWIDTH (MHz)
80
C, CAPACITANCE (pF)
Ceb @ 1MHz
10
1.0
0.1
0.1
Ccb @ 1MHz
1.0
10
100
VR, REVERSE VOLTAGE (VOLTS)
1000
Figure 2. Capacitance
70
60
50
40
30
TJ = 25°C
VCE = 20 V
f = 20 MHz
20
10
1.0
2.0 3.0
5.0 7.0 10
20
30
IC, COLLECTOR CURRENT (mA)
50 70 100
Figure 3. Current–Gain – Bandwidth
1.4
V, VOLTAGE (VOLTS)
1.2
VCE(sat) @ 25°C, IC/IB = 10
VCE(sat) @ 125°C, IC/IB = 10
VCE(sat) @ –55°C, IC/IB = 10
VBE(sat) @ 25°C, IC/IB = 10
1.0
0.8
VBE(sat) @ 125°C, IC/IB = 10
VBE(sat) @ –55°C, IC/IB = 10
VBE(on) @ 25°C, VCE = 10 V
VBE(on) @ 125°C, VCE = 10 V
VBE(on) @ –55°C, VCE = 10 V
0.6
0.4
0.2
0.0
0.1
1.0
10
IC, COLLECTOR CURRENT (mA)
100
Figure 4. ”ON” Voltages
Motorola Small–Signal Transistors, FETs and Diodes Device Data
3
PZTA42T1
INFORMATION FOR USING THE SOT-223 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total
design. The footprint for the semiconductor packages must
be the correct size to insure proper solder connection
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
0.15
3.8
0.079
2.0
0.091
2.3
0.248
6.3
0.091
2.3
0.079
2.0
0.059
1.5
0.059
1.5
0.059
1.5
inches
mm
SOT-223
SOT-223 POWER DISSIPATION
PD =
TJ(max) – TA
RθJA
160
Board Material = 0.0625″
G-10/FR-4, 2 oz Copper
140
TA = 25°C
0.8 Watts
° 120
PD = 150°C – 25°C = 1.5 watts
83.3°C/W
The 83.3°C/W for the SOT-223 package assumes the use
of the recommended footprint on a glass epoxy printed circuit
board to achieve a power dissipation of 1.5 watts. There are
other alternatives to achieving higher power dissipation from
the SOT-223 package. One is to increase the area of the
collector pad. By increasing the area of the collector pad, the
power dissipation can be increased. Although the power
1.25 Watts*
1.5 Watts
100
θ
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values into
the equation for an ambient temperature TA of 25°C, one can
calculate the power dissipation of the device which in this
case is 1.5 watts.
4
dissipation can almost be doubled with this method, area is
taken up on the printed circuit board which can defeat the
purpose of using surface mount technology. A graph of RθJA
versus collector pad area is shown in Figure 1.
R JA , Thermal Resistance, Junction
to Ambient ( C/W)
The power dissipation of the SOT-223 is a function of the
pad size. This can vary from the minimum pad size for
soldering to a pad size given for maximum power dissipation.
Power dissipation for a surface mount device is determined
by TJ(max), the maximum rated junction temperature of the
die, RθJA, the thermal resistance from the device junction to
ambient, and the operating temperature, TA . Using the
values provided on the data sheet for the SOT-223 package,
PD can be calculated as follows:
80
0.0
*Mounted on the DPAK footprint
0.2
0.4
0.6
A, Area (square inches)
0.8
1.0
Figure 5. Thermal Resistance versus Collector
Pad Area for the SOT-223 Package (Typical)
Another alternative would be to use a ceramic substrate or
an aluminum core board such as Thermal Clad. Using a
board material such as Thermal Clad, an aluminum core
board, the power dissipation can be doubled using the same
footprint.
Motorola Small–Signal Transistors, FETs and Diodes Device Data
PZTA42T1
SOLDER STENCIL GUIDELINES
Prior to placing surface mount components onto a printed
circuit board, solder paste must be applied to the pads. A
solder stencil is required to screen the optimum amount of
solder paste onto the footprint. The stencil is made of brass
or stainless steel with a typical thickness of 0.008 inches.
The stencil opening size for the SOT-223 package should be
the same as the pad size on the printed circuit board, i.e., a
1:1 registration.
SOLDERING PRECAUTIONS
The melting temperature of solder is higher than the rated
temperature of the device. When the entire device is heated
to a high temperature, failure to complete soldering within a
short time could result in device failure. Therefore, the
following items should always be observed in order to
minimize the thermal stress to which the devices are
subjected.
• Always preheat the device.
• The delta temperature between the preheat and
soldering should be 100°C or less.*
• When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering method,
the difference should be a maximum of 10°C.
• The soldering temperature and time should not exceed
260°C for more than 10 seconds.
• When shifting from preheating to soldering, the
maximum temperature gradient should be 5°C or less.
• After soldering has been completed, the device should
be allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and result
in latent failure due to mechanical stress.
• Mechanical stress or shock should not be applied during
cooling
* Soldering a device without preheating can cause excessive
thermal shock and stress which can result in damage to the
device.
TYPICAL SOLDER HEATING PROFILE
For any given circuit board, there will be a group of control
settings that will give the desired heat pattern. The operator
must set temperatures for several heating zones, and a
figure for belt speed. Taken together, these control settings
make up a heating “profile” for that particular circuit board.
On machines controlled by a computer, the computer
remembers these profiles from one operating session to the
next. Figure 2 shows a typical heating profile for use when
soldering a surface mount device to a printed circuit board.
This profile will vary among soldering systems but it is a good
starting point. Factors that can affect the profile include the
type of soldering system in use, density and types of
components on the board, type of solder used, and the type
of board or substrate material being used. This profile shows
temperature versus time. The line on the graph shows the
STEP 1
PREHEAT
ZONE 1
“RAMP”
200°C
STEP 2
STEP 3
VENT
HEATING
“SOAK” ZONES 2 & 5
“RAMP”
DESIRED CURVE FOR HIGH
MASS ASSEMBLIES
150°C
actual temperature that might be experienced on the surface
of a test board at or near a central solder joint. The two
profiles are based on a high density and a low density board.
The Vitronics SMD310 convection/infrared reflow soldering
system was used to generate this profile. The type of solder
used was 62/36/2 Tin Lead Silver with a melting point
between 177 –189°C. When this type of furnace is used for
solder reflow work, the circuit boards and solder joints tend to
heat first. The components on the board are then heated by
conduction. The circuit board, because it has a large surface
area, absorbs the thermal energy more efficiently, then
distributes this energy to the components. Because of this
effect, the main body of a component may be up to 30
degrees cooler than the adjacent solder joints.
STEP 6 STEP 7
STEP 5
STEP 4
VENT COOLING
HEATING
HEATING
ZONES 3 & 6 ZONES 4 & 7
205° TO
“SPIKE”
“SOAK”
219°C
170°C
PEAK AT
SOLDER
160°C
JOINT
150°C
100°C
140°C
100°C
SOLDER IS LIQUID FOR
40 TO 80 SECONDS
(DEPENDING ON
MASS OF ASSEMBLY)
DESIRED CURVE FOR LOW
MASS ASSEMBLIES
50°C
TIME (3 TO 7 MINUTES TOTAL)
TMAX
Figure 6. Typical Solder Heating Profile
Motorola Small–Signal Transistors, FETs and Diodes Device Data
5
PZTA42T1
PACKAGE DIMENSIONS
A
F
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
4
S
B
1
2
3
D
L
G
J
C
0.08 (0003)
M
H
K
CASE 318E–04
ISSUE H
TO-261AA
INCHES
DIM MIN
MAX
A
0.249
0.263
B
0.130
0.145
C
0.060
0.068
D
0.024
0.035
F
0.115
0.126
G
0.087
0.094
H 0.0008 0.0040
J
0.009
0.014
K
0.060
0.078
L
0.033
0.041
M
0_
10 _
S
0.264
0.287
STYLE 1:
PIN 1.
2.
3.
4.
MILLIMETERS
MIN
MAX
6.30
6.70
3.30
3.70
1.50
1.75
0.60
0.89
2.90
3.20
2.20
2.40
0.020
0.100
0.24
0.35
1.50
2.00
0.85
1.05
0_
10 _
6.70
7.30
BASE
COLLECTOR
EMITTER
COLLECTOR
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PZTA42T1/D
Motorola Small–Signal Transistors, FETs and Diodes Device
Data