ONSEMI UMC5

UMC2NT1, UMC3NT1,
UMC5NT1
Preferred Devices
Dual Common
Base−Collector Bias
Resistor Transistors
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NPN and PNP Silicon Surface Mount
Transistors with Monolithic Bias
Resistor Network
3
The Bias Resistor Transistor (BRT) contains a single transistor with
a monolithic bias network consisting of two resistors; a series base
resistor and a base−emitter resistor. These digital transistors are
designed to replace a single device and its external resistor bias
network. The BRT eliminates these individual components by
integrating them into a single device. In the UMC2NT1 series, two
complementary BRT devices are housed in the SOT−353 package
which is ideal for low power surface mount applications where board
space is at a premium.
2
R1
1
R2
Q2
R2
Q1
R1
4
5
Features
•
•
•
•
•
MARKING
DIAGRAM
Pb−Free Packages are Available
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
Available in 8 mm, 7 inch/3000 Unit Tape and Reel
5
SC−88A/SOT−353
CASE 419A
STYLE 6
Ux d
1
MAXIMUM RATINGS (TA = 25°C unless otherwise noted, common for Q1
4
2
3
and Q2, − minus sign for Q1 (PNP) omitted)
Symbol
Value
Unit
Collector-Base Voltage
VCBO
50
Vdc
Collector-Emitter Voltage
VCEO
50
Vdc
IC
100
mAdc
Rating
Collector Current
Ux = Device Marking
x = 2, 3 or 5
d = Date Code
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits
are exceeded, device functional operation is not implied, damage may occur
and reliability may be affected.
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
THERMAL CHARACTERISTICS
Preferred devices are recommended choices for future use
and best overall value.
Thermal Resistance − Junction-to-Ambient
(surface mounted)
RθJA
833
°C/W
Operating and Storage Temperature Range
TJ, Tstg
−65 to
+150
°C
PD
*150
mW
Total Package Dissipation
@ TA = 25°C (Note 1)
ORDERING INFORMATION
1. Device mounted on a FR-4 glass epoxy printed circuit board using the
minimum recommended footprint.
 Semiconductor Components Industries, LLC, 2004
September, 2004 − Rev. 5
1
Publication Order Number:
UMC2NT1/D
UMC2NT1, UMC3NT1, UMC5NT1
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
Collector-Base Cutoff Current (VCB = 50 V, IE = 0)
ICBO
−
−
100
nAdc
Collector-Emitter Cutoff Current (VCB = 50 V, IB = 0)
ICEO
−
−
500
nAdc
Emitter-Base Cutoff Current
(VEB = 6.0, IC = 0 mA)
IEBO
−
−
−
−
−
−
0.2
0.5
1.0
mAdc
Collector-Base Breakdown Voltage (IC = 10 µA, IE = 0)
V(BR)CBO
50
−
−
Vdc
Collector-Emitter Breakdown Voltage (IC = 2.0 mA, IB = 0)
V(BR)CEO
50
−
−
Vdc
hFE
60
35
20
100
60
35
−
−
−
VCE(SAT)
−
−
0.25
Vdc
Output Voltage (on) (VCC = 5.0 V, VB = 2.5 V, RL = 1.0 k)
VOL
−
−
0.2
Vdc
Output Voltage (off) (VCC = 5.0 V, VB = 0.5 V, RL = 1.0 k)
VOH
4.9
−
−
Vdc
k
Q1 TRANSISTOR: PNP
OFF CHARACTERISTICS
UMC2NT1
UMC3NT1
UMC5NT1
ON CHARACTERISTICS
DC Current Gain
(VCE = 10 V, IC = 5.0 mA)
UMC2NT1
UMC3NT1
UMC5NT1
Collector−Emitter Saturation Voltage (IC = 10 mA, IB = 0.3 mA)
Input Resistor
UMC2NT1
UMC3NT1
UMC5NT1
R1
15.4
7.0
3.3
22
10
4.7
28.6
13
6.1
Resistor Ratio
UMC2NT1
UMC3NT1
UMC5NT1
R1/R2
0.8
0.8
0.38
1.0
1.0
0.47
1.2
1.2
0.56
Collector-Base Cutoff Current (VCB = 50 V, IE = 0)
ICBO
−
−
100
nAdc
Collector-Emitter Cutoff Current (VCB = 50 V, IB = 0)
ICEO
−
−
500
nAdc
Emitter-Base Cutoff Current
(VEB = 6.0, IC = 0 mA)
IEBO
−
−
−
−
−
−
0.2
0.5
0.1
mAdc
Collector-Base Breakdown Voltage (IC = 10 µA, IE = 0)
V(BR)CBO
50
−
−
Vdc
Collector-Emitter Breakdown Voltage (IC = 2.0 mA, IB = 0)
V(BR)CEO
50
−
−
Vdc
hFE
60
35
80
100
60
140
−
−
−
Q2 TRANSISTOR: NPN
OFF CHARACTERISTICS
UMC2NT1
UMC3NT1
UMC5NT1
ON CHARACTERISTICS
DC Current Gain
(VCE = 10 V, IC = 5.0 mA)
UMC2NT1
UMC3NT1
UMC5NT1
Collector−Emitter Saturation Voltage (IC = 10 mA, IB = 0.3 mA)
VCE(SAT)
−
−
0.25
Vdc
Output Voltage (on) (VCC = 5.0 V, VB = 2.5 V, RL = 1.0 k)
VOL
−
−
0.2
Vdc
Output Voltage (off) (VCC = 5.0 V, VB = 0.5 V, RL = 1.0 k)
VOH
4.9
−
−
Vdc
k
Input Resistor
UMC2NT1
UMC3NT1
UMC5NT1
R1
15.4
7.0
33
22
10
47
28.6
13
61
Resistor Ratio
UMC2NT1
UMC3NT1
UMC5NT1
R1/R2
0.8
0.8
0.8
1.0
1.0
1.0
1.2
1.2
1.2
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2
UMC2NT1, UMC3NT1, UMC5NT1
ORDERING INFORMATION
Package
Shipping†
UMC2NT1
SC−88A/SOT−353
3000 / Tape & Reel
UMC2NT1G
SC−88A/SOT−353
(Pb−Free)
3000 / Tape & Reel
UMC3NT1
SC−88A/SOT−353
3000 / Tape & Reel
UMC3NT1G
SC−88A/SOT−353
(Pb−Free)
3000 / Tape & Reel
UMC3NT2
SC−88A/SOT−353
3000 / Tape & Reel
UMC5NT1
SC−88A/SOT−353
3000 / Tape & Reel
UMC5NT2
SC−88A/SOT−353
3000 / Tape & Reel
UMC5NT2G
SC−88A/SOT−353
(Pb−Free)
3000 / Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
DEVICE MARKING AND RESISTOR VALUES
Transistor 1 − PNP
Device
Transistor 2 − NPN
Marking
R1 (K)
R2 (K)
R1 (K)
R2 (K)
U2
U3
U3
U5
U5
22
10
10
4.7
4.7
22
10
10
10
10
22
10
10
47
47
22
10
10
47
47
UMC2NT1
UMC3NT1
UMC3NT2
UMC5NT1
UMC5NT2
PD , POWER DISSIPATION (MILLIWATTS)
250
200
150
100
50
0
−50
RθJA = 833°C/W
0
50
100
TA, AMBIENT TEMPERATURE (°C)
Figure 1. Derating Curve
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3
150
UMC2NT1, UMC3NT1, UMC5NT1
1000
10
VCE = 10 V
IC/IB = 10
1
hFE, DC CURRENT GAIN
VCE(sat) , MAXIMUM COLLECTOR VOLTAGE (VOLTS)
TYPICAL ELECTRICAL CHARACTERISTICS — UMC2NT1 PNP TRANSISTOR
25°C
TA=−25°C
75°C
0.1
0.01
0
40
20
IC, COLLECTOR CURRENT (mA)
TA=75°C
100
10
50
10
1
Figure 3. DC Current Gain
100
IC, COLLECTOR CURRENT (mA)
3
2
1
10
20
30
40
VR, REVERSE BIAS VOLTAGE (VOLTS)
TA=−25°C
10
1
0.1
0.01
0.001
50
Figure 4. Output Capacitance
100
25°C
75°C
f = 1 MHz
lE = 0 mA
TA = 25°C
V in , INPUT VOLTAGE (VOLTS)
Cob , CAPACITANCE (pF)
4
0
VO = 5 V
0
1
2
3
4
5
6
7
Vin, INPUT VOLTAGE (VOLTS)
VO = 0.2 V
10
25°C
75°C
1
0
10
8
9
Figure 5. Output Current versus Input Voltage
TA=−25°C
0.1
100
IC, COLLECTOR CURRENT (mA)
Figure 2. VCE(sat) versus IC
0
25°C
−25°C
20
30
IC, COLLECTOR CURRENT (mA)
40
Figure 6. Input Voltage versus Output Current
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4
50
10
UMC2NT1, UMC3NT1, UMC5NT1
1
1000
IC/IB = 10
VCE = 10 V
TA=−25°C
25°C
hFE, DC CURRENT GAIN
VCE(sat) , MAXIMUM COLLECTOR VOLTAGE (VOLTS)
TYPICAL ELECTRICAL CHARACTERISTICS — UMC2NT1 NPN TRANSISTOR
0.1
75°C
0.01
0.001
0
20
40
IC, COLLECTOR CURRENT (mA)
TA=75°C
25°C
−25°C
100
10
50
1
10
IC, COLLECTOR CURRENT (mA)
Figure 7. VCE(sat) versus IC
Figure 8. DC Current Gain
100
IC, COLLECTOR CURRENT (mA)
2
1
0
0
10
20
30
40
VR, REVERSE BIAS VOLTAGE (VOLTS)
25°C
75°C
f = 1 MHz
IE = 0 mA
TA = 25°C
1
0.1
0.01
0.001
50
TA=−25°C
10
VO = 5 V
0
1
2
3
4
5
6
7
Vin, INPUT VOLTAGE (VOLTS)
10
VO = 0.2 V
TA=−25°C
25°C
75°C
1
0.1
0
10
8
9
10
Figure 10. Output Current versus Input Voltage
Figure 9. Output Capacitance
V in , INPUT VOLTAGE (VOLTS)
Cob , CAPACITANCE (pF)
4
3
100
20
30
IC, COLLECTOR CURRENT (mA)
40
Figure 11. Input Voltage versus Output
Current
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5
50
UMC2NT1, UMC3NT1, UMC5NT1
1000
1
TA=−25°C
0.1
25°C
75°C
0.01
0
20
25°C
100
10
−25°C
10
IC, COLLECTOR CURRENT (mA)
Figure 12. VCE(sat) versus IC
Figure 13. DC Current Gain
50
1
100
IC, COLLECTOR CURRENT (mA)
f = 1 MHz
lE = 0 mA
TA = 25°C
3
2
1
0
10
20
30
40
VR, REVERSE BIAS VOLTAGE (VOLTS)
TA=−25°C
10
1
0.1
0.01
0.001
50
100
VO = 5 V
0
1
2
3
4
5
6
7
Vin, INPUT VOLTAGE (VOLTS)
VO = 0.2 V
TA=−25°C
25°C
75°C
1
0
10
8
9
Figure 15. Output Current versus Input
Voltage
10
0.1
100
25°C
75°C
Figure 14. Output Capacitance
V in , INPUT VOLTAGE (VOLTS)
0
TA=75°C
IC, COLLECTOR CURRENT (mA)
40
4
Cob , CAPACITANCE (pF)
VCE = 10 V
IC/IB = 10
hFE , DC CURRENT GAIN
VCE(sat) , MAXIMUM COLLECTOR VOLTAGE (VOLTS)
TYPICAL ELECTRICAL CHARACTERISTICS — UMC3NT1 PNP TRANSISTOR
20
30
IC, COLLECTOR CURRENT (mA)
40
Figure 16. Input Voltage versus Output
Current
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6
50
10
UMC2NT1, UMC3NT1, UMC5NT1
1000
1
25°C
TA=−25°C
0.1
75°C
0.01
0.001
0
20
TA=75°C
25°C
−25°C
100
10
50
40
1
100
10
IC, COLLECTOR CURRENT (mA)
IC, COLLECTOR CURRENT (mA)
Figure 17. VCE(sat) versus IC
Figure 18. DC Current Gain
4
100
3
IC, COLLECTOR CURRENT (mA)
f = 1 MHz
IE = 0 mA
TA = 25°C
2
1
75°C
25°C
TA=−25°C
10
1
0.1
0.01
VO = 5 V
0
0
0.001
50
10
20
30
40
VR, REVERSE BIAS VOLTAGE (VOLTS)
Figure 19. Output Capacitance
2
0
4
6
Vin, INPUT VOLTAGE (VOLTS)
VO = 0.2 V
TA=−25°C
10
25°C
75°C
1
0.1
0
10
8
10
Figure 20. Output Current versus Input Voltage
100
V in , INPUT VOLTAGE (VOLTS)
Cob , CAPACITANCE (pF)
VCE = 10 V
IC/IB = 10
hFE, DC CURRENT GAIN
VCE(sat) , MAXIMUM COLLECTOR VOLTAGE (VOLTS)
TYPICAL ELECTRICAL CHARACTERISTICS — UMC3NT1 NPN TRANSISTOR
20
30
40
IC, COLLECTOR CURRENT (mA)
Figure 21. Input Voltage versus Output
Current
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50
UMC2NT1, UMC3NT1, UMC5NT1
1000
1
VCE = 10 V
IC/IB = 10
TA=75°C
0.1
0.01
hFE, DC CURRENT GAIN
VCE(sat) , MAXIMUM COLLECTOR VOLTAGE (VOLTS)
TYPICAL ELECTRICAL CHARACTERISTICS — UMC5NT1 PNP TRANSISTOR
25°C
−25°C
0
10
20
30
50
40
100
1
60
1
10
100
IC, COLLECTOR CURRENT (mA)
IC, COLLECTOR CURRENT (mA)
Figure 22. VCE(sat) versus IC
Figure 23. DC Current Gain
1000
100
IC, COLLECTOR CURRENT (mA)
f = 1 MHz
IE = 0 mA
TA = 25°C
10
Cob , CAPACITANCE (pF)
25°C
−25°C
10
12
8
6
4
SERIES 1
2
0
TA=75°C
0
5
10
20
30
15
25
35
VR, REVERSE BIAS VOLTAGE (VOLTS)
40
1
Figure 24. Output Capacitance
VO = 5 V
0.1
0.01
45
75°C
10
TA=−25°C
25°C
0
2
4
6
8
Vin, INPUT VOLTAGE (VOLTS)
10
12
Figure 25. Output Current versus Input Voltage
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UMC2NT1, UMC3NT1, UMC5NT1
10
1000
VCE = 10 V
IC/IB = 10
hFE, DC CURRENT GAIN
VCE(sat) , MAXIMUM COLLECTOR VOLTAGE (VOLTS)
TYPICAL ELECTRICAL CHARACTERISTICS — UMC5NT1 NPN TRANSISTOR
1
25°C
TA=−25°C
75°C
0.1
0.01
0
TA=75°C
25°C
−25°C
100
10
50
20
40
IC, COLLECTOR CURRENT (mA)
10
IC, COLLECTOR CURRENT (mA)
1
Figure 26. VCE(sat) versus IC
1
100
IC, COLLECTOR CURRENT (mA)
0.4
0.2
0
0
25°C
75°C
0.6
TA=−25°C
10
1
0.1
0.01
0.001
50
10
20
30
40
VR, REVERSE BIAS VOLTAGE (VOLTS)
VO = 5 V
0
2
4
6
Vin, INPUT VOLTAGE (VOLTS)
100
VO = 0.2 V
TA=−25°C
10
25°C
75°C
1
0.1
0
10
8
10
Figure 29. Output Current versus Input Voltage
Figure 28. Output Capacitance
V in , INPUT VOLTAGE (VOLTS)
Cob , CAPACITANCE (pF)
Figure 27. DC Current Gain
f = 1 MHz
IE = 0 mA
TA = 25°C
0.8
100
20
30
40
50
IC, COLLECTOR CURRENT (mA)
Figure 30. Input Voltage versus Output Current
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UMC2NT1, UMC3NT1, UMC5NT1
PACKAGE DIMENSIONS
SC−88A/SOT−353
CASE 419A−02
ISSUE G
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. 419A−01 OBSOLETE. NEW STANDARD
419A−02.
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
A
G
5
4
−B−
S
1
2
DIM
A
B
C
D
G
H
J
K
N
S
3
D 5 PL
0.2 (0.008)
B
M
M
N
INCHES
MIN
MAX
0.071
0.087
0.045
0.053
0.031
0.043
0.004
0.012
0.026 BSC
−−−
0.004
0.004
0.010
0.004
0.012
0.008 REF
0.079
0.087
STYLE 6:
PIN 1.
2.
3.
4.
5.
J
C
MILLIMETERS
MIN
MAX
1.80
2.20
1.15
1.35
0.80
1.10
0.10
0.30
0.65 BSC
−−−
0.10
0.10
0.25
0.10
0.30
0.20 REF
2.00
2.20
EMITTER 2
BASE 2
EMITTER 1
COLLECTOR 1
BASE 1/COLLECTOR 2
K
H
SOLDERING FOOTPRINT*
0.50
0.0197
0.65
0.025
0.65
0.025
0.40
0.0157
1.9
0.0748
SCALE 20:1
mm inches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
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operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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For additional information, please contact your
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UMC2NT1/D