NLAST4501 Single SPST Analog Switch The NLAST4501 is an analog switch manufactured in sub−micron silicon−gate CMOS technology. It achieves very low RON while maintaining extremely low power dissipation. The device is a bilateral switch suitable for switching either analog or digital signals, which may vary from zero to full supply voltage. The NLAST4501 is a low voltage, TTL (low threshold) compatible device, pin for pin compatible with the MAX4501. The Enable pin is compatible with standard TTL level outputs when supply voltage is nominal 5.0 V. It is also over−voltage tolerant, making it a very useful logic level translator. http://onsemi.com Features 1 • • • • • Guaranteed RON of 32 at 5.5 V Low Power Dissipation: ICC = 2 A Low Threshold Enable pin TTL compatible at 5.0 V TTL version and pin for pin with NLAS4501 Provides Voltage translation for many different voltage levels 3.3 to 5.0 V, Enable pin may go as high as 5.5 V 1.8 to 3.3 V 1.8 to 2.5 V Improved version of MAX4501 (at any voltage between 2 and 5.5 V) • • Chip Complexity: FETs = 11 • Pb−Free Packages are Available COM NO GND 1 A3 M G G SC70−5/SC−88A/SOT−353 DF SUFFIX CASE 419A 1 A3AYW G G 1 TSOP−5 DT SUFFIX CASE 483 1 A3 = Specific Device Code M = Date Code* A = Assembly Location Y = Year W = Work Week G = Pb−Free Package (Note: Microdot may be in either location) *Date Code orientation and/or position and underbar may vary depending upon manufacturing location. 5 VCC PIN ASSIGNMENT 2 3 MARKING DIAGRAMS 4 ENABLE Pin Function 1 COM 2 NO 3 GND 4 ENABLE 5 VCC Figure 1. Pinout (Top View) FUNCTION TABLE On/Off Enable Input State of Analog Switch L H Off On ORDERING INFORMATION See detailed ordering and shipping information on page 8 of this data sheet. © Semiconductor Components Industries, LLC, 2006 May, 2006 − Rev. 4 1 Publication Order Number: NLAST4501/D NLAST4501 MAXIMUM RATINGS Rating Symbol Value Unit Positive DC Supply Voltage VCC 0.5 to 7.0 V Digital Input Voltage (Enable) VIN 0.5 to 7.0 V Analog Output Voltage (VNO or VCOM) VIS 0.5 to VCC 0.5 V IIK 20 mA TSTG 65 to 150 _C Lead Temperature, 1 mm from Case for 10 Seconds TL 260 _C Junction Temperature under Bias TJ 150 _C SC70−5/SC−88A (Note 1) TSOP−5 JA 350 230 _C/W SC70−5/SC−88A TSOP−5 PD 150 200 mW MSL Level 1 FR UL 94 V−0 @ 0.125 in VESD > 2000 > 100 N/A V ILatchup 300 mA DC Current, Into or Out of Any Pin Storage Temperature Range Thermal Resistance Power Dissipation in Still Air at 85_C Moisture Sensitivity Flammability Rating Oxygen Index: 30% − 35% ESD Withstand Voltage Human Body Model (Note 2) Machine Model (Note 3) Charged Device Model (Note 4) Latchup Performance Above VCC and Below GND at 85_C (Note 5) Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2−ounce copper trace with no air flow. 2. Tested to EIA/JESD22−A114−A. 3. Tested to EIA/JESD22−A115−A. 4. Tested to JESD22−C101−A. 5. Tested to EIA/JESD78. RECOMMENDED OPERATING CONDITIONS Parameter Symbol Min Max Unit Positive DC Supply Voltage VCC 2.0 5.5 V Digital Input Voltage (Enable) VIN GND 5.5 V Static or Dynamic Voltage Across an Off Switch VIO GND VCC V Analog Input Voltage (NO, COM) VIS GND VCC V Operating Temperature Range, All Package Types TA 55 125 _C tr, tf 0 0 100 20 ns/V Vcc = 3.3 V 0.3 V Vcc = 5.0 V 0.5 V 117.8 90 419,300 47.9 100 178,700 20.4 110 79,600 9.4 120 37,000 4.2 130 17,800 2.0 140 8,900 1.0 TJ = 80_C 1,032,200 TJ = 90_C 80 TJ = 100_C Time, Years TJ = 110_C Time, Hours FAILURE RATE OF PLASTIC = CERAMIC UNTIL INTERMETALLICS OCCUR TJ = 120_C Junction Temperature °C NORMALIZED FAILURE RATE DEVICE JUNCTION TEMPERATURE VERSUS TIME TO 0.1% BOND FAILURES TJ = 130_C Input Rise or Fall Time, (Enable Input) 1 1 10 100 1000 TIME, YEARS Figure 2. Failure Rate vs. Time Junction Temperature http://onsemi.com 2 NLAST4501 DC CHARACTERISTICS − Digital Section (Voltages Referenced to GND) Guaranteed Max Limit Symbol VCC *55_C to 25_C t85_C t125_C Unit Minimum High−Level Input Voltage, Enable Inputs VIH 3.0 4.5 5.5 1.4 2.0 2.0 1.4 2.0 2.0 1.4 2.0 2.0 V Maximum Low−Level Input Voltage, Enable Inputs VIL 3.0 4.5 5.5 0.53 0.8 0.8 0.53 0.8 0.8 0.53 0.8 0.8 V Parameter Condition Maximum Input Leakage Current, Enable Inputs VIN = 5.5 V or GND IIN 0 V to 5.5 V 0.1 1.0 1.0 A Maximum Quiescent Supply Current (per package) Enable and VIS = VCC or GND ICC 5.5 1.0 1.0 2.0 A DC ELECTRICAL CHARACTERISTICS − Analog Section Guaranteed Max Limit Parameter Condition Symbol VCC *55_C to 25_C t85_C t125_C Unit RON 3.0 4.5 5.5 45 30 25 50 35 30 55 40 35 Maximum ON Resistance (Figures 8 − 12) VIN = VIH VIS = VCC to GND IIsI = 10.0mA ON Resistance Flatness VIN = VIH IIsI = 10.0 mA VIS = 1 V, 2 V, 3.5 V RFLAT(ON) 4.5 4 4 5 Off Leakage Current, Pin 2 (Figure 3) VIN = VIL VNO = 1.0 V, VCOM = 4.5 V or VCOM = 1.0 V and VNO 4.5 V INO(OFF) 5.5 1 10 100 nA Off Leakage Current, Pin 1 (Figure 3) VIN = VIL VNO = 4.5 V or 1.0 V VCOM = 1.0 V or 4.5 V ICOM(OFF) 5.5 1 10 100 nA AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 ns) Guaranteed Max Limit VCC Parameter Test Conditions Symbol (V) Turn−On Time RL = 300 CL = 35 pF (Figures 4, 5, and 13) tON Turn−Off Time RL = 300 CL = 35 pF (Figures 4, 5, and 13) tOFF *55_C to 25_C Min Typ Max 2.0 3.0 4.5 5.5 7.0 5.0 4.5 4.5 14 10 9 9 2.0 3.0 4.5 5.5 11.0 7.0 5.0 5.0 22 14 10 10 t85_C Min Typ t125_C Max Min Typ Max Unit 16 12 11 11 16 12 11 11 ns 24 16 12 12 24 16 12 12 ns Typical @ 25, VCC = 5.0 V Maximum Input Capacitance, Select Input Analog I/O (switch off) Common I/O (switch off) Feedthrough (switch on) CIN CNO or CNC CCOM(OFF) CCOM(ON) 8 10 10 20 http://onsemi.com 3 pF NLAST4501 ADDITIONAL APPLICATION CHARACTERISTICS (Voltages Referenced to GND Unless Noted) Parameter Condition VCC Limit Symbol V 25°C Unit Maximum On−Channel −3dB Bandwidth or Minimum Frequency Response VIS = 0 dBm VIS centered between VCC and GND (Figures 6 and 14) BW 3.0 4.5 5.5 190 200 220 MHz Maximum Feedthrough On Loss VIS = 0 dBm @ 10 kHz VIS centered between VCC and GND (Figure 6) VONL 3.0 4.5 5.5 2 2 2 dB Off−Channel Isolation f = 100 kHz; VIS = 1 V RMS VIS centered between VCC and GND (Figures 6 and 15) VISO 3.0 4.5 5.5 93 dB Charge Injection Enable Input to Common I/O VIS = VCC to GND, FIS = 20 kHz tr = tf = 3 ns RIS = 0 , CL = 1000 pF Q = CL * VOUT (Figures 7 and 16) Q 3.0 5.5 1.5 3.0 pC Total Harmonic Distortion THD Noise FIS = 20 Hz to 1 MHz, RL = Rgen = 600 , CL = 50 pF VIS = 3.0 VPP sine wave VIS = 5.0 VPP sine wave (Figure 17) THD 3.3 5.5 0.3 0.15 % 1.00E+05 1.00E+04 1.00E+03 LEAKAGE (pA) 1.00E+02 1.00E+01 ICOM(ON) 1.00E+00 1.00E−01 1.00E−02 1.00E−03 ICOM(OFF) 1.00E−04 1.00E−05 INO(OFF) 1.00E−06 1.00E−07 −55 −35 −15 5 25 45 65 85 105 125 145 TEMPERATURE (_C) Figure 3. Switch Leakage vs. Temperature http://onsemi.com 4 NLAST4501 VCC DUT VCC Input NO 50% 50% 0V COM VOUT 0.1 F 300 VOH 35 pF 90% 90% Output VOL Input tON tOFF Figure 4. tON/tOFF VCC VCC Input DUT 300 NO 50% 50% 0V COM VOUT VOH 35 pF Output Input tOFF Figure 5. tON/tOFF http://onsemi.com 5 10% 10% VOL tON NLAST4501 DUT Reference Transmitted COM NO 50 Generator 50 Channel switch control/s test socket is normalized. Off isolation is measured across an off channel. On loss is the bandwidth of an On switch. VISO, Bandwidth and VONL are independent of the input signal direction. VVOUT for VIN at 100 kHz IN VOUT for VIN at 100 kHz to 50 MHz VONL = On Channel Loss = 20 Log VIN VISO = Off Channel Isolation = 20 Log Bandwidth (BW) = the frequency 3 dB below VONL Figure 6. Off Channel Isolation/On Channel Loss (BW)/Crosstalk (On Channel to Off Channel)/VONL DUT NO VCC VIN COM GND CL Output Off VIN Figure 7. Charge Injection: (Q) http://onsemi.com 6 On Off VOUT NLAST4501 80 80 70 70 60 VCC = 2.0 50 50 RON () RON () 60 40 VCC = 2.5 30 −55°C 30 25°C VCC = 3.0 20 40 20 85°C VCC = 4.5 10 10 0 0 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 125°C 0 5 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 VCOM (VOLTS) VIS (VOLTS) Figure 8. RON vs. VCOM and VCC (@255C) Figure 9. RON vs. VCOM and Temperature, VCC = 2.0 V 45 2 30 40 20 25 RON () RON () 30 −55°C 20 25°C 15 10 15 125°C 25°C 85°C 10 85°C 5 125°C 5 0 −55°C 25 35 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 0 2.2 2.4 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 VCOM (VOLTS) VCOM (VOLTS) Figure 10. RON vs. VCOM and Temperature, VCC = 2.5 V Figure 11. RON vs. VCOM and Temperature, VCC = 3.0 V 3 35.0 18 30.0 16 −55°C 25°C 25.0 12 TIME (nS) RON () 14 85°C 10 8 15.0 4 5.0 2 0.0 2.0 0 tON 10.0 125°C 6 20.0 tOFF 0 0.4 0.8 1.2 1.6 2 2.4 2.8 3.2 3.6 4 4.4 3.0 4.5 5.0 5.5 VCC (V) VCOM (VOLTS) Figure 12. RON vs. VCOM and Temperature, VCC = 4.5 V Figure 13. Switching Time vs. Supply Voltage, T = 255C http://onsemi.com 7 NLAST4501 0 0 0 BANDWIDTH (dB/Div) Phase (Degrees) 5 VCC = 5.0 V TA = 25°C 10 100 1 10 OFF ISOLATION (dB/Div) 10 PHASE (Degrees) Bandwidth (On − Loss) −50 VCC = 5.0 V TA = 25°C −100 10 100 300 100 1 100 300 10 FREQUENCY (MHz) FREQUENCY (MHz) Figure 14. ON Channel Bandwidth and Phase Shift Over Frequency Figure 15. Off Channel Isolation 100 1.60 1.40 10 VCC = 5.0 V 1.20 0.80 THD (%) Q (pC) 1.00 VCC = 3.0 V 1 3.3 V 0.60 0.1 0.40 5.5 V 0.20 0.00 0.0 0.01 1.0 2.0 3.6 3.0 VCOM (V) 4.0 4.5 10 5.0 100 1000 10000 100000 1000000 FREQUENCY (Hz) Figure 16. Charge Injection vs. VCOM Figure 17. THD vs. Frequency ORDERING INFORMATION Device Nomenclature Device Circuit Indicator Technology Device Function Package Suffix Tape & Reel Suffix NLAST4501DFT2 Shipping† SC−88A/SOT−353/ SC70 DF NLAST4501DFT2G Package NL AST T2 4501 NLAST4501DTT1 SC−88A/SOT−353/ SC70 (Pb−Free) 3000/Tape & Reel TSOP−5 DT NLAST4501DTT1G T1 TSOP−5 (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. http://onsemi.com 8 NLAST4501 PACKAGE DIMENSIONS SC−88A / SOT−353 / SC−70 CASE 419A−02 ISSUE J NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. 419A−01 OBSOLETE. NEW STANDARD 419A−02. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. A G 5 4 −B− S 1 2 DIM A B C D G H J K N S 3 D 5 PL 0.2 (0.008) B M M N INCHES MIN MAX 0.071 0.087 0.045 0.053 0.031 0.043 0.004 0.012 0.026 BSC −−− 0.004 0.004 0.010 0.004 0.012 0.008 REF 0.079 0.087 J C K H SOLDERING FOOTPRINT* 0.50 0.0197 0.65 0.025 0.65 0.025 0.40 0.0157 1.9 0.0748 SCALE 20:1 mm inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 9 MILLIMETERS MIN MAX 1.80 2.20 1.15 1.35 0.80 1.10 0.10 0.30 0.65 BSC −−− 0.10 0.10 0.25 0.10 0.30 0.20 REF 2.00 2.20 NLAST4501 PACKAGE DIMENSIONS TSOP−5 CASE 483−02 ISSUE E NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. A AND B DIMENSIONS DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. D S 5 4 1 2 3 B L G A DIM A B C D G H J K L M S J C 0.05 (0.002) H M K MILLIMETERS MIN MAX 2.90 3.10 1.30 1.70 0.90 1.10 0.25 0.50 0.85 1.05 0.013 0.100 0.10 0.26 0.20 0.60 1.25 1.55 0_ 10 _ 2.50 3.00 INCHES MIN MAX 0.1142 0.1220 0.0512 0.0669 0.0354 0.0433 0.0098 0.0197 0.0335 0.0413 0.0005 0.0040 0.0040 0.0102 0.0079 0.0236 0.0493 0.0610 0_ 10 _ 0.0985 0.1181 SOLDERING FOOTPRINT* 0.95 0.037 1.9 0.074 2.4 0.094 1.0 0.039 0.7 0.028 SCALE 10:1 mm inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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