NCV8505 Series Micropower 400 mA LDO Linear Regulators with ENABLE, DELAY, and RESET The NCV8505 is a family of precision micropower voltage regulators. Their output current capability is 400 mA. The family has output voltage options for Adjustable, 2.5 V, 3.3 V and 5.0 V. The output voltage is accurate within ± 2.0% with a maximum dropout voltage of 0.6 V at 400 mA. Low quiescent current is a feature drawing less than 1.0 µA with ENABLE = 0 V. With ENABLE = 5.0 V, the part only draws 200 µA with 100 µA load. This part is ideal for any and all battery operated microprocessor equipment. Microprocessor control logic includes an active RESET (with DELAY). The active RESET circuit operates correctly at an output voltage as low as 1.0 V. The RESET function is activated during the power up sequence or during normal operation if the output voltage drops below the regulation limits. The regulator is protected against reverse battery, short circuit, and thermal overload conditions. The device can withstand load dump transients making it suitable for use in automotive environments. The device has also been optimized for EMC conditions. Features • • • • • • • • • • Output Voltage Options: Adjustable, 2.5 V, 3.3 V, 5.0 V ± 2.0% Output Low < 1.0 µA Sleep Current Low 200 µA Quiescent Current Fixed or Adjustable Output Voltage Active RESET ENABLE 400 mA Output Current Capability Fault Protection ♦ +60 V Peak Transient Voltage ♦ −15 V Reverse Voltage ♦ Short Circuit ♦ Thermal Overload NCV Prefix for Automotive and Other Applications Requiring Site and Change Control Semiconductor Components Industries, LLC, 2004 January, 2004 − Rev. 3 1 http://onsemi.com MARKING DIAGRAM NCV8505x AWLYYWW D2PAK−7 DPS SUFFIX CASE 936AB 1 x = Voltage Ratings as Indicated Below: A = Adjustable 2 = 2.5 V 3 = 3.3 V 5 = 5.0 V A = Assembly Location WL = Wafer Lot YY = Year WW = Work Week ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 11 of this data sheet. Publication Order Number: NCV8505/D NCV8505 Series PIN CONNECTIONS ADJUSTABLE OUTPUT Tab = GND Lead 1. DELAY 2. ENABLE 3. RESET 4. GND 5. VADJ 6. VOUT 7. VIN 1 Tab = GND Lead 1. DELAY 2. ENABLE 3. RESET 4. GND 5. SENSE 6. VOUT 7. VIN 1 SENSE (Fixed Output Only) IQ VIN VOUT VDD 33 µF 10 µF NCV8505 DELAY CDELAY Microprocessor VBAT FIXED OUTPUT RRST 5.1 k VADJ (Adjustable Output Only) ENABLE RESET I/O GND Figure 1. Application Diagram http://onsemi.com 2 NCV8505 Series MAXIMUM RATINGS* Rating Value Unit −15 to 45 V Peak Transient Voltage (46 V Load Dump @ VIN = 14 V) 60 V Operating Voltage 45 V VOUT (DC) 16 V Voltage Range (RESET, DELAY) −0.3 to 10 V Input Voltage Range: −0.3 to 16 V −0.3 to 10** V 4.0 200 kV V −40 to +150 °C VIN (DC) VADJ Input Voltage Range (ENABLE) ESD Susceptibility (Human Body Model) (Machine Model) Junction Temperature, TJ Storage Temperature, TS Package Thermal Resistance, 7 Lead D2PAK Junction−to−Case, RθJC Junction−to−Ambient, RθJA Lead Temperature Soldering: Reflow: (SMD styles only) (Note 1) −55 to 150 °C 2.0 10−50*** °C/W °C/W 240 peak (Note 2) °C 1. 60 second maximum above 183°C. 2. −5°C/+0°C allowable conditions. *The maximum package power dissipation must be observed. **Reference Figure 14 for switched−battery ENABLE application. ***Depending on thermal properties of substrate, RJA = RJC + RCA. †During the voltage range which exceeds the maximum tested voltage of VIN, operation is assured, but not specified. Wider limits may apply. Thermal dissipation must be observed closely. ELECTRICAL CHARACTERISTICS (IOUT = 1.0 mA, ENABLE = 5.0 V, −40°C ≤ TJ ≤ 150°C; VIN = dependent on voltage option (Note 3); unless otherwise specified.) Test Conditions Characteristic Min Typ Max Unit Output Stage Output Voltage for 2.5 V Option (VO) 6.5 V < VIN < 16 V, 1.0 mA ≤ IOUT ≤ 400 mA 4.5 V < VIN < 26 V, 1.0 mA ≤ IOUT ≤ 400 mA 2.450 2.425 2.5 2.5 2.550 2.575 V V Output Voltage for 3.3 V Option (VO) 7.3 V < VIN < 16 V, 1.0 mA ≤ IOUT ≤ 400 mA 4.5 V < VIN < 26 V, 1.0 mA ≤ IOUT ≤ 400 mA 3.234 3.201 3.3 3.3 3.366 3.399 V V Output Voltage for 5.0 V Option (VO) 9.0 V < VIN < 16 V, 1.0 mA ≤ IOUT ≤ 400 mA 6.0 V < VIN < 26 V, 1.0 mA ≤ IOUT ≤ 400 mA 4.90 4.85 5.0 5.0 5.10 5.15 V V Output Voltage for Adjustable Option (VO) VOUT = VADJ (Unity Gain) 6.5 V < VIN < 16 V, 1.0 mA < IOUT < 400 mA 4.5 V < VIN < 26 V, 1.0 mA < IOUT < 400 mA 1.274 1.261 1.300 1.300 1.326 1.339 V V Dropout Voltage (VIN − VOUT) (5.0 V and Adj. > 5.0 V Options Only) IOUT = 400 mA IOUT = 1.0 mA − − 400 30 600 150 mV mV Load Regulation VIN = 14 V, 5.0 mA ≤ IOUT ≤ 400 mA −30 5.0 30 mV Line Regulation (2.5 V, 3.3 V, and Adjustable Options) 4.5 V < VIN < 26 V, IOUT = 1.0 mA − 5.0 25 mV Line Regulation (5.0 V Option) 6.0 V < VIN < 26 V, IOUT = 1.0 mA − 5.0 25 mV Quiescent Current, (IQ) Active Mode IOUT = 100 µA, VIN = 12 V IOUT = 75 mA, VIN = 14 V IOUT ≤ 400 mA, VIN = 14 V − − − 200 2.5 25 350 5.0 45 µA mA mA Quiescent Current, (IQ) Sleep Mode ENABLE = 0 V, VIN = 12 V, −40°C ≤ TJ ≤ 125°C − − 1.0 µA 425 800 − mA Current Limit − Short Circuit Output Current VOUT = 0 V 100 500 − mA Thermal Shutdown (Guaranteed by Design) 150 180 − °C 3. Voltage range specified in the Output Stage of the Electrical Characteristics in boldface type. http://onsemi.com 3 NCV8505 Series ELECTRICAL CHARACTERISTICS (continued) (IOUT = 1.0 mA, ENABLE = 5.0 V, −40°C ≤ TJ ≤ 150°C; VIN = dependent on voltage option (Note 4); unless otherwise specified.) Characteristic Test Conditions Min Typ Max Unit 2.35 2.30 25 − − − 1.0 × VO − − V V mV 3.10 3.00 35 − − − 1.0 × VO − − V V mV 4.70 4.60 50 − − − 1.0 × VO − − V V mV 1.22 1.19 10 − − − 1.0 × VO − − V V mV − 0.1 0.4 V Reset Function (RESET) RESET Threshold for 2.5 V Option HIGH (VRH) LOW (VRL) Hysteresis VIN = 4.5 V (Note 5) (Note 6) VOUT Increasing VOUT Decreasing RESET Threshold for 3.3 V Option HIGH (VRH) LOW (VRL) Hysteresis VIN = 4.5 V (Note 5) (Note 6) VOUT Increasing VOUT Decreasing RESET Threshold for 5.0 V Option HIGH (VRH) LOW (VRL) Hysteresis VIN = 6.0 V (Note 6) VOUT Increasing VOUT Decreasing RESET Threshold for Adjustable Option HIGH (VRH) LOW (VRL) Hysteresis VIN = 4.5 V (Note 5) (Note 6) VOUT Increasing VOUT Decreasing Output Voltage Low (VRLO) VIN = Minimum (Note 6) (Note 7) 1.0 V ≤ VOUT ≤ VRL, RRESET = 5.1 k DELAY Switching Threshold (VDT) (2.5 V, 3.3 V, and 5.0 V Options) VIN = Minimum (Note 6) (Note 7) 1.4 1.8 2.2 V DELAY Switching Threshold (VDT) (Adjustable Option) VIN = Minimum (Note 6) (Note 7) 1.0 1.3 1.6 V DELAY Low Voltage VIN = Minimum (Note 6) (Note 7) VOUT < RESET Threshold Low(min) − − 0.2 V DELAY Charge Current VIN = Minimum (Note 6) (Note 7) DELAY = 1.0 V, VOUT > VRH 2.5 4.0 5.5 µA DELAY Discharge Current VIN = Minimum (Note 6) (Note 7) DELAY = 1.0 V, VOUT < VRL 5.0 − − mA VADJ = 1.25 V, VIN = Minimum (Note 6) (Note 7) −0.5 − 0.5 µA Input Threshold Low, VIN = 14 V (Note 6) High, VIN = 14 V (Note 6) − 2.0 − − 1.0 − V V Input Current ENABLE = 5.0 V, VIN = 14 V (Note 6) − 30 75 µA Voltage Adjust (Adjustable Output only) Input Current ENABLE 4. 5. 6. 7. Voltage range specified in the Output Stage of the Electrical Characteristics in boldface type. For VIN ≤ 4.5 V, a RESET = Low may occur with the output in regulation. Part is guaranteed by design to meet specification over the entire VIN voltage range, but is production tested only at the specified VIN voltage. Minimum VIN = 4.5 V for 2.5 V, 3.3 V, and Adjustable options. Minimum VIN = 6.0 V for 5.0 V option. http://onsemi.com 4 NCV8505 Series PACKAGE PIN DESCRIPTION, ADJUSTABLE OUTPUT Pin Number Pin Symbol Function 1 DELAY 2 ENABLE 3 RESET 4 GND Ground. All GND leads must be connected to Ground. 5 VADJ Voltage Adjust. A resistor divider from VOUT to this lead sets the output voltage. 6 VOUT ±2.0%, 400 mA output. 7 VIN Timing capacitor for RESET function. ENABLE control for the IC. A high powers the device up. Active reset (accurate to VOUT ≥ 1.0 V) Input Voltage. PACKAGE PIN DESCRIPTION, FIXED OUTPUT Pin Number Pin Symbol 1 DELAY 2 ENABLE 3 RESET 4 GND 5 SENSE 6 VOUT 7 VIN Function Timing capacitor for RESET function. ENABLE control for the IC. A high powers the device up. Active reset (accurate to VOUT ≥ 1.0 V) Ground. All GND leads must be connected to Ground. Kelvin connection which allows remote sensing of output voltage for improved regulation. If remote sensing is not desired, connect to VOUT. ±2.0%, 400 mA output. Input Voltage. http://onsemi.com 5 NCV8505 Series VOUT VIN + − ENABLE Current Source (Circuit Bias) SENSE 1.5 V IBIAS Current Limit Sense IBIAS + − Error Amplifier DELAY VBG − RESET + 1.8 V (Fixed Versions) 1.3 V (Adjustable Version) VBG −18 mV + − Thermal Protection 4.0 µA Bandgap Reference IBIAS VADJ VBG Figure 2. Block Diagram http://onsemi.com 6 Fixed Versions only 15 k Adjustable Version only GND NCV8505 Series TYPICAL PERFORMANCE CHARACTERISTICS 5.10 3.35 Vout, OUTPUT VOLTAGE (V) 5.08 5.06 Vout, OUTPUT VOLTAGE (V) VOUT = 5.0 V VIN = 14 V IOUT = 5.0 mA 5.04 5.02 5.00 4.98 4.96 4.94 VOUT = 3.3 V VIN = 14 V IOUT = 5.0 mA 3.33 3.31 3.29 3.27 3.25 4.92 4.90 −40 −20 0 3.23 −40 −20 20 40 60 80 100 120 140 160 TEMPERATURE (°C) Figure 3. 5 V Output Voltage vs Temperature 20 40 60 80 100 120 140 160 TEMPERATURE (°C) Figure 4. 3.3 V Output Voltage vs Temperature 700 2.55 2.53 DROPOUT VOLTAGE (mV) VOUT = 2.5 V VIN = 14 V IOUT = 5.0 mA 2.54 Vout, OUTPUT VOLTAGE (V) 0 2.52 2.51 2.50 2.49 2.48 2.47 2.46 600 500 125 °C 400 25 °C 300 200 −40 °C 100 5 V and Adj. > 5 V options only 2.45 −40 −20 0 0 20 40 60 80 100 120 140 160 TEMPERATURE (°C) Figure 5. 2.5 V Output Voltage vs Temperature 100 50 100 150 200 250 300 Iout, OUTPUT CURRENT (mA) 350 400 Figure 6. Dropout Voltage vs Output Current 100 5.0 V Unstable Region 0 CVOUT = 33 F* Unstable Region 3.3 V 10 10 ESR () ESR () 2.5 V 1.0 Stable Region 1.0 Stable Region Unstable Region 0.1 VIN = 14 V CVOUT = 10 F 0.01 CVOUT = 0.1 F 0 50 100 150 200 250 300 Iout, OUTPUT CURRENT (mA) 350 0.1 400 Figure 7. Output Stability with Output Voltage Change *There is no unstable lower region for the 33 F capacitor 0 50 5 V version 300 100 150 200 250 Iout, OUTPUT CURRENT (mA) 350 400 Figure 8. Output Stability with Output Capacitor Change http://onsemi.com 7 NCV8505 Series TYPICAL PERFORMANCE CHARACTERISTICS 60 +125°C 1.8 IQ, QUIESCENT CURRENT (mA) IQ, QUIESCENT CURRENT (mA) 2.0 +25°C 1.6 −40°C 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 0 5 10 40 15 20 25 30 35 IOUT, OUTPUT CURRENT (mA) 45 Figure 9. Quiescent Current vs Output Current 20 10 0 50 100 150 200 250 300 350 400 450 500 IOUT, OUTPUT CURRENT (mA) 210 Iout = 200 mA T = 25°C IQ, QUIESCENT CURRENT (A) IQ, QUIESCENT CURRENT (mA) −40°C 30 Figure 10. Quiescent Current vs Output Current 12 10 8 6 4 Iout = 100 mA 2 Iout = 50 mA Iout = 10 mA 0 +25°C 40 0 50 +125°C 50 6 8 10 12 14 16 18 20 VIN, INPUT VOLTAGE (V) 22 24 205 200 190 185 180 T = 25°C 175 26 Figure 11. Quiescent Current vs Input Voltage Iout = 100 A 195 6 8 10 12 14 16 18 20 VIN, INPUT VOLTAGE (V) 22 24 Figure 12. Quiescent Current vs Input Voltage http://onsemi.com 8 26 NCV8505 Series CIRCUIT DESCRIPTION DELAY Function REGULATOR CONTROL FUNCTIONS The NCV8505 contains the microprocessor compatible control function RESET (Figure 13). The reset delay circuit provides a programmable (by external capacitor) delay on the RESET output lead. The DELAY lead provides source current (typically 4.0 µA) to the external DELAY capacitor during the following proceedings: 1. During Power Up (once the regulation threshold has been verified). 2. After a reset event has occurred and the device is back in regulation. The DELAY capacitor is discharged when the regulation (RESET threshold) has been violated. This is a latched incident. The capacitor will fully discharge and wait for the device to regulate before going through the delay time event again. VIN RESET Threshold VOUT DELAY DELAY Threshold (VDT) RESET Td Td Figure 13. Reset and Delay Circuit Wave Forms Voltage Adjust RESET Function Figure 15 shows the device setup for a user configurable output voltage. The feedback to the VADJ pin is taken from a voltage divider referenced to the output voltage. The loop is balanced around the Unity Gain threshold (1.30 V typical). A RESET signal (low voltage) is generated as the IC powers up until VOUT is within 1.5% of the regulated output voltage, or when VOUT drops out of regulation,and is lower than 4.0% below the regulated output voltage. Hysteresis is included in the function to minimize oscillations. The RESET output is an open collector NPN transistor, controlled by a low voltage detection circuit. The circuit is functionally independent of the rest of the IC thereby guaranteeing that the RESET signal is valid for VOUT as low as 1.0 V. NCV8505 VADJ The part stays in a low IQ sleep mode when the ENABLE pin is held low. The part has an internal pull down if the pin is left floating. The integrity of the ENABLE pin allows it to be tied to the battery line through an external resistor. It will withstand load dump potentials in this configuration. 10 k 15 k COUT 1.28 V 5.1 k ENABLE Function VBAT Up to 45 V ≈5.0 V VOUT Figure 15. Adjustable Output Voltage VOUT VIN NCV8505 ENABLE GND Figure 14. ENABLE Function http://onsemi.com 9 NCV8505 Series APPLICATION NOTES PD(max) [VIN(max) VOUT(min)] IOUT(max) SETTING THE DELAY TIME The delay time is controlled by the Reset Delay Low Voltage, Delay Switching Threshold, and the Delay Charge Current. The delay follows the equation: tDELAY VIN(max)IQ where: VIN(max) is the maximum input voltage, VOUT(min) is the minimum output voltage, IOUT(max) is the maximum output current for the application, and IQ is the quiescent current the regulator consumes at IOUT(max). Once the value of PD(max) is known, the maximum permissible value of RJA can be calculated: [CDELAY(Vdt Reset Delay Low Voltage)] Delay Charge Current Example: Using CDELAY = 33 nF. Assume reset Delay Low Voltage = 0. Use the typical value for Vdt = 1.8 V (2.5 V, 3.3 V, and 5.0 V options). Use the typical value for Delay Charge Current = 4.2 µA. T RJA 150°C A PD [33 nF(1.8 0)] tDELAY 14 ms 4.2 A NCV8505 RRST IOUT IIN VIN SMART REGULATOR VOUT } Control Features IQ Figure 17. Single Output Regulator with Key Performance Parameters Labeled HEAT SINKS A heat sink effectively increases the surface area of the package to improve the flow of heat away from the IC and into the surrounding air. Each material in the heat flow path between the IC and the outside environment will have a thermal resistance. Like series electrical resistances, these resistances are summed to determine the value of RJA: VOUT CIN* 0.1 µF (2) The value of RJA can then be compared with those in the package section of the data sheet. Those packages with RJA’s less than the calculated value in equation 2 will keep the die temperature below 150°C. In some cases, none of the packages will be sufficient to dissipate the heat generated by the IC, and an external heatsink will be required. STABILITY CONSIDERATIONS The output or compensation capacitor helps determine three main characteristics of a linear regulator: start−up delay, load transient response and loop stability. The capacitor value and type should be based on cost, availability, size and temperature constraints. A tantalum or aluminum electrolytic capacitor is best, since a film or ceramic capacitor with almost zero ESR can cause instability. The aluminum electrolytic capacitor is the least expensive solution, but, if the circuit operates at low temperatures (−25°C to −40°C), both the value and ESR of the capacitor will vary considerably. The capacitor manufacturers data sheet usually provides this information. The value for the output capacitor COUT shown in Figure 16 should work for most applications, however it is not necessarily the optimized solution. VIN (1) COUT** 33 µF RESET RJA RJC RCS RSA *CIN required if regulator is located far from the power supply filter. **COUT required for stability. Capacitor must operate at minimum temperature expected. (3) where: RJC = the junction−to−case thermal resistance, RCS = the case−to−heatsink thermal resistance, and RSA = the heatsink−to−ambient thermal resistance. RJC appears in the package section of the data sheet. Like RJA, it too is a function of package type. RCS and RSA are functions of the package type, heatsink and the interface between them. These values appear in heat sink data sheets of heat sink manufacturers. Figure 16. Test and Application Circuit Showing Output Compensation CALCULATING POWER DISSIPATION IN A SINGLE OUTPUT LINEAR REGULATOR The maximum power dissipation for a single output regulator (Figure 17) is: http://onsemi.com 10 NCV8505 Series ORDERING INFORMATION Device Output Voltage Package NCV8505D2TADJ NCV8505D2TADJR4 50 Units/Rail Adjustable 750 Tape & Reel NCV8505D2T25 NCV8505D2T25R4 50 Units/Rail 25V 2.5 D2PAK−7 PAK 7 NCV8505D2T33 NCV8505D2T33R4 33V 3.3 750 Tape & Reel 50 Units/Rail 750 Tape & Reel NCV8505D2T50 NCV8505D2T50R4 Shipping† 50 Units/Rail 50V 5.0 750 Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 11 NCV8505 Series PACKAGE DIMENSIONS D2PAK−7 DPS SUFFIX CASE 936AB−01 ISSUE O For D2PAK Outline and Dimensions − Contact Factory SMART REGULATOR is a registered trademark of Semiconductor Components Industries, LLC (SCILLIC). ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81−3−5773−3850 http://onsemi.com 12 For additional information, please contact your local Sales Representative. NCV8505/D