ONSEMI NCV4274ST25T3G

NCV4274, NCV4274A
400 mA 2% and 4%Voltage
Regulator Family
Description
The NCV4274 and NCV4274A is a precision micro−power voltage
regulator with an output current capability of 400 mA available in the
DPAK and D2PAK packages.
The output voltage is accurate within ±2.0% or ±4.0% depending on
the version with a maximum dropout voltage of 0.5 V with an input up
to 40 V. Low quiescent current is a feature drawing only 150 mA with a
1 mA load. This part is ideal for automotive and all battery operated
microprocessor equipment.
The regulator is protected against reverse battery, short circuit, and
thermal overload conditions. The device can withstand load dump
transients making it suitable for use in automotive environments.
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MARKING DIAGRAMS
4
74X−xxG
ALYWW
x
DPAK
DT SUFFIX
CASE 369C
1
Features
•
•
•
•
•
•
•
•
•
•
•
•
2.5, 3.3 V, 5.0 V, ±2.0% and ±4.0% Output Options
Low 150 mA Quiescent Current at 1 mA load current
400 mA Output Current Capability
Fault Protection
+60 V Peak Transient Voltage with Respect to GND
−40 V Reverse Voltage
Short Circuit
Thermal Overload
Very Low Dropout Voltage
Electrical Parameters Guaranteed Over Entire Temperature Range
NCV Prefix for Automotive and Other Applications Requiring Site
and Control Changes
These are Pb−Free Devices
2
1
Input
2, 4 Ground
3
Output
3
4
NC
V4274X−xx
AWLYWWG
D2PAK
DS SUFFIX
CASE 936
SOT−223
ST SUFFIX
CASE 318E
X
xx
A
L, WL
Y
WW, W
G
1
2
1
Input
2, 4 Ground
3
Output
3
AYW
74X−xxG
1
= A or blank
= Voltage Ratings
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 13 of this data sheet.
© Semiconductor Components Industries, LLC, 2006
December, 2006 − Rev. 7
1
Publication Order Number:
NCV4274/D
NCV4274, NCV4274A
I
Q
Bandgap
Refernece
Current Limit and
Saturation Sense
−
+
Thermal
Shutdown
GND
Figure 1. Block Diagram
Pin Definitions and Functions
Pin No.
Symbol
1
I
2,4
GND
3
Q
Function
Input; Bypass directly at the IC a ceramic capacitor to GND.
Ground
Output; Bypass with a capacitor to GND.
1. DPAK 3LD package code 6025
2. D2PAK 3LD package code 6083
ABSOLUTE MAXIMUM RATINGS
Pin Symbol, Parameter
I, Input−to−Regulator
Symbol
Condition
Min
Max
Unit
V
Voltage
VI
−42
45
Current
II
Internally
Limited
Internally
Limited
I, Input peak Transient Voltage to Regulator with Respect
to GND
VI
60
V
Q, Regulated Output
Voltage
VQ
−1.0
40
V
Current
IQ
Internally
Limited
Internally
Limited
GND, Ground Current
IGND
−
100
mA
Junction Temperature
Storage Temperature
TJ
TStg
−
−50
150
150
°C
°C
ESD Capability, Human Body Model
ESDHB
4
kV
ESD Capability, Machine Model
ESDMM
200
V
ESD Capability, Charged Device Model
ESDCDM
1
kV
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
3. This device series incorporates ESD protection and is tested by the following methods:
ESD HBM tested per AEC−Q100−002 (EIA/JESD22−A114)
ESD MM tested per AEC−Q100−003 (EIA/JESD22−A115)
ESD CDM tested per EIA/JES D22/C101, Field Induced Charge Model
4. Latchup Current Maximum Rating: ≤ 150 mA per JEDEC standard: JESD78.
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2
NCV4274, NCV4274A
OPERATING RANGE
Min
Max
Unit
Input Voltage (5.0 V Version)
Parameter
Symbol
VI
Condition
5.5
40
V
Input Voltage (3.3 V, and 2.5 V Version)
VI
4.5
40
V
Junction Temperature
TJ
−40
150
°C
THERMAL RESISTANCE
Min
Max
Unit
Junction−to−Ambient
Parameter
DPAK
Rthja
−
70
(Note 6)
°C/W
Junction−to−Ambient
D2PAK
Rthja
−
60
(Note 6)
°C/W
Junction−to−Case
DPAK
Rthjc
−
4
°C/W
Junction−to−Case
D2PAK
Rthjc
−
3
°C/W
SOT−223
Y−JLX,
−
14.5
(Note 7)
°C/W
−
169.7
(Note 7)
°C/W
Min
Max
Unit
Junction−to−Tab
Symbol
Condition
YLX
Junction−to−Ambient
SOT−223
RqJA, qJA
5. Soldered in, 1 cm2 copper area at Pin 4, FR4
6. Soldered in, minimal footprint, FR4
7. 1 oz copper, 5 mm2 copper area, FR4
LEAD SOLDERING TEMPERATURE AND MSL
Parameter
Lead Temperature Soldering, (Note 8)
Reflow (SMD styles only),
Symbol
°C
Pb
60s − 150s Above 183s
30s Max at Peak
60s − 150s Above 217s
40s Max at Peak
Pb−Free
Moisture Sensitivity Level
Condition
Tsld
MSL
8. Per IPC/JEDEC J−STD−020C
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3
−
240 pk
−
265 pk
1
−
NCV4274, NCV4274A
ELECTRICAL CHARACTERISTICS NCV4274A and NCV4274 5.0 V
−40°C < TJ < 150°C; VI = 13.5 V unless otherwise noted.
Min
Parameter
Symbol
Typ
Max
Min
NCV4274A
Test Conditions
Typ
Max
NCV4274
Unit
REGULATOR
Output Voltage (5.0 V Version)
VQ
5 mA < IQ < 400 mA
6V < VI < 28 V
4.9
5.0
5.1
4.8
5.0
5.2
V
Output Voltage (5.0 V Version)
VQ
5 mA < IQ < 200 mA
6 V < VI < 40 V
4.9
5.0
5.1
4.8
5.0
5.2
V
Output Voltage (3.3 V Version)
VQ
5 mA < IQ < 400 mA
4.5 V < VI < 28 V
3.23
3.3
3.37
3.17
3.3
3.43
V
Output Voltage (3.3 V Version)
VQ
5 mA < IQ < 200 mA
4.5 V < VI < 40 V
3.23
3.3
3.37
3.17
3.3
3.43
V
Output Voltage (2.5 V Version)
VQ
5 mA < IQ < 400 mA
4.5 V < VI < 28 V
2.45
2.5
2.55
2.4
2.5
2.6
V
Output Voltage (2.5 V Version)
VQ
5 mA < IQ < 200 mA
4.5 V < VI < 40 V
2.45
2.5
2.55
2.4
2.5
2.6
V
Current Limit
IQ
−
400
600
−
400
600
−
mA
Quiescent Current
Iq
Iq = 1 mA
VQ = 5.0 V
VQ = 3.3 V
VQ = 2.5 V
Iq = 250 mA
VQ = 5.0 V
VQ = 3.3 V
VQ = 2.5 V
Iq = 400 mA
VQ = 5.0 V
VQ = 3.3 V
VQ = 2.5 V
−
−
−
190
145
140
250
250
250
−
−
−
190
145
140
250
250
250
mA
mA
mA
−
−
−
10
13
12
15
20
15
−
−
−
10
13
12
15
20
15
mA
mA
mA
−
−
−
20
30
28
35
45
35
−
−
−
20
30
28
35
45
35
mA
mA
mA
IQ = 250 mA,
VDR = VI − VQ
VI = 5.0 V
VI = 4.5 V
VI = 4.5 V
−
−
−
250
−
−
500
1.23
2.05
−
−
−
250
−
−
500
1.33
2.1
mV
V
V
Dropout Voltage
VDR
5.0 V Version
3.3 V Version
2.5 V Version
Load Regulation
DVQ
IQ = 5 mA to 400 mA
−
7
20
−
7
30
mV
Line Regulation
DVQ
DVI = 12 V to 32 V
IQ = 5 mA
−
10
25
−
10
25
mV
Power Supply Ripple Rejection
PSRR
ƒr = 100 Hz,
Vr = 0.5 VPP
−
60
−
−
60
−
dB
Temperature output voltage drift
dVQ/dT
−
0.5
−
−
0.5
−
mV/K
Thermal Shutdown Temperature*
TSD
150
−
210
150
−
210
°C
IQ = 5 mA
*Guaranteed by design, not tested in production
VI
VI
II
C11
1.0 mF
I
C12
100 nF
1
NCV4274 3
NCV4274A
Q
2,4
GND
IGND
IQ
CQ
10 mF
or
22 mF
4.5 − 40 V
VQ
VQ
Input
Rload
CI
100 nF
1
NCV4274 3
NCV4274A
2,4
GND
Figure 2. Measuring Circuit
Figure 3. Application Circuit
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4
5.0 V
CQ
Output
10 mF
NCV4274, NCV4274A
TYPICAL CHARACTERISTIC CURVES
1000
VI = 13.5 V
ESR (W)
100
Maximum ESR
COUT = 1 mF − 100 mF
10
Stable Region
1.0
0.1
Minimum ESR
COUT = 1 mF
0
5
20
60 100 140 180 220 260 300 340 380 420
LOAD CURRENT (mA)
Figure 4. ESR Characterization
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5
NCV4274, NCV4274A
TYPICAL CHARACTERISTIC CURVES − 5.0 V Version
5.2
6
VI = 13.5 V
RL = 1 kW
RL = 20 W
TJ = 25°C
5
5.1
VQ (V)
VQ (V)
4
5.0
3
2
4.9
1
0
4.8
−40
0
40
80
120
160
0
TJ (°C)
2
4
6
8
10
VI (V)
Figure 5. Output Voltage vs. Junction Temperature
Figure 6. Output Voltage vs. Input Voltage
60
800
TJ = 25°C
VQ = 0 V
TJ = 25°C
VI = 13.5 V
50
600
Iq (mA)
IQ (mA)
40
400
30
20
200
10
0
0
0
10
20
30
40
0
50
100
200
300
IQ (mA)
VI (V)
Figure 7. Output Current vs. Input Voltage
1.2
600
600
TJ = 25°C
VI = 13.5 V
500
400
VDR (mV)
1
Iq (mA)
500
Figure 8. Current Consumption vs. Output
Current (High Load)
1.6
1.4
400
0.8
0.6
TJ = 125°C
300
TJ = 25°C
200
0.4
100
0.2
0
0
10
20
30
40
50
0
60
0
100
200
300
IQ (mA)
IQ (mA)
Figure 9. Current Consumption vs. Output
Current (Low Load)
Figure 10. Drop Voltage vs. Output Current
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6
400
NCV4274, NCV4274A
TYPICAL CHARACTERISTIC CURVES − 5.0 V Version
6
40
4
RL = 20 W
TJ = 25°C
2
30
RL = 6.8 kW
TJ = 25°C
0
II (mA)
Iq (mA)
−2
20
−4
−6
−8
−10
10
−12
−14
0
0
10
20
30
40
−16
−50
50
VI (V)
−25
0
25
VI (V)
Figure 11. Current Consumption vs. Input Voltage
Figure 12. Input Current vs. Input Voltage
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7
50
NCV4274, NCV4274A
TYPICAL CHARACTERISTIC CURVES − 3.3 V Version
3.5
6
VI = 6 V
RL = 1 kW
3.4
4
VQ (V)
3.3
VQ (V)
RL = 20 W
TJ = 25°C
5
3.2
3
3.1
2
3.0
1
2.9
−40
0
0
40
80
120
160
0
TJ (°C)
1
2
3
4
5
6
VI (V)
Figure 13. Output Voltage vs. Junction
Temperature
Figure 14. Output Voltage vs. Input Voltage
800
60
TJ = 25°C
VQ = 0 V
TJ = 25°C
VI = 13.5 V
50
600
Iq (mA)
IQ (mA)
40
400
30
20
200
10
0
0
10
20
30
40
0
50
0
100
200
VI (V)
Figure 15. Output Current vs. Input Voltage
500
600
1.26
TJ = 25°C
VI = 13.5 V
1.4
1.24
1.2
TJ = 125°C
1.22
VDR (V)
1.0
Iq (mA)
400
Figure 16. Current Consumption vs. Output
Current (High Load)
1.6
0.8
0.6
TJ = 25°C
1.20
1.18
VDR = VI(min) − VQ
0.4
1.16
0.2
0
300
IQ (mA)
0
10
20
30
40
50
60
1.14
0
100
200
300
IQ (mA)
IQ (mA)
Figure 17. Current Consumption vs. Output
Current (Low Load)
Figure 18. Voltage Drop vs. Output Current
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8
400
NCV4274, NCV4274A
TYPICAL CHARACTERISTIC CURVES − 3.3 V Version
7
4
2
RL = 20 W
TJ = 25°C
6
0
−2
4
II (mA)
Iq (mA)
5
3
−6
−8
−10
2
−12
1
0
−4
RL = 3.3 kW
TJ = 25°C
−14
0
10
20
30
40
−16
−50
50
VI (V)
−25
0
25
VI (V)
Figure 19. Current Consumption vs. Input Voltage
Figure 20. Input Current vs. Input Voltage
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9
50
NCV4274, NCV4274A
TYPICAL CHARACTERISTIC CURVES − 2.5 V Version
2.7
5.0
4.5
VI = 6 V
RL = 1 kW
2.6
4.0
3.5
VQ (V)
VQ (V)
2.5
2.4
2.3
3.0
2.5
2.0
1.5
1.0
2.2
0.5
0
2.1
−40
0
40
80
120
160
0
2
1
3
TJ (°C)
4
5
6
VI (V)
Figure 21. Output Voltage vs. Junction
Temperature
Figure 22. Output Voltage vs. Input Voltage
800
60
TJ = 25°C
VQ = 0 V
TJ = 25°C
VI = 13.5 V
50
600
Iq (mA)
IQ (mA)
40
400
30
20
200
10
0
0
10
20
30
40
0
50
0
100
200
300
IQ (mA)
VI (V)
Figure 23. Output Current vs. Input Voltage
600
2.05
TJ = 25°C
VI = 13.5 V
1.4
2.04
2.03
1.2
2.02
1.0
TJ = 125°C
2.01
VDR (V)
Iq (mA)
500
Figure 24. Current Consumption vs. Output
Current (High Load)
1.6
0.8
0.6
TJ = 25°C
2.00
1.99
1.98
0.4
1.97
0.2
0
400
VDR = VI(min) − VQ
1.96
0
10
20
30
40
50
60
1.95
0
100
200
300
IQ (mA)
IQ (mA)
Figure 25. Current Consumption vs. Output
Current (Low Load)
Figure 26. Voltage Drop vs. Output Current
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10
400
NCV4274, NCV4274A
TYPICAL CHARACTERISTIC CURVES − 2.5 V Version
4.5
2
RL = 20 W
TJ = 25°C
4.0
3.5
0
−2
II (mA)
Iq (mA)
3.0
2.5
2.0
−6
−8
1.5
−10
1.0
RL = 3.3 kW
TJ = 25°C
−12
0.5
0
−4
0
10
20
30
40
−14
−50
50
VI (V)
−25
0
25
VI (V)
Figure 27. Current Consumption vs. Input Voltage
Figure 28. Input Current vs. Input Voltage
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11
50
NCV4274, NCV4274A
APPLICATION DESCRIPTION
Output Regulator
Once the value of PD(max) is known, the maximum
permissible value of RqJA can be calculated:
ǒ150 C * T AǓ
The output is controlled by a precision trimmed reference
and error amplifier. The PNP output has saturation control
for regulation while the input voltage is low, preventing over
saturation. Current limit and voltage monitors complement
the regulator design to give safe operating signals to the
processor and control circuits.
Pq
JA
+
PD
(eq. 2)
The value of RqJA can then be compared with those in the
package section of the data sheet. Those packages with
RqJA’s less than the calculated value in Equation 2 will keep
the die temperature below 150°C. In some cases, none of the
packages will be sufficient to dissipate the heat generated by
the IC, and an external heat sink will be required. The current
flow and voltages are shown in the Measurement Circuit
Diagram.
Stability Considerations
The input capacitor CI1 in Figure 2 is necessary for
compensating input line reactance. Possible oscillations
caused by input inductance and input capacitance can be
damped by using a resistor of approximately 1 W in series
with CI2.
The output or compensation capacitor helps determine
three main characteristics of a linear regulator: startup delay,
load transient response and loop stability.
The capacitor value and type should be based on cost,
availability, size and temperature constraints. The
aluminum electrolytic capacitor is the least expensive
solution, but, if the circuit operates at low temperatures
(−25°C to −40°C), both the value and ESR of the capacitor
will vary considerably. The capacitor manufacturer’s data
sheet usually provides this information.
The value for the output capacitor CQ shown in Figure 2
should work for most applications; however, it is not
necessarily the optimized solution. Stability is guaranteed at
values CQ w 2.2 mF and an ESR v 2.5 W within the
operating temperature range. Actual limits are shown in a
graph in the Typical Performance Characteristics section.
Heat Sinks
A heat sink effectively increases the surface area of the
package to improve the flow of heat away from the IC and
into the surrounding air.
Each material in the heat flow path between the IC and the
outside environment will have a thermal resistance. Like
series electrical resistances, these resistances are summed to
determine the value of RqJA:
R qJA + R qJC ) R qCS ) R qSA
(eq. 3)
Where:
RqJC = the junction−to−case thermal resistance,
RqCS = the case−to−heat sink thermal resistance, and
RqSA = the heat sink−to−ambient thermal resistance.
RqJC appears in the package section of the data sheet.
Like RqJA, it too is a function of package type. RqCS and
RqSA are functions of the package type, heat sink and the
interface between them. These values appear in data sheets
of heat sink manufacturers. Thermal, mounting, and
heat sinking are discussed in the ON Semiconductor
application note AN1040/D, available on the
ON Semiconductor Website.
Calculating Power Dissipation in a Single Output
Linear Regulator
The maximum power dissipation for a single output
regulator (Figure 3) is:
P D(max) + [V I(max) * V Q(min)]I Q(max) ) V I(max)I q (eq. 1)
Where:
VI(max) is the maximum input voltage,
VQ(min) is the minimum output voltage,
IQ(max) is the maximum output current for the application,
and
Iq is the quiescent current the regulator consumes at IQ(max).
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12
NCV4274, NCV4274A
ORDERING INFORMATION4
Output Voltage Accuracy
Output Voltage
Package
Shipping †
NCV4274DS50G
4%
5.0 V
D2PAK
(Pb−Free)
50 Units / Rail
NCV4274DS50R4G
4%
5.0 V
D2PAK
(Pb−Free)
800 / Tape & Reel
NCV4274DT50G
4%
5.0 V
DPAK
(Pb−Free)
75 Units / Rail
NCV4274DT50RKG
4%
5.0 V
DPAK
(Pb−Free)
2500 / Tape & Reel
NCV4274ADS50G
2%
5.0 V
D2PAK
(Pb−Free)
50 Units / Rail
NCV4274ADS50R4G
2%
5.0 V
D2PAK
(Pb−Free)
800 / Tape & Reel
NCV4274ADT50G
2%
5.0 V
DPAK
(Pb−Free)
75 Units / Rail
NCV4274ADT50RKG
2%
5.0 V
DPAK
(Pb−Free)
2500 / Tape & Reel
NCV4274ST33T3G
4%
3.3 V
SOT−223
(Pb−Free)
4000 / Tape & Reel
NCV4274DT33RKG
4%
3.3 V
DPAK
(Pb−Free)
2500 / Tape & Reel
NCV4274AST33T3G
2%
3.3 V
SOT−223
(Pb−Free)
4000 / Tape & Reel
NCV4274ADT33RKG
2%
3.3 V
DPAK
(Pb−Free)
2500 / Tape & Reel
NCV4274ST25T3G
4%
2.5 V
SOT−223
(Pb−Free)
4000 / Tape & Reel
NCV4274AST25T3G
2%
2.5 V
SOT−223
(Pb−Free)
4000 / Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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13
NCV4274, NCV4274A
PACKAGE DIMENSIONS
DPAK (SINGLE GAUGE)
CASE 369C−01
ISSUE O
−T−
C
B
V
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
SEATING
PLANE
E
R
4
Z
A
S
1
2
DIM
A
B
C
D
E
F
G
H
J
K
L
R
S
U
V
Z
3
U
K
F
J
L
H
D
G
2 PL
0.13 (0.005)
M
T
SOLDERING FOOTPRINT*
6.20
0.244
2.58
0.101
5.80
0.228
3.0
0.118
1.6
0.063
6.172
0.243
SCALE 3:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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14
INCHES
MIN
MAX
0.235 0.245
0.250 0.265
0.086 0.094
0.027 0.035
0.018 0.023
0.037 0.045
0.180 BSC
0.034 0.040
0.018 0.023
0.102 0.114
0.090 BSC
0.180 0.215
0.025 0.040
0.020
−−−
0.035 0.050
0.155
−−−
MILLIMETERS
MIN
MAX
5.97
6.22
6.35
6.73
2.19
2.38
0.69
0.88
0.46
0.58
0.94
1.14
4.58 BSC
0.87
1.01
0.46
0.58
2.60
2.89
2.29 BSC
4.57
5.45
0.63
1.01
0.51
−−−
0.89
1.27
3.93
−−−
NCV4274, NCV4274A
PACKAGE DIMENSIONS
SOT−223 (TO−261)
CASE 318E−04
ISSUE L
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
D
b1
4
HE
1
2
3
E
b
e1
e
0.08 (0003)
C
q
A
A1
DIM
A
A1
b
b1
c
D
E
e
e1
L1
HE
q
MIN
1.50
0.02
0.60
2.90
0.24
6.30
3.30
2.20
0.85
1.50
6.70
0°
L1
SOLDERING FOOTPRINT
3.8
0.15
2.0
0.079
2.3
0.091
2.3
0.091
6.3
0.248
2.0
0.079
1.5
0.059
SCALE 6:1
http://onsemi.com
15
mm Ǔ
ǒinches
MILLIMETERS
NOM
MAX
1.63
1.75
0.06
0.10
0.75
0.89
3.06
3.20
0.29
0.35
6.50
6.70
3.50
3.70
2.30
2.40
0.94
1.05
1.75
2.00
7.00
7.30
10°
−
MIN
0.060
0.001
0.024
0.115
0.009
0.249
0.130
0.087
0.033
0.060
0.264
0°
INCHES
NOM
0.064
0.002
0.030
0.121
0.012
0.256
0.138
0.091
0.037
0.069
0.276
−
MAX
0.068
0.004
0.035
0.126
0.014
0.263
0.145
0.094
0.041
0.078
0.287
10°
NCV4274, NCV4274A
PACKAGE DIMENSIONS
D2PAK
CASE 936−03
ISSUE B
−T−
K
OPTIONAL
CHAMFER
A
TERMINAL 4
E
U
S
B
F
1
2
3
V
H
M
J
D
0.010 (0.254) M T
NOTES:
3. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
4. CONTROLLING DIMENSION: INCH.
5. TAB CONTOUR OPTIONAL WITHIN DIMENSIONS
A AND K.
6. DIMENSIONS U AND V ESTABLISH A MINIMUM
MOUNTING SURFACE FOR TERMINAL 4.
7. DIMENSIONS A AND B DO NOT INCLUDE MOLD
FLASH OR GATE PROTRUSIONS. MOLD FLASH
AND GATE PROTRUSIONS NOT TO EXCEED
0.025 (0.635) MAXIMUM.
L
P
N
G
DIM
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
S
U
V
R
C
SOLDERING FOOTPRINT*
8.38
0.33
1.016
0.04
10.66
0.42
17.02
0.67
INCHES
MIN
MAX
0.386
0.403
0.356
0.368
0.170
0.180
0.026
0.036
0.045
0.055
0.051 REF
0.100 BSC
0.539
0.579
0.125 MAX
0.050 REF
0.000
0.010
0.088
0.102
0.018
0.026
0.058
0.078
5 _ REF
0.116 REF
0.200 MIN
0.250 MIN
MILLIMETERS
MIN
MAX
9.804 10.236
9.042
9.347
4.318
4.572
0.660
0.914
1.143
1.397
1.295 REF
2.540 BSC
13.691 14.707
3.175 MAX
1.270 REF
0.000
0.254
2.235
2.591
0.457
0.660
1.473
1.981
5 _ REF
2.946 REF
5.080 MIN
6.350 MIN
5.08
0.20
3.05
0.12
SCALE 3:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
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arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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NCV4274/D