SEMICONDUCTOR TECHNICAL DATA $+$"( !( ,% "!%"$% !( $"&#( #%)(' # )(%)(' (( $##*&(!# The MC74LCX16374 is a high performance, non–inverting 16–bit D–type flip–flop operating from a 2.7 to 3.6V supply. The device is byte controlled. Each byte has separate Output Enable and Clock Pulse inputs. These control pins can be tied together for full 16–bit operation. High impedance TTL compatible inputs significantly reduce current loading to input drivers while TTL compatible outputs offer improved switching noise performance. A VI specification of 5.5V allows MC74LCX16374 inputs to be safely driven from 5V devices. The MC74LCX16374 consists of 16 edge–triggered flip–flops with individual D–type inputs and 5V–tolerant 3–state true outputs. The buffered clocks (CPn) and buffered Output Enables (OEn) are common to all flip–flops within the respective byte. The flip–flops will store the state of individual D inputs that meet the setup and hold time requirements on the LOW–to–HIGH Clock (CP) transition. With the OE LOW, the contents of the flip–flops are available at the outputs. When the OE is HIGH, the outputs go to the high impedance state. The OE input level does not affect the operation of the flip–flops. • • • • • • • • • LOW–VOLTAGE CMOS 16–BIT D–TYPE FLIP–FLOP DT SUFFIX PLASTIC TSSOP PACKAGE CASE 1201–01 Designed for 2.7 to 3.6V VCC Operation 6.2ns Maximum tpd 5V Tolerant — Interface Capability With 5V TTL Logic Supports Live Insertion and Withdrawal IOFF Specification Guarantees High Impedance When VCC = 0V LVTTL Compatible LVCMOS Compatible 24mA Balanced Output Sink and Source Capability Near Zero Static Supply Current in All Three Logic States (20µA) Substantially Reduces System Power Requirements • Latchup Performance Exceeds 500mA • ESD Performance: Human Body Model >2000V; Machine Model >200V PIN NAMES Pins Function OEn CPn D0–D15 O0–O15 Output Enable Inputs Clock Pulse Inputs Inputs Outputs 11/96 Motorola, Inc. 1996 1 REV 1 MC74LCX16374 LOGIC DIAGRAM 1 OE1 1 48 CP1 O0 2 47 D0 O1 3 46 D1 GND 4 45 GND O2 5 44 D2 O3 6 43 D3 VCC 7 42 VCC O4 8 41 D4 O5 9 40 D5 GND 10 39 GND O6 11 38 D6 O7 12 37 D7 O8 13 36 D8 O9 14 35 D9 GND 15 34 GND O10 16 33 D10 O11 17 32 D11 VCC 18 31 VCC O12 19 30 D12 O13 20 29 D13 GND 21 28 GND O14 22 27 D14 O15 23 26 D15 OE2 24 25 CP2 Inputs 24 OE1 CP1 OE2 48 CP2 2 nCP 47 D0 D1 D2 D3 D10 O3 Q D5 O5 D6 27 Outputs 26 D15 Inputs O14 23 nCP O7 D 22 Q D 12 Q O13 Q D D14 nCP O12 20 nCP nCP O6 Q D 37 29 11 nCP 38 19 Q D D13 D O11 Q 30 9 Q 17 nCP D D12 nCP O10 Q nCP O4 Q D 40 32 8 nCP 16 nCP D D11 D D4 33 6 nCP 41 D7 O2 O9 Q D 5 Q D 43 35 D9 nCP 14 nCP O1 Q D 44 D 3 nCP O8 Q 36 D8 D 13 nCP O0 Q 46 25 Q O15 D Outputs CP1 OE1 D0:7 O0:7 CP2 OE2 D8:15 O8:15 ↑ L H H ↑ L H H ↑ L L L ↑ L L L L L X O0 L L X O0 X H X Z X H X Z H = High Voltage Level; L = Low Voltage Level; Z = High Impedance State; ↑ = Low–to–High Transition; X = High or Low Voltage Level and Transitions Are Acceptable, for ICC reasons, DO NOT FLOAT Inputs MOTOROLA 2 LCX DATA BR1339 — REV 3 MC74LCX16374 ABSOLUTE MAXIMUM RATINGS* Symbol Parameter VCC DC Supply Voltage VI DC Input Voltage VO DC Output Voltage Value Condition Unit –0.5 to +7.0 V –0.5 ≤ VI ≤ +7.0 V –0.5 ≤ VO ≤ +7.0 Output in 3–State V –0.5 ≤ VO ≤ VCC + 0.5 Note 1. V IIK DC Input Diode Current –50 VI < GND mA IOK DC Output Diode Current –50 VO < GND mA +50 VO > VCC mA IO DC Output Source/Sink Current ±50 mA ICC DC Supply Current Per Supply Pin ±100 mA IGND DC Ground Current Per Ground Pin ±100 mA TSTG Storage Temperature Range –65 to +150 °C * Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute–maximum–rated conditions is not implied. 1. Output in HIGH or LOW State. IO absolute maximum rating must be observed. RECOMMENDED OPERATING CONDITIONS Symbol Parameter Operating Data Retention Only Min Typ Max Unit 2.0 1.5 3.3 3.3 3.6 3.6 V 0 5.5 V 0 0 VCC 5.5 V VCC Supply Voltage VI Input Voltage VO Output Voltage IOH HIGH Level Output Current, VCC = 3.0V – 3.6V –24 mA IOL LOW Level Output Current, VCC = 3.0V – 3.6V 24 mA IOH HIGH Level Output Current, VCC = 2.7V – 3.0V –12 mA IOL LOW Level Output Current, VCC = 2.7V – 3.0V 12 mA TA Operating Free–Air Temperature ∆t/∆V Input Transition Rise or Fall Rate, VIN from 0.8V to 2.0V, VCC = 3.0V (HIGH or LOW State) (3–State) –40 +85 °C 0 10 ns/V DC ELECTRICAL CHARACTERISTICS TA = –40°C to +85°C Symbol Characteristic VIH HIGH Level Input Voltage (Note 2.) VIL LOW Level Input Voltage (Note 2.) VOH HIGH Level Output Voltage VOL LOW Level Output Voltage Condition Min 2.7V ≤ VCC ≤ 3.6V 2.0 2.7V ≤ VCC ≤ 3.6V Max V 0.8 2.7V ≤ VCC ≤ 3.6V; IOH = –100µA VCC – 0.2 VCC = 2.7V; IOH = –12mA 2.2 VCC = 3.0V; IOH = –18mA 2.4 VCC = 3.0V; IOH = –24mA 2.2 Unit V V 2.7V ≤ VCC ≤ 3.6V; IOL = 100µA 0.2 VCC = 2.7V; IOL= 12mA 0.4 VCC = 3.0V; IOL = 16mA 0.4 VCC = 3.0V; IOL = 24mA 0.55 V 2. These values of VI are used to test DC electrical characteristics only. LCX DATA BR1339 — REV 3 3 MOTOROLA MC74LCX16374 DC ELECTRICAL CHARACTERISTICS (continued) TA = –40°C to +85°C Symbol Characteristic Condition Min Max Unit II Input Leakage Current 2.7V ≤ VCC ≤ 3.6V; 0V ≤ VI ≤ 5.5V ±5.0 µA IOZ 3–State Output Current 2.7 ≤ VCC ≤ 3.6V; 0V ≤ VO ≤ 5.5V; VI = VIH or V IL ±5.0 µA IOFF Power–Off Leakage Current VCC = 0V; VI or VO = 5.5V 10 µA ICC Quiescent Supply Current 2.7 ≤ VCC ≤ 3.6V; VI = GND or VCC 20 µA 2.7 ≤ VCC ≤ 3.6V; 3.6 ≤ VI or VO ≤ 5.5V ±20 µA 2.7 ≤ VCC ≤ 3.6V; VIH = VCC – 0.6V 500 µA ∆ICC Increase in ICC per Input AC CHARACTERISTICS (tR = tF = 2.5ns; CL = 50pF; RL = 500Ω) Limits TA = –40°C to +85°C VCC = 3.0V to 3.6V Symbol Parameter Max VCC = 2.7V Waveform Min fmax Clock Pulse Frequency 1 170 Min Max Unit tPLH tPHL Propagation Delay CP to On 1 1.5 1.5 6.2 6.2 1.5 1.5 6.5 6.5 ns tPZH tPZL Output Enable Time to HIGH and LOW Levels 2 1.5 1.5 6.1 6.1 1.5 1.5 6.3 6.3 ns tPHZ tPLZ Output Disable Time from HIGH and LOW Levels 2 1.5 1.5 6.0 6.0 1.5 1.5 6.2 6.2 ns ts Setup TIme, HIGH or LOW Dn to CP 1 2.5 2.5 ns th Hold TIme, HIGH or LOW Dn to CP 1 1.5 1.5 ns tw CP Pulse Width, HIGH or LOW 3 3.0 3.0 ns tOSHL tOSLH Output–to–Output Skew (Note 3.) MHz 1.0 1.0 ns 3. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH–to–LOW (tOSHL) or LOW–to–HIGH (tOSLH); parameter guaranteed by design. DYNAMIC SWITCHING CHARACTERISTICS TA = +25°C Symbol Characteristic Condition Min Typ Max Unit VOLP Dynamic LOW Peak Voltage (Note 4.) VCC = 3.3V, CL = 50pF, VIH = 3.3V, VIL = 0V 0.8 V VOLV Dynamic LOW Valley Voltage (Note 4.) VCC = 3.3V, CL = 50pF, VIH = 3.3V, VIL = 0V 0.8 V 4. Number of outputs defined as “n”. Measured with “n–1” outputs switching from HIGH–to–LOW or LOW–to–HIGH. The remaining output is measured in the LOW state. CAPACITIVE CHARACTERISTICS Symbol Parameter CIN Input Capacitance COUT Output Capacitance CPD Power Dissipation Capacitance MOTOROLA Condition Typical Unit VCC = 3.3V, VI = 0V or VCC 7 pF VCC = 3.3V, VI = 0V or VCC 8 pF 10MHz, VCC = 3.3V, VI = 0V or VCC 20 pF 4 LCX DATA BR1339 — REV 3 MC74LCX16374 2.7V 2.7V 1.5V OEn Dn 1.5V 1.5V 0V 0V tPZH th ts tPHZ VCC VOH – 0.3V 2.7V CPn 1.5V On 1.5V ≈ 0V 0V fmax tPLH, tPHL tPZL VOH On tPLZ ≈ 3.0V 1.5V On 1.5V VOL + 0.3V GND VOL WAVEFORM 2 – OUTPUT ENABLE AND DISABLE TIMES tR = tF = 2.5ns, 10% to 90%; f = 1MHz; tW = 500ns WAVEFORM 1 – PROPAGATION DELAYS, SETUP AND HOLD TIMES tR = tF = 2.5ns, 10% to 90%; f = 1MHz; tW = 500ns 2.7V CPn 1.5V 1.5V tw 0V 2.7V tw 1.5V CPn 1.5V 0V WAVEFORM 3 – PULSE WIDTH tR = tF = 2.5ns (or fast as required) from 10% to 90%; Output requirements: VOL ≤ 0.8V, VOH ≥ 2.0V Figure 1. AC Waveforms VCC PULSE GENERATOR R1 DUT CL RT TEST 6V OPEN GND RL SWITCH tPLH, tPHL Open tPZL, tPLZ 6V Open Collector/Drain tPLH and tPHL 6V tPZH, tPHZ GND CL = 50pF or equivalent (Includes jig and probe capacitance) RL = R1 = 500Ω or equivalent RT = ZOUT of pulse generator (typically 50Ω) Figure 2. Test Circuit LCX DATA BR1339 — REV 3 5 MOTOROLA MC74LCX16374 OUTLINE DIMENSIONS DT SUFFIX PLASTIC TSSOP PACKAGE CASE 1201–01 ISSUE A 48X K K1 K REF 0.12 (0.005) M T U S V ÉÉÉ ÇÇÇ ÇÇÇ ÉÉÉ S T U S J J1 48 25 SECTION N–N M 0.254 (0.010) NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 5. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 6. DIMENSIONS A AND B ARE TO BE DETERMINED AT DATUM PLANE –W–. B –U– L N 1 24 A –V– PIN 1 IDENT. N F DETAIL E D C M 0.25 (0.010) –W– 0.076 (0.003) –T– SEATING DETAIL E PLANE G DIM A B C D F G H J J1 K K1 L M MILLIMETERS MIN MAX 12.40 12.60 6.00 6.20 ––– 1.10 0.05 0.15 0.50 0.75 0.50 BSC 0.37 ––– 0.09 0.20 0.09 0.16 0.17 0.27 0.17 0.23 7.95 8.25 0_ 8_ INCHES MIN MAX 0.488 0.496 0.236 0.244 ––– 0.043 0.002 0.006 0.020 0.030 0.0197 BSC 0.015 ––– 0.004 0.008 0.004 0.006 0.007 0.011 0.007 0.009 0.313 0.325 0_ 8_ H Motorola reserves the right to make changes without further notice to any products herein. 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How to reach us: USA/EUROPE/Locations Not Listed: Motorola Literature Distribution; P.O. Box 5405, Denver, Colorado 80217. 1–800–441–2447 JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center, 3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 03–81–3521–8315 Mfax: [email protected] – TOUCHTONE 602–244–6609 INTERNET: http://Design–NET.com ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298 ◊ MOTOROLA 6 MC74LCX16374/D LCX DATA BR1339 — REV 3