ONSEMI MC74AC86DTR2

MC74AC86, MC74ACT86
Quad 2−Input Exclusive−OR
Gate
Features
• Outputs Source/Sink 24 mA
• Pb−Free Packages are Available*
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PDIP−14
N SUFFIX
CASE 646
14
1
SOIC−14
D SUFFIX
CASE 751A
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
DC Supply Voltage (Referenced to GND)
VCC
−0.5 to
+7.0
V
DC Input Voltage (Referenced to GND)
Vin
−0.5 to
VCC +0.5
V
DC Output Voltage (Referenced to GND)
Vout
−0.5 to
VCC +0.5
V
DC Input Current, per Pin
Iin
±20
mA
DC Output Sink/Source Current, per Pin
Iout
±50
mA
DC VCC or GND Current per Output Pin
ICC
±50
mA
Storage Temperature
Tstg
−65 to
+150
°C
14
1
TSSOP−14
DT SUFFIX
CASE 948G
14
1
SOEIAJ−14
M SUFFIX
CASE 965
14
1
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
Pinout: 14−Lead Packages Conductors
(Top View)
VCC
14
13
12
11
10
9
8
1
2
3
4
5
6
7
GND
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
DEVICE MARKING INFORMATION
See general marking information in the device marking
section on page 4 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
 Semiconductor Components Industries, LLC, 2005
April, 2005 − Rev. 7
1
Publication Order Number:
MC74AC86/D
MC74AC86, MC74ACT86
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
VCC
Supply Voltage
Vin, Vout
DC Input Voltage, Output Voltage (Ref. to GND)
tr, tf
Input Rise and Fall Time (Note 1)
′AC Devices except Schmitt Inputs
Min
Typ
Max
′AC
2.0
5.0
6.0
′ACT
4.5
5.0
5.5
0
Unit
V
VCC
V
VCC @ 3.0 V
−
150
−
VCC @ 4.5 V
−
40
−
VCC @ 5.5 V
−
25
−
VCC @ 4.5 V
−
10
−
VCC @ 5.5 V
−
8.0
−
−
−
140
°C
−40
25
85
°C
ns/V
tr, tf
In ut Rise and Fall Time (Note 2)
Input
′ACT Devices except Schmitt Inputs
TJ
Junction Temperature (PDIP)
TA
Operating Ambient Temperature Range
IOH
Output Current − High
−
−
−24
mA
IOL
Output Current − Low
−
−
24
mA
ns/V
1. Vin from 30% to 70% VCC; see individual Data Sheets for devices that differ from the typical input rise and fall times.
2. Vin from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.
DC CHARACTERISTICS
Symbol
VIH
VIL
VOH
VOL
TA = +25°C
TA =
−40°C to
+85°C
Typ
Minimum
u High
g Level
e e
Input Voltage
3.0
4.5
5.5
1.5
2.25
2.75
2.1
3.15
3.85
2.1
3.15
3.85
V
VOUT = 0.1 V
or VCC − 0.1 V
Maximum
a
u Low
o Level
e e
Input Voltage
3.0
4.5
5.5
1.5
2.25
2.75
0.9
1.35
1.65
0.9
1.35
1.65
V
VOUT = 0.1 V
or VCC − 0.1 V
Minimum
u High
g Level
e e
Output Voltage
3.0
4.5
5.5
2.99
4.49
5.49
2.9
4.4
5.4
2.9
4.4
5.4
V
3.0
4.5
5.5
−
−
−
2.56
3.86
4.86
2.46
3.76
4.76
3.0
4.5
5.5
0.002
0.001
0.001
0.1
0.1
0.1
0.1
0.1
0.1
3.0
4.5
5.5
−
−
−
0.36
0.36
0.36
0.44
0.44
0.44
55
5.5
−
±0 1
±0.1
5.5
−
5.5
55
5.5
Parameter
Maximum
a
u Low
o Level
e e
Output Voltage
Maximum
a
u Input
u
Leakage Current
IOLD
†Minimum Dynamic
O t t Current
Output
C
t
ICC
74AC
VCC
(V)
IIN
IOHD
74AC
Maximum
a
u Quiescent
Qu esce
Supply Current
Guaranteed Limits
Conditions
IOUT = −50 A
V
*VIN = VIL or VIH
−12 mA
IOH
−24 mA
−24 mA
IOUT = 50 A
V
V
*VIN = VIL or VIH
12 mA
IOL
24 mA
24 mA
±1 0
±1.0
A
VI = VCC, GND
−
75
mA
VOLD = 1.65 V Max
−
−
−75
mA
VOHD = 3.85 V Min
−
40
4.0
40
A
VIN = VCC or GND
*All outputs loaded; thresholds on input associated with output under test.
†Maximum test duration 2.0 ms, one output loaded at a time.
NOTE: IIN and ICC @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V VCC.
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2
Unit
MC74AC86, MC74ACT86
AC CHARACTERISTICS (For Figures and Waveforms − See Section 3 of the ON Semiconductor FACT Data Book, DL138/D)
Symbol
Parameter
74AC
74AC
TA = +25°C
CL = 50 pF
TA = −40°C
to +85°C
CL = 50 pF
VCC*
(V)
Min
Typ
Max
Min
Max
Unit
Fig.
No.
tPLH
Propagation
o aga o Delay
e ay
Inputs to Outputs
3.3
5.0
2.0
1.5
6.0
4.5
11.5
8.5
1.5
1.0
12.5
9.0
ns
3−5
tPHL
Propagation
o aga o Delay
e ay
Inputs to Outputs
3.3
5.0
2.0
1.5
6.5
4.5
11.5
8.5
1.5
1.0
12.5
9.5
ns
3−5
*Voltage Range 3.3 V is 3.3 V ±0.3 V
Voltage Range 5.0 V is 5.0 V ±0.5 V.
DC CHARACTERISTICS
Symbol
Parameter
74ACT
74ACT
TA = +25°C
TA =
−40°C to
+85°C
VCC
(V)
Typ
Guaranteed Limits
Unit
Conditions
VIH
Minimum
u High
g Level
e e
Input Voltage
4.5
5.5
1.5
1.5
2.0
2.0
2.0
2.0
V
VOUT = 0.1 V
or VCC − 0.1 V
VIL
Maximum
a
u Low
o Level
e e
Input Voltage
4.5
5.5
1.5
1.5
0.8
0.8
0.8
0.8
V
VOUT = 0.1 V
or VCC − 0.1 V
VOH
Minimum
u High
g Level
e e
Output Voltage
4.5
5.5
4.49
5.49
4.4
5.4
4.4
5.4
V
4.5
5.5
−
−
3.86
4.86
3.76
4.76
4.5
5.5
0.001
0.001
0.1
0.1
0.1
0.1
4.5
5.5
−
−
0.36
0.36
0.44
0.44
V
*VIN = VIL or VIH
24 mA
IOL
24 mA
±0 1
±0.1
±1 0
±1.0
A
VI = VCC, GND
VOL
Maximum
a
u Low
o Level
e e
Output Voltage
IOUT = −50 A
*VIN = VIL or VIH
−24 mA
IOH
−24 mA
V
IOUT = 50 A
V
IIN
Maximum
a
u Input
u
Leakage Current
55
5.5
ICCT
Additional Max. ICC/Input
5.5
0.6
−
1.5
mA
VI = VCC − 2.1 V
IOLD
†Minimum Dynamic
O t t Current
Output
C
t
5.5
−
−
75
mA
VOLD = 1.65 V Max
5.5
−
−
−75
mA
VOHD = 3.85 V Min
55
5.5
−
40
4.0
40
A
VIN = VCC or GND
IOHD
ICC
Maximum
a
u Quiescent
Qu esce
Supply Current
*All outputs loaded; thresholds on input associated with output under test.
†Maximum test duration 2.0 ms, one output loaded at a time.
AC CHARACTERISTICS (For Figures and Waveforms − See Section 3 of the ON Semiconductor FACT Data Book, DL138/D)
Symbol
Parameter
74ACT
74ACT
TA = +25°C
CL = 50 pF
TA = −40°C
to +85°C
CL = 50 pF
VCC*
(V)
Min
Typ
Max
Min
Max
Unit
Fig.
No.
tPLH
Propagation Delay
5.0
1.5
8.5
9.5
1.0
10.0
ns
3−5
tPHL
Propagation Delay
5.0
1.5
7.0
9.5
1.0
10.5
ns
3−5
*Voltage Range 5.0 V is 5.0 V ±0.5 V.
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3
MC74AC86, MC74ACT86
CAPACITANCE
Symbol
Parameter
Value
Typ
Unit
Test Conditions
CIN
Input Capacitance
4.5
pF
VCC = 5.0 V
CPD
Power Dissipation Capacitance
35
pF
VCC = 5.0 V
ORDERING INFORMATION
Package
Shipping†
MC74AC86N
PDIP−14
25 Units / Rail
MC74AC86NG
PDIP−14
(Pb−Free)
25 Units / Rail
MC74ACT86N
PDIP−14
25 Units / Rail
MC74ACT86NG
PDIP−14
(Pb−Free)
25 Units / Rail
MC74AC86D
SOIC−14
55 Units / Rail
MC74AC86DG
SOIC−14
(Pb−Free)
55 Units / Rail
MC74AC86DR2
SOIC−14
2500 Tape & Reel
MC74AC86DR2G
SOIC−14
(Pb−Free)
2500 Tape & Reel
MC74ACT86D
SOIC−14
55 Units / Rail
MC74ACT86DG
SOIC−14
(Pb−Free)
55 Units / Rail
MC74ACT86DR2
SOIC−14
2500 Tape & Reel
MC74ACT86DR2G
SOIC−14
(Pb−Free)
2500 Tape & Reel
MC74AC86DTR2
TSSOP−14*
2500 Tape & Reel
MC74ACT86DTR2
TSSOP−14*
2500 Tape & Reel
MC74ACT86MEL
SOEIAJ−14
2000 Tape & Reel
MC74ACT86MELG
SOEIAJ−14
(Pb−Free)
2000 Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*This package is inherently Pb−Free.
MARKING DIAGRAMS
PDIP−14
SOIC−14
TSSOP−14
SOEIAJ−14
MC74AC86N
AWLYYWW
AC86
AWLYWW
AC
86
ALYW
74AC86
ALYW
MC74ACT86N
AWLYYWW
ACT86
AWLYWW
ACT
86
ALYW
74ACT86
ALYW
A
WL, L
YY, Y
WW, W
= Assembly Location
= Wafer Lot
= Year
= Work Week
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4
MC74AC86, MC74ACT86
PACKAGE DIMENSIONS
PDIP−14
N SUFFIX
CASE 646−06
ISSUE N
14
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS
WHEN FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE
MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
8
B
1
7
A
F
DIM
A
B
C
D
F
G
H
J
K
L
M
N
L
N
C
−T−
SEATING
PLANE
J
K
H
D 14 PL
G
M
0.13 (0.005)
M
INCHES
MIN
MAX
0.715
0.770
0.240
0.260
0.145
0.185
0.015
0.021
0.040
0.070
0.100 BSC
0.052
0.095
0.008
0.015
0.115
0.135
0.290
0.310
−−−
10 0.015
0.039
MILLIMETERS
MIN
MAX
18.16
18.80
6.10
6.60
3.69
4.69
0.38
0.53
1.02
1.78
2.54 BSC
1.32
2.41
0.20
0.38
2.92
3.43
7.37
7.87
−−−
10 0.38
1.01
SOIC−14
D SUFFIX
CASE 751A−03
ISSUE G
−A−
14
8
−B−
P 7 PL
0.25 (0.010)
M
B
M
7
1
G
F
R X 45 C
−T−
SEATING
PLANE
D 14 PL
0.25 (0.010)
M
T B
J
M
K
S
A
S
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5
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.127
(0.005) TOTAL IN EXCESS OF THE D
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
DIM
A
B
C
D
F
G
J
K
M
P
R
MILLIMETERS
MIN
MAX
8.55
8.75
3.80
4.00
1.35
1.75
0.35
0.49
0.40
1.25
1.27 BSC
0.19
0.25
0.10
0.25
0
7
5.80
6.20
0.25
0.50
INCHES
MIN
MAX
0.337 0.344
0.150 0.157
0.054 0.068
0.014 0.019
0.016 0.049
0.050 BSC
0.008 0.009
0.004 0.009
0
7
0.228 0.244
0.010 0.019
MC74AC86, MC74ACT86
PACKAGE DIMENSIONS
TSSOP−14
DT SUFFIX
CASE 948G−01
ISSUE A
14X K REF
0.10 (0.004)
0.15 (0.006) T U
M
T U
V
S
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL
IN EXCESS OF THE K DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
S
S
N
2X
14
L/2
0.25 (0.010)
8
M
B
−U−
L
PIN 1
IDENT.
F
7
1
0.15 (0.006) T U
N
S
DETAIL E
K
A
−V−
ÉÉÉ
ÇÇÇ
ÇÇÇ
ÉÉÉ
ÇÇÇ
K1
J J1
SECTION N−N
−W−
C
0.10 (0.004)
−T− SEATING
PLANE
D
G
H
DETAIL E
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6
DIM
A
B
C
D
F
G
H
J
J1
K
K1
L
M
MILLIMETERS
INCHES
MIN
MAX
MIN MAX
4.90
5.10 0.193 0.200
4.30
4.50 0.169 0.177
−−−
1.20
−−− 0.047
0.05
0.15 0.002 0.006
0.50
0.75 0.020 0.030
0.65 BSC
0.026 BSC
0.50
0.60 0.020 0.024
0.09
0.20 0.004 0.008
0.09
0.16 0.004 0.006
0.19
0.30 0.007 0.012
0.19
0.25 0.007 0.010
6.40 BSC
0.252 BSC
0
8
0
8
MC74AC86, MC74ACT86
PACKAGE DIMENSIONS
SOEIAJ−14
M SUFFIX
CASE 965−01
ISSUE O
14
LE
8
Q1
E HE
L
7
1
M
DETAIL P
Z
D
VIEW P
A
e
c
DIM
A
A1
b
c
D
E
e
HE
L
LE
M
Q1
Z
A1
b
0.13 (0.005)
M
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH OR PROTRUSIONS AND ARE MEASURED
AT THE PARTING LINE. MOLD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
0.10 (0.004)
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7
MILLIMETERS
MIN
MAX
−−−
2.05
0.05
0.20
0.35
0.50
0.18
0.27
9.90
10.50
5.10
5.45
1.27 BSC
7.40
8.20
0.50
0.85
1.10
1.50
10 0
0.70
0.90
−−−
1.42
INCHES
MIN
MAX
−−−
0.081
0.002
0.008
0.014
0.020
0.007
0.011
0.390
0.413
0.201
0.215
0.050 BSC
0.291
0.323
0.020
0.033
0.043
0.059
10 0
0.028
0.035
−−−
0.056
MC74AC86, MC74ACT86
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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LITERATURE FULFILLMENT:
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Phone: 81−3−5773−3850
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8
For additional information, please contact your
local Sales Representative.
MC74AC86/D