FAIRCHILD SSS45N20B

SSP45N20B/SSS45N20B
200V N-Channel MOSFET
General Description
Features
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switching DC/DC converters,
switch mode power supplies, DC-AC converters for
uninterrupted power supply and motor control.
•
•
•
•
•
•
35A, 200V, RDS(on) = 0.065Ω @VGS = 10 V
Low gate charge ( typical 133 nC)
Low Crss ( typical 120 pF)
Fast switching
100% avalanche tested
Improved dv/dt capability
D
G
TO-220
G DS
GD S
SSP Series
TO-220F
SSS Series
S
Absolute Maximum Ratings
Symbol
VDSS
ID
TC = 25°C unless otherwise noted
Parameter
Drain-Source Voltage
- Continuous (TC = 25°C)
Drain Current
SSP45N20B
- Continuous (TC = 100°C)
IDM
Drain Current
- Pulsed
SSS45N20B
Units
V
A
200
(Note 1)
35
35 *
22.2
22.2 *
A
140
140 *
A
± 30
V
650
mJ
VGSS
Gate-Source Voltage
EAS
Single Pulsed Avalanche Energy
(Note 2)
IAR
Avalanche Current
(Note 1)
35
A
EAR
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation (TC = 25°C)
(Note 1)
17.6
5.5
-55 to +150
mJ
V/ns
W
W/°C
°C
300
°C
dv/dt
PD
TJ, TSTG
TL
(Note 3)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
176
1.41
57
0.45
* Drain current limited by maximum junction temperature.
Thermal Characteristics
Symbol
RθJC
Parameter
Thermal Resistance, Junction-to-Case Max.
RθCS
Thermal Resistance, Case-to-Sink Typ.
0.5
--
°C/W
RθJA
Thermal Resistance, Junction-to-Ambient Max.
62.5
62.5
°C/W
©2001 Fairchild Semiconductor Corporation
SSP45N20B
0.71
SSS45N20B
2.2
Units
°C/W
Rev. A, November 2001
SSP45N20B/SSS45N20B
November 2001
Symbol
TC = 25°C unless otherwise noted
Parameter
Test Conditions
Min
Typ
Max
Units
200
--
--
V
--
0.2
--
V/°C
VDS = 200 V, VGS = 0 V
--
--
10
µA
VDS = 160 V, TC = 125°C
--
--
100
µA
Gate-Body Leakage Current, Forward
VGS = 30 V, VDS = 0 V
--
--
100
nA
Gate-Body Leakage Current, Reverse
VGS = -30 V, VDS = 0 V
--
--
-100
nA
Off Characteristics
BVDSS
Drain-Source Breakdown Voltage
VGS = 0 V, ID = 250 µA
∆BVDSS
/
∆TJ
Breakdown Voltage Temperature
Coefficient
ID = 250 µA, Referenced to 25°C
IDSS
IGSSF
IGSSR
Zero Gate Voltage Drain Current
On Characteristics
VGS(th)
Gate Threshold Voltage
VDS = VGS, ID = 250 µA
2.0
--
4.0
V
RDS(on)
Static Drain-Source
On-Resistance
VGS = 10 V, ID = 17.5 A
--
0.052
0.065
Ω
gFS
Forward Transconductance
VDS = 40 V, ID = 17.5 A
--
36
--
S
--
3300
4300
pF
--
460
600
pF
--
120
155
pF
--
45
100
ns
--
340
690
ns
--
360
730
ns
--
270
550
ns
--
133
173
nC
(Note 4)
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
Switching Characteristics
td(on)
Turn-On Delay Time
tr
Turn-On Rise Time
td(off)
Turn-Off Delay Time
tf
Turn-Off Fall Time
Qg
Total Gate Charge
Qgs
Gate-Source Charge
Qgd
Gate-Drain Charge
VDD = 100 V, ID = 45 A,
RG = 25 Ω
(Note 4, 5)
VDS = 160 V, ID = 45 A,
VGS = 10 V
(Note 4, 5)
--
19
--
nC
--
67
--
nC
Drain-Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain-Source Diode Forward Current
--
--
35
A
ISM
--
--
140
A
VSD
Maximum Pulsed Drain-Source Diode Forward Current
VGS = 0 V, IS = 35 A
Drain-Source Diode Forward Voltage
--
--
1.5
V
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
VGS = 0 V, IS = 45 A,
dIF / dt = 100 A/µs
(Note 4)
--
245
--
ns
--
2.27
--
µC
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 0.8mH, IAS = 35A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C
3. ISD ≤ 45A, di/dt ≤ 300A/µs, VDD ≤ BVDSS, Starting TJ = 25°C
4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2%
5. Essentially independent of operating temperature
©2001 Fairchild Semiconductor Corporation
Rev. A, November 2001
SSP45N20B/SSS45N20B
Electrical Characteristics
SSP45N20B/SSS45N20B
Typical Characteristics
VGS
15.0 V
10.0 V
8.0 V
7.0 V
6.5 V
6.0 V
5.5 V
Bottom : 5.0 V
2
2
10
Top :
ID, Drain Current [A]
ID, Drain Current [A]
10
1
10
1
10
o
150 C
o
25 C
0
10
o
-55 C
※ Notes :
1. 250μ s Pulse Test
2. TC = 25℃
0
10
※ Notes :
1. VDS = 40V
2. 250μ s Pulse Test
-1
-1
0
10
10
1
10
2
10
4
6
8
10
VGS, Gate-Source Voltage [V]
VDS, Drain-Source Voltage [V]
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
0.30
2
10
VGS = 10V
IDR, Reverse Drain Current [A]
RDS(ON) [Ω ],
Drain-Source On-Resistance
0.25
0.20
VGS = 20V
0.15
1
10
0.10
0.05
150℃
25℃
※ Notes :
1. VGS = 0V
2. 250μ s Pulse Test
※ Note : TJ = 25℃
0.00
0
0
35
70
105
140
175
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
VSD, Source-Drain voltage [V]
Figure 3. On-Resistance Variation vs
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation with Source Current
and Temperature
10000
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
12
VDS = 40V
Ciss
6000
Coss
4000
Crss
※ Notes :
1. VGS = 0 V
2. f = 1 MHz
2000
VGS , Gate-Source Voltage [V]
10
8000
Capacitance [pF]
10
ID, Drain Current [A]
VDS = 100V
VDS = 160V
8
6
4
2
※ Note : ID = 45 A
0
0
-1
10
0
10
1
10
VDS, Drain-Source Voltage [V]
Figure 5. Capacitance Characteristics
©2001 Fairchild Semiconductor Corporation
0
30
60
90
120
150
QG, Total Gate Charge [nC]
Figure 6. Gate Charge Characteristics
Rev. A, November 2001
SSP45N20B/SSS45N20B
Typical Characteristics
(Continued)
3.0
1.2
RDS(ON) , (Normalized)
Drain-Source On-Resistance
BV DSS , (Normalized)
Drain-Source Breakdown Voltage
2.5
1.1
1.0
※ Notes :
1. VGS = 0 V
2. ID = 250 μ A
0.9
0.8
-100
-50
0
50
100
150
2.0
1.5
1.0
※ Notes :
1. VGS = 10 V
2. ID = 22.5 A
0.5
0.0
-100
200
0
50
100
Operation in This Area
is Limited by R DS(on)
2
2
10
10
10 µs
1 ms
10 ms
10
DC
0
10 µs
100 µs
1 ms
ID, Drain Current [A]
100 µs
10
200
Figure 8. On-Resistance Variation
vs Temperature
Operation in This Area
is Limited by R DS(on)
1
150
TJ, Junction Temperature [ C]
Figure 7. Breakdown Voltage Variation
vs Temperature
ID, Drain Current [A]
-50
o
o
TJ, Junction Temperature [ C]
※ Notes :
10 ms
100 ms
1
10
DC
0
10
※ Notes :
o
1. TC = 25 C
o
2. TJ = 150 C
3. Single Pulse
-1
10
o
1. TC = 25 C
o
2. TJ = 150 C
3. Single Pulse
-1
10
0
1
10
-2
10
2
10
10
0
10
VDS, Drain-Source Voltage [V]
1
10
2
10
VDS, Drain-Source Voltage [V]
Figure 9-1. Maximum Safe Operating Area
for SSP45N20B
Figure 9-2. Maximum Safe Operating Area
for SSS45N20B
40
35
ID, Drain Current [A]
30
25
20
15
10
5
0
25
50
75
100
125
150
TC, Case Temperature [℃]
Figure 10. Maximum Drain Current
vs Case Temperature
©2001 Fairchild Semiconductor Corporation
Rev. A, November 2001
(Continued)
0
D = 0 .5
※ N o te s :
1 . Z θ J C (t) = 0 .7 1 ℃ /W M a x .
2 . D u ty F a c to r, D = t 1 /t 2
3 . T J M - T C = P D M * Z θ J C (t)
0 .2
10
-1
0 .1
0 .0 5
PDM
0 .0 2
0 .0 1
t1
Z
θ JC
(t), T h e r m a l R e s p o n s e
10
SSP45N20B/SSS45N20B
Typical Characteristics
t2
s in g le p u ls e
10
-2
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
t 1 , S q u a re W a v e P u ls e D u ra tio n [s e c ]
10
D = 0 .5
0
0 .2
※ N o te s :
1 . Z θ J C (t) = 2 .2 ℃ /W M a x .
2 . D u ty F a c to r, D = t 1 /t 2
3 . T J M - T C = P D M * Z θ J C (t)
0 .1
10
0 .0 5
-1
0 .0 2
θ JC
(t), T h e r m a l R e s p o n s e
Figure 11-1. Transient Thermal Response Curve to SSP45N20B
PDM
0 .0 1
Z
t1
t2
s in g le p u ls e
10
-2
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
t 1 , S q u a re W a v e P u ls e D u ra tio n [s e c ]
Figure 11-2. Transient Thermal Response Curve SSS45N20B
©2001 Fairchild Semiconductor Corporation
Rev. A, November 2001
SSP45N20B/SSS45N20B
Gate Charge Test Circuit & Waveform
VGS
Same Type
as DUT
50KΩ
Qg
200nF
12V
10V
300nF
VDS
VGS
Qgs
Qgd
DUT
3mA
Charge
Resistive Switching Test Circuit & Waveforms
VDS
RL
VDS
90%
VDD
VGS
RG
VGS
DUT
10V
10%
td(on)
tr
td(off)
t on
tf
t off
Unclamped Inductive Switching Test Circuit & Waveforms
BVDSS
1
EAS = ---- L IAS2 -------------------2
BVDSS - VDD
L
VDS
BVDSS
IAS
ID
RG
VDD
DUT
10V
tp
©2001 Fairchild Semiconductor Corporation
ID (t)
VDS (t)
VDD
tp
Time
Rev. A, November 2001
SSP45N20B/SSS45N20B
Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
+
VDS
_
I SD
L
Driver
RG
VGS
VGS
( Driver )
Same Type
as DUT
VDD
• dv/dt controlled by RG
• ISD controlled by pulse period
Gate Pulse Width
D = -------------------------Gate Pulse Period
10V
IFM , Body Diode Forward Current
I SD
( DUT )
di/dt
IRM
Body Diode Reverse Current
VDS
( DUT )
Body Diode Recovery dv/dt
VSD
VDD
Body Diode
Forward Voltage Drop
©2001 Fairchild Semiconductor Corporation
Rev. A, November 2001
TO-220
4.50 ±0.20
2.80 ±0.10
(3.00)
+0.10
1.30 –0.05
18.95MAX.
(3.70)
ø3.60 ±0.10
15.90 ±0.20
1.30 ±0.10
(8.70)
(1.46)
9.20 ±0.20
(1.70)
9.90 ±0.20
1.52 ±0.10
0.80 ±0.10
2.54TYP
[2.54 ±0.20]
10.08 ±0.30
(1.00)
13.08 ±0.20
)
(45°
1.27 ±0.10
+0.10
0.50 –0.05
2.40 ±0.20
2.54TYP
[2.54 ±0.20]
10.00 ±0.20
Dimensions in Millimeters
©2001 Fairchild Semiconductor Corporation
Rev. A, November 2001
SSP45N20B/SSS45N20B
Package Dimensions
3.30 ±0.10
TO-220F
10.16 ±0.20
2.54 ±0.20
ø3.18 ±0.10
(7.00)
(1.00x45°)
15.87 ±0.20
15.80 ±0.20
6.68 ±0.20
(0.70)
0.80 ±0.10
)
0°
(3
9.75 ±0.30
MAX1.47
#1
+0.10
0.50 –0.05
2.54TYP
[2.54 ±0.20]
2.76 ±0.20
2.54TYP
[2.54 ±0.20]
9.40 ±0.20
4.70 ±0.20
0.35 ±0.10
Dimensions in Millimeters
©2001 Fairchild Semiconductor Corporation
Rev. A, November 2001
SSP45N20B/SSS45N20B
Package Dimensions (Continued)
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intended to be an exhaustive list of all such trademarks.
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DenseTrench™
DOME™
EcoSPARK™
E2CMOS™
EnSigna™
FACT™
FACT Quiet Series™
FAST®
FASTr™
FRFET™
GlobalOptoisolator™
GTO™
HiSeC™
ISOPLANAR™
LittleFET™
MicroFET™
MicroPak™
MICROWIRE™
OPTOLOGIC™
OPTOPLANAR™
PACMAN™
POP™
Power247™
PowerTrench®
QFET™
QS™
QT Optoelectronics™
Quiet Series™
SLIENT SWITCHER®
SMART START™
STAR*POWER™
Stealth™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
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LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR
CORPORATION.
As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, or (c) whose failure to perform
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
result in significant injury to the user.
2. A critical component is any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or In
Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
©2001 Fairchild Semiconductor Corporation
Rev. H4