FAN2013 2A Low-Voltage Current-Mode Synchronous PWM Buck Regulator Features Description ■ 95% Efficiency, Synchronous Operation The FAN2013 is a high-efficiency, low-noise synchronous PWM current mode DC-DC converter designed for low-voltage applications. It provides up to 2A continuous load current from the 4.5V to 5.5V input. The output voltage is adjustable over a wide range of 0.8V to VIN by means of an external voltage divider. ■ Adjustable Output Voltage from 0.8V to VIN ■ 4.5V to 5.5V Input Voltage Range ■ Up to 2A Output Current ■ Fixed-Frequency 1.3MHz PWM Operation ■ 100% Duty Cycle, Low-Dropout Operation The FAN2013 is enabled when the input voltage on the VIN pin exceeds the UVLO threshold. ■ Soft-Start Function ■ Excellent Load Transient Response A current-mode control loop with a fast transient response ensures excellent line and load regulation. The fixed 1.3MHz switching frequency enables designers to choose a small, inexpensive external inductor and capacitor. Filtering can be accomplished with small components, reducing space and cost. ■ Power-Good Flag ■ Over-Voltage, Under-Voltage Lockout, Short-Circuit, and Thermal Shutdown Protections ■ 3x3mm 6-lead MLP Package Applications ■ Set-Top Box Protection features include input under-voltage lockout, short-circuit protection, and thermal shutdown. Soft-start limits in-rush current during start-up conditions. ■ Point-of-Load Power The device is available in a 3x3mm 6-lead MLP. ■ Hard Disk Drive ■ Notebook Computer ■ Communications Equipment Typical Application PG +5V VIN PVIN 5 FB 1 6 P1 (AGND) 2 PGND 3 4 10µF SW 10K L1 R2 R1 VOUT 2.2µH 40µF Figure 1. Typical Application Ordering Information Part Number Output Voltage Pb-Free Package Type Packing Method FAN2013MPX 0.8V - VIN Yes MLP-6 3x3mm Tape and Reel © 2006 Fairchild Semiconductor Corporation FAN2013 Rev. 1.0.0 www.fairchildsemi.com FAN2013 2A Low-Voltage Current-Mode Synchronous PWM Buck Regulator November 2006 Top View FB 1 PGND 2 SW 3 P1 (AGND) 6 PG 5 VIN 4 PVIN 3x3mm 6-Lead MLP Figure 2. FAN2013 Pin Assignment Pin Description Pin # Name Description P1 AGND Analog Ground. P1 must be soldered to the PCB ground. 1 FB 2 PGND Feedback Input. Adjustable voltage option; connect this pin to the resistor divider. 3 SW Switching Node. This pin is connected to the internal MOSFET switches. 4 PVIN Supply Voltage Input. This pin is connected to the internal MOSFET switches. 5 VIN Supply Voltage Input. 6 PG Open Drain Power Good. Power Ground. This pin is connected to the internal MOSFET switches. This pin must be externally connected to AGND. © 2006 Fairchild Semiconductor Corporation FAN2013 Rev. 1.0.0 www.fairchildsemi.com 2 FAN2013 2A Low-Voltage Current-Mode Synchronous PWM Buck Regulator Pin Assignment Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Absolute maximum ratings apply individually only, not in combination. Unless otherwise specified, all other voltages are referenced to AGND. Symbol VIN Parameter Supply Voltage PVIN and any other pin θJC Thermal Resistance-Junction to Tab, 3x3mm 6-lead MLP TL Lead Soldering Temperature (10 seconds) TSTG Storage Temperature TJ Junction Temperature Electrostatic Discharge (ESD) Protection Level (2) Min. Max. Unit. -0.3 6.2 V -0.3 VIN V (1) 8 °C/W 260 °C -65 150 °C -40 150 °C HBM 3.5 CDM 2 kV Notes: 1. Junction-to-ambient thermal resistance, θJA, is a strong function of PCB material, board thickness, thickness and number of copper planes, number of via used, diameter of via used, available copper surface, and attached heat sink characteristics. 2. Using Mil Std. 883E, method 3015.7 (Human Body Model) and EIA/JESD22C101-A (Charge Device Model). Recommended Operating Conditions Symbol Parameter Min. Typ. Max. Unit VIN Supply Voltage Range 4.5 5.5 V VOUT Output Voltage Range, Adjustable Version 0.8 VIN V IOUT Output Current L Inductor(3) CIN Input Capacitor(3) 2.0 Capacitor(3) COUT Output TA Operating Ambient Temperature Range A 2.2 μH 10 20 μF 20 40 -40 μF +85 °C Notes: 3. Refer to the Applications Information section for further details. © 2006 Fairchild Semiconductor Corporation FAN2013 Rev. 1.0.0 www.fairchildsemi.com 3 FAN2013 2A Low-Voltage Current-Mode Synchronous PWM Buck Regulator Absolute Maximum Ratings VIN = 4.5V to 5.5V, VOUT = 1.2V, IOUT = 200mA, CIN = 10µF, COUT = 40µF, L = 2.2µH, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = 25°C. Parameter Conditions Min. Input Voltage Typ. Max. Units 5.5 V 5 10 mA 3.7 4.0 4.5 Quiescent Current IOUT = 0mA VIN rising UVLO Threshold 3.5 V Hysteresis 150 mV PMOS On Resistance VIN = VGS = 5V 90 mΩ NMOS On Resistance VIN = VGS = 5V 90 mΩ P-Channel Current Limit 4.5V < VIN < 5.5V Over-Temperature Protection 2.8 3.5 4.2 Rising temperature 150 °C Hysteresis 20 °C Switching Frequency 1000 1300 Line Regulation VIN = 4.5 to 5.5V IOUT = 100mA 0.16 Load Regulation 0mA ≤ IOUT ≤ 2000mA 0.2 Output Voltage During Load Transition(4) IOUT from 1500mA to 100mA COUT = 60µF Output Voltage During Load Transition(4) IOUT from 100mA to 1500mA COUT = 60µF Reverse Leakage Current into Pin SW VIN = Open, EN = GND, Vsw = 5.5V 1600 0.6 % 5 % % 0.1 1 0.8 Power Good Output Threshold and Hysteresis µA V VIN = 4.5 to 5.5V 0mA ≤ IOUT ≤ 2000mA TA = 0C to +85C -2 2 % VIN = 4.5 to 5.5V 0mA ≤ IOUT ≤ 2000mA TA = -40C to +85C -3 3 % FB voltage rising 0.95 x VOUT V 2 % Hysteresis Power Good Output Delay 100 Power Good Output Voltage Low kHz %/V -5 Reference Voltage, VREF Output Voltage Accuracy A Isink=6mA, open drain output Over-Voltage Protection (OVP) Threshold and FB voltage rising Hysteresis Hysteresis µs 0.4 V 1.07 x VOUT V 2 % ILOAD (mA) Notes: 4. Refer to the load transient response test waveform in Figure 3. ss 1500 tr = 100nsec 100 0 tf = 100nsec ss ssss 0.6 4.6 Time (msec) Figure 3. Load Transient Response Test Waveform © 2006 Fairchild Semiconductor Corporation FAN2013 Rev. 1.0.0 www.fairchildsemi.com 4 FAN2013 2A Low-Voltage Current-Mode Synchronous PWM Buck Regulator Electrical Characteristics TA = 25°C, CIN = 10µF, COUT = 40µF, L = 2.2µH, VIN = 5V, VOUT = 1.2V unless otherwise noted. Figure 4. Start-up with 100mA Resistive Load Figure 5. Start-up with 2A Resistive Load Figure 6. Load Transient Response 1.5A to 100mA Figure 7. Load Transient Response 100mA to 1.5A Figure 8. Output Voltage Regulation Figure 9. Power Efficiency © 2006 Fairchild Semiconductor Corporation FAN2013 Rev. 1.0.0 www.fairchildsemi.com 5 FAN2013 2A Low-Voltage Current-Mode Synchronous PWM Buck Regulator Typical Performance Characteristics VIN PG REF PG COMP FB GND UNDER VOLTAGE LOCKOUT IS PVIN CURRENT SENSE DIGITAL SOFT START FB ERROR AMP LOGIC CONTROL COMP MOSFET DRIVER SW 0.8V GND IS OVER VOLTAGE COMP OSC SLOPE COMPENSATION REF FB GND Figure 10. Block Diagram Operation Description The FAN2013 is a step-down pulse-width modulated (PWM) current mode converter with a fixed switching frequency of 1.3MHz. At the rising edge of each clock cycle, the P-channel transistor is turned on until the PWM comparator trips or the current limit is reached. During the ON time, the inductor current ramps up and is monitored by the internal current-mode control loop. After a minimum dead time, the N-channel transistor is turned ON and the inductor current ramps down. As the clock cycle is completed, the N-channel switch is turned OFF and the next clock cycle starts. The duty cycle is given by the ratio of output voltage and input voltage. The converter runs at minimum duty cycle when output voltage is at minimum and input voltage is at maximum, and at 100% duty cycle when the input voltage approaches the output voltage, as described below. ble voltage drops of the input voltage and eliminates the output voltage overshoot. The soft-start is implemented as a digital circuit, increasing the switch current in four steps to the P-channel current limit (3.5A). Typical startup time for a 40µF output capacitor with a load current of 2.0A is 800µs. Output Over-Voltage Protection When output voltage, VOUT, reaches approximately 7% above the nominal value, the device turns OFF the Pchannel switch and turns ON part of the N-channel transistor with a built-in current limit of about 400mA. When VOUT reaches the hysteresis of about 2%, the device starts switching normally in closed loop. If output voltage is pulled up by an external voltage source with a current limit higher than typical 400mA, the output voltage stays up at the external voltage source level. 100% Duty Cycle Operation The over-voltage protection is designed to limit the output voltage excursion in case of a transient response from full load to a minimum load. As the input voltage approaches the output voltage and the duty cycle exceeds the typical 95%, the converter turns the P-channel transistor continuously on. In this mode, the output voltage is equal to the input voltage, minus the voltage drop across the P-channel transistor: VOUT = VIN – ILOAD × (RDS_ON + RL) EQ 1 where RDS_ON = P-channel switch ON resistance ILOAD = Output current RL = Inductor DC resistance Output Short-Circuit Protection The switch peak current is limited cycle by cycle to a typical value of 3.5A. In the event of an output voltage short circuit, the device operates with a frequency of 400kHz and minimum duty cycle, making the average typical input current .45A. Thermal Shutdown UVLO and Soft Start When the die temperature exceeds 150°C, a reset occurs and remains in effect until the die cools to 130°C, when the circuit is allowed to restart. The internal voltage reference, VREF, and the IC remain reset until VIN reaches the 3.7V UVLO threshold. The FAN2013 has an internal soft-start circuit that limits the in-rush current during start-up. This prevents possi© 2006 Fairchild Semiconductor Corporation FAN2013 Rev. 1.0.0 www.fairchildsemi.com 6 FAN2013 2A Low-Voltage Current-Mode Synchronous PWM Buck Regulator Block Diagram Setting the Output Voltage PCB Layout Recommendations The internal voltage reference, VREF, is 0.8V. The output is divided down by a voltage divider, R1 and R2 to the FB pin. The output voltage is: The inherently high peak currents and switching frequency of power supplies require careful PCB layout design. For best results, use wide traces for high-current paths and place the input capacitor, the inductor, and the output capacitor as close as possible to the integrated circuit terminals. To minimize voltage stress to the device resulting from ever-present switching spikes, use an input bypass capacitor with low ESR. Note that the peak amplitude of the switching spikes depends upon the load current; the higher the load current, the higher the switching spikes. R1 V OUT = V REF ⎛ 1 + -------⎞ ⎝ R 2⎠ EQ 2 According to this equation, assuming desired output voltage of 1.2V, and given R2 = 10KΩ, the calculated value of R1 is 5KΩ. Inductor Selection The inductor parameters directly related to device performance are saturation current and DC resistance. The FAN2013 operates with a typical inductor value of 2.2µH. The lower the DC resistance, the higher the efficiency. For saturation current, the inductor should be rated higher than the maximum load current, plus half of the inductor ripple current, calculated by: ΔI L = V OUT 1 – ( V OUT ⁄ V IN ) × ----------------------------------------L×f The resistor divider that sets the output voltage should be routed away from the inductor to avoid RF coupling. The ground plane at the bottom side of the PCB acts as an electromagnetic shield to reduce EMI. The recommended PCB layout is shown in Figure 11. EQ 3 where: ΔIL = Inductor Ripple Current f = Switching Frequency L = Inductor Value Recommended inductors are listed in Table 1. Inductor Value Vendor Part Number 2.2µH Coiltronics SD25 2R2 2.2µH Murata LQH66SSN2R2M03 Table 1: Recommended Inductors Capacitors Selection For best performance, a low-ESR input capacitor is required. A ceramic capacitor of at least 10µF, placed as close to the VIN and AGND pins as possible, is recommended. Figure 11. Recommended PCB Layout The output capacitor determines the output voltage ripple and the transient response. A minimum 20µF output capacitor is required for the FAN2013 to operate in stable conditions. Capacitor Value Vendor Part Number 10µF Taiyo Yuden JMK212BJ106MG TDK C2012X5ROJ106K JMK316BJ106KL C3216X5ROJ106M Murata GRM32ER61C106K Table 2: Recommended Capacitors © 2006 Fairchild Semiconductor Corporation FAN2013 Rev. 1.0.0 www.fairchildsemi.com 7 FAN2013 2A Low-Voltage Current-Mode Synchronous PWM Buck Regulator Applications Information FAN2013 2A Low-Voltage Current-Mode Synchronous PWM Buck Regulator Mechanical Dimensions 3x3mm 6-Lead MLP Dimensions are in millimeters unless otherwise noted. Figure 12. 3x3mm 6-Lead Molded Leadless Package (MLP) © 2006 Fairchild Semiconductor Corporation FAN2013 Rev. 1.0.0 www.fairchildsemi.com 8 FAN2013 2A Low-Voltage Current-Mode Synchronous PWM Buck Regulator © 2006 Fairchild Semiconductor Corporation FAN2013 Rev. 1.0.0 www.fairchildsemi.com 9