Revised September 2005 74AC14 • 74ACT14 Hex Inverter with Schmitt Trigger Input General Description The 74AC14 and 74ACT14 contain six inverter gates each with a Schmitt trigger input. They are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. In addition, they have a greater noise margin than conventional inverters. Features O ICC reduced by 50% O Outputs source/sink 24 mA O 74ACT14 has TTL-compatible inputs The 74AC14 and 74ACT14 have hysteresis between the positive-going and negative-going input thresholds (typically 1.0V) which is determined internally by transistor ratios and is essentially insensitive to temperature and supply voltage variations. Ordering Code: Order Number Package Number Package Description 74AC14SC M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 74AC14SCX_NL (Note 1) M14A Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 74AC14SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74AC14MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74AC14MTCX_NL (Note 1) MTC14 Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74AC14PC N14A 74ACT14SC M14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 74ACT14MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74ACT14MTCX_NL (Note 1) MTC14 Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74ACT14PC N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Pb-Free package per JEDEC J-STD-020B. Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only. FACT¥ is a trademark of Fairchild Semiconductor Corporation. © 2005 Fairchild Semiconductor Corporation DS009917 www.fairchildsemi.com 74AC14 • 74ACT14 Hex Inverter with Schmitt Trigger Input November 1988 74AC14 • 74ACT14 Logic Symbol Connection Diagram IEEE/IEC Function Table Pin Descriptions Pin Names Description Input Output In Inputs A O On Outputs L H H L www.fairchildsemi.com 2 Recommended Operating Conditions 0.5V to 7.0V Supply Voltage (VCC) DC Input Diode Current (IIK) VI VI 0.5V VCC 0.5V Supply Voltage (VCC) 20 mA 20 mA 0.5V to VCC 0.5V DC Input Voltage (VI) VO 0.5V VCC 0.5V 4.5V to 5.5V 0V to VCC Output Voltage (VO) 20 mA 20 mA 0.5V to VCC 0.5V DC Output Voltage (VO) 2.0V to 6.0V ACT Input Voltage (VI) DC Output Diode Current (IOK) VO AC 0V to VCC 40qC to 85qC Operating Temperature (TA) DC Output Source r50 mA or Sink Current (IO) Note 2: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation of FACT¥ circuits outside databook specifications. DC VCC or Ground Current per Output Pin (ICC or IGND) Storage Temperature (TSTG) r50 mA 65qC to 150qC Junction Temperature (TJ) 140qC PDIP DC Electrical Characteristics for AC Symbol VOH VOL Parameter VCC (V) TA 25qC Typ TA 40qC to 85qC Guaranteed Limits Minimum HIGH Level 3.0 2.99 2.9 2.9 Output Voltage 4.5 4.49 4.4 4.4 5.5 5.49 5.4 5.4 3.0 2.56 2.46 4.5 3.86 3.76 5.5 4.86 12 24 mA 4.76 IOH 24 mA (Note ) IOUT Maximum LOW Level 3.0 0.002 0.1 0.1 Output Voltage 4.5 0.001 0.1 0.1 5.5 0.001 0.1 0.1 3.0 0.36 0.44 4.5 0.36 0.44 5.5 0.36 0.44 5.5 r0.1 r1.0 Vt Maximum Positive 3.0 2.2 2.2 Threshold 4.5 3.2 3.2 5.5 3.9 3.9 Minimum Negative 3.0 0.5 0.5 Threshold 4.5 0.9 0.9 5.5 1.1 1.1 3.0 1.2 1.2 4.5 1.4 1.4 5.5 1.6 1.6 3.0 0.3 0.3 4.5 0.4 0.4 5.5 0.5 0.5 VH(MIN) Maximum Hysteresis Minimum Hysteresis 50 PA45 IOUT V IOH Maximum Input Leakage Current VH(MAX) Conditions IOH IIN (Note ) Vt Units V 50 PA V IOL V PA 12 IOL 24 mA IOL 24 mA (Note ) VI VCC, GND TA Worst Case TA Worst Case TA Worst Case TA Worst Case V V V V IOLD Minimum Dynamic 5.5 75 mA Output Current (Note ) 5.5 75 VOLD IOHD mA VOHD ICC Maximum Quiescent 5.5 (Note ) Supply Current 2.0 20.0 PA VIN 1.65V Max 3.85V Min VCC or GND Note 3: All outputs loaded; thresholds on input associated with output under test. Note 4: Maximum test duration 2.0 ms, one output loaded at a time. Note 5: IIN and ICC @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V VCC. 3 www.fairchildsemi.com 74AC14 • 74ACT14 Absolute Maximum Ratings(Note 2) 74AC14 • 74ACT14 AC Electrical Characteristics for AC Symbol Parameter 25qC CL 50 pF TA 40qC to 85qC CL Min Typ Max 3.3 1.5 9.5 5.0 1.5 7.0 3.3 1.5 5.0 1.5 Propagation Delay tPHL TA (V) (Note ) Propagation Delay tPLH VCC 50 pF Min Max 13.5 1.5 15.0 10.0 1.5 11.0 7.5 11.5 1.5 13.0 6.0 8.5 1.5 9.5 Note 6: Voltage Range 3.3 is 3.3V r 0.3V Voltage Range 5.0 is 5.0V r 0.5V DC Electrical Characteristics for ACT Symbol VIH VIL VOH VOL Parameter 25qC TA 40qC to 85qC Guaranteed Limits 4.5 1.5 2.0 2.0 5.5 1.5 2.0 2.0 Maximum LOW Level 4.5 1.5 0.8 0.8 Input Voltage 5.5 1.5 0.8 0.8 Minimum HIGH Level 4.5 4.49 434 4.4 Output Voltage 5.5 5.49 5.4 5.4 4.5 3.86 3.76 5.5 4.86 4.76 Maximum LOW Level 4.5 0.001 0.1 0.1 Output Voltage 5.5 0.001 0.1 0.1 4.5 0.36 0.44 5.5 0.36 0.44 5.5 r0.1 r1.0 VH(MAX) Maximum Hysteresis Vt TA Typ Minimum HIGH Level Maximum Input Leakage Current Vt (V) Input Voltage IIN VH(MIN) VCC Minimum Hysteresis 4.5 1.4 1.4 5.5 1.6 1.6 4.5 0.4 0.4 5.5 0.5 0.5 Maximum Positive 4.5 2.0 2.0 Threshold 5.5 2.0 2.0 Minimum Negative 4.5 0.8 0.8 Threshold 5.5 0.8 0.8 0.6 Units Conditions VOUT 0.1V VOUT 0.1V IOUT 50PA VIN VIL or VIH V or VCC 0.1V V or VCC 0.1V V V 24 mA 24 mA (Note 7) 50 PA IOH IOH V V PA V V V V IOUT VIN VIL or VIH IOL 24 mA IOL 24 mA (Note 7) VI VCC, GND TA Worst Case TA Worst Case TA Worst Case TA Worst Case VCC 2.1V ICCT Maximum ICC/Input 5.5 1.5 mA VI IOLD Minimum Dynamic 5.5 75 mA IOHD Output Current (Note 8) 5.5 75 VOLD mA VOHD ICC Maximum Quiescent 5.5 2.0 Supply Current PA VIN 3.85V Min VCC or GND Note 7: All outputs loaded; thresholds on input associated with output under test. Note 8: Maximum test duration 2.0 ms, one output loaded at a time. www.fairchildsemi.com 20.0 1.65V Max 4 Units ns ns Symbol Parameter Propagation Delay tPLH VCC TA 25qC (V) CL 50 pF TA 40qC to 85qC CL Units 50 pF (Note 9) Min Typ Max Min Max 5.0 3.0 8.0 10.0 3.0 11.0 ns 5.0 3.0 8.0 10.0 3.0 11.0 ns Data to Output Propagation Delay tPHL Data to Output Note 9: Voltage Range 5.0 is 5.0V r 0.5V Capacitance Symbol Parameter CIN Input Capacitance CPD Power Dissipation Capacitance for AC Typ Units 4.5 pF VCC OPEN pF VCC 5.0V 25.0 for ACT 80 5 Conditions www.fairchildsemi.com 74AC14 • 74ACT14 AC Electrical Characteristics for ACT 74AC14 • 74ACT14 Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M14A www.fairchildsemi.com 6 74AC14 • 74ACT14 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M14D 7 www.fairchildsemi.com 74AC14 • 74ACT14 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC14 www.fairchildsemi.com 8 74AC14 • 74ACT14 Hex Inverter with Schmitt Trigger Input Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N14A DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION As used herein: provided in the labeling, can be reasonably expected to result in significant injury to the user. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or 2. A critical component is any component of a life support (b) support or sustain life, or (c) whose failure to perform device or system whose failure to perform can be reasonwhen properly used in accordance with instructions for use ably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild Semiconductor. The datasheet is printed for reference information only. 9 www.fairchildsemi.com